sysdeps/sparc/sparc32/bits/atomic.h

   1 /* Atomic operations.  sparc32 version.
   2    Copyright (C) 2003-2014 Free Software Foundation, Inc.
   3    This file is part of the GNU C Library.
   4    Contributed by Jakub Jelinek <jakub@redhat.com>, 2003.
   5
   6    The GNU C Library is free software; you can redistribute it and/or
   7    modify it under the terms of the GNU Lesser General Public
   8    License as published by the Free Software Foundation; either
   9    version 2.1 of the License, or (at your option) any later version.
  10
  11    The GNU C Library is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14    Lesser General Public License for more details.
  15
  16    You should have received a copy of the GNU Lesser General Public
  17    License along with the GNU C Library; if not, see
  18    <http://www.gnu.org/licenses/>.  */
  19
  20 #ifndef _BITS_ATOMIC_H
  21 #define _BITS_ATOMIC_H  1
  22
  23 #include <stdint.h>
  24
  25 typedef int8_t atomic8_t;
  26 typedef uint8_t uatomic8_t;
  27 typedef int_fast8_t atomic_fast8_t;
  28 typedef uint_fast8_t uatomic_fast8_t;
  29
  30 typedef int16_t atomic16_t;
  31 typedef uint16_t uatomic16_t;
  32 typedef int_fast16_t atomic_fast16_t;
  33 typedef uint_fast16_t uatomic_fast16_t;
  34
  35 typedef int32_t atomic32_t;
  36 typedef uint32_t uatomic32_t;
  37 typedef int_fast32_t atomic_fast32_t;
  38 typedef uint_fast32_t uatomic_fast32_t;
  39
  40 typedef int64_t atomic64_t;
  41 typedef uint64_t uatomic64_t;
  42 typedef int_fast64_t atomic_fast64_t;
  43 typedef uint_fast64_t uatomic_fast64_t;
  44
  45 typedef intptr_t atomicptr_t;
  46 typedef uintptr_t uatomicptr_t;
  47 typedef intmax_t atomic_max_t;
  48 typedef uintmax_t uatomic_max_t;
  49
  50 #define __HAVE_64B_ATOMICS 0
  51 #define USE_ATOMIC_COMPILER_BUILTINS 0
  52
  53
  54 /* We have no compare and swap, just test and set.
  55    The following implementation contends on 64 global locks
  56    per library and assumes no variable will be accessed using atomic.h
  57    macros from two different libraries.  */
  58
  59 __make_section_unallocated
  60   (".gnu.linkonce.b.__sparc32_atomic_locks, \"aw\", %nobits");
  61
  62 volatile unsigned char __sparc32_atomic_locks[64]
  63   __attribute__ ((nocommon, section (".gnu.linkonce.b.__sparc32_atomic_locks"
  64                                      __sec_comment),
  65                   visibility ("hidden")));
  66
  67 #define __sparc32_atomic_do_lock(addr) \
  68   do                                                                  \
  69     {                                                                 \
  70       unsigned int __old_lock;                                        \
  71       unsigned int __idx = (((long) addr >> 2) ^ ((long) addr >> 12)) \
  72                            & 63;                                      \
  73       do                                                              \
  74         __asm __volatile ("ldstub %1, %0"                             \
  75                           : "=r" (__old_lock),                        \
  76                             "=m" (__sparc32_atomic_locks[__idx])      \
  77                           : "m" (__sparc32_atomic_locks[__idx])       \
  78                           : "memory");                                \
  79       while (__old_lock);                                             \
  80     }                                                                 \
  81   while (0)
  82
  83 #define __sparc32_atomic_do_unlock(addr) \
  84   do                                                                  \
  85     {                                                                 \
  86       __sparc32_atomic_locks[(((long) addr >> 2)                      \
  87                               ^ ((long) addr >> 12)) & 63] = 0;       \
  88       __asm __volatile ("" ::: "memory");                             \
  89     }                                                                 \
  90   while (0)
  91
  92 #define __sparc32_atomic_do_lock24(addr) \
  93   do                                                                  \
  94     {                                                                 \
  95       unsigned int __old_lock;                                        \
  96       do                                                              \
  97         __asm __volatile ("ldstub %1, %0"                             \
  98                           : "=r" (__old_lock), "=m" (*(addr))         \
  99                           : "m" (*(addr))                             \
 100                           : "memory");                                \
 101       while (__old_lock);                                             \
 102     }                                                                 \
 103   while (0)
 104
 105 #define __sparc32_atomic_do_unlock24(addr) \
 106   do                                                                  \
 107     {                                                                 \
 108       *(char *) (addr) = 0;                                           \
 109       __asm __volatile ("" ::: "memory");                             \
 110     }                                                                 \
 111   while (0)
 112
 113
 114 #ifndef SHARED
 115 # define __v9_compare_and_exchange_val_32_acq(mem, newval, oldval) \
 116 ({                                                                            \
 117   register __typeof (*(mem)) __acev_tmp __asm ("%g6");                        \
 118   register __typeof (mem) __acev_mem __asm ("%g1") = (mem);                   \
 119   register __typeof (*(mem)) __acev_oldval __asm ("%g5");                     \
 120   __acev_tmp = (newval);                                                      \
 121   __acev_oldval = (oldval);                                                   \
 122   /* .word 0xcde05005 is cas [%g1], %g5, %g6.  Can't use cas here though,     \
 123      because as will then mark the object file as V8+ arch.  */               \
 124   __asm __volatile (".word 0xcde05005"                                        \
 125                     : "+r" (__acev_tmp), "=m" (*__acev_mem)                   \
 126                     : "r" (__acev_oldval), "m" (*__acev_mem),                 \
 127                       "r" (__acev_mem) : "memory");                           \
 128   __acev_tmp; })
 129 #endif
 130
 131 /* The only basic operation needed is compare and exchange.  */
 132 #define __v7_compare_and_exchange_val_acq(mem, newval, oldval) \
 133   ({ __typeof (mem) __acev_memp = (mem);                              \
 134      __typeof (*mem) __acev_ret;                                      \
 135      __typeof (*mem) __acev_newval = (newval);                        \
 136                                                                       \
 137      __sparc32_atomic_do_lock (__acev_memp);                          \
 138      __acev_ret = *__acev_memp;                                       \
 139      if (__acev_ret == (oldval))                                      \
 140        *__acev_memp = __acev_newval;                                  \
 141      __sparc32_atomic_do_unlock (__acev_memp);                        \
 142      __acev_ret; })
 143
 144 #define __v7_compare_and_exchange_bool_acq(mem, newval, oldval) \
 145   ({ __typeof (mem) __aceb_memp = (mem);                              \
 146      int __aceb_ret;                                                  \
 147      __typeof (*mem) __aceb_newval = (newval);                        \
 148                                                                       \
 149      __sparc32_atomic_do_lock (__aceb_memp);                          \
 150      __aceb_ret = 0;                                                  \
 151      if (*__aceb_memp == (oldval))                                    \
 152        *__aceb_memp = __aceb_newval;                                  \
 153      else                                                             \
 154        __aceb_ret = 1;                                                \
 155      __sparc32_atomic_do_unlock (__aceb_memp);                        \
 156      __aceb_ret; })
 157
 158 #define __v7_exchange_acq(mem, newval) \
 159   ({ __typeof (mem) __acev_memp = (mem);                              \
 160      __typeof (*mem) __acev_ret;                                      \
 161      __typeof (*mem) __acev_newval = (newval);                        \
 162                                                                       \
 163      __sparc32_atomic_do_lock (__acev_memp);                          \
 164      __acev_ret = *__acev_memp;                                       \
 165      *__acev_memp = __acev_newval;                                    \
 166      __sparc32_atomic_do_unlock (__acev_memp);                        \
 167      __acev_ret; })
 168
 169 #define __v7_exchange_and_add(mem, value) \
 170   ({ __typeof (mem) __acev_memp = (mem);                              \
 171      __typeof (*mem) __acev_ret;                                      \
 172                                                                       \
 173      __sparc32_atomic_do_lock (__acev_memp);                          \
 174      __acev_ret = *__acev_memp;                                       \
 175      *__acev_memp = __acev_ret + (value);                             \
 176      __sparc32_atomic_do_unlock (__acev_memp);                        \
 177      __acev_ret; })
 178
 179 /* Special versions, which guarantee that top 8 bits of all values
 180    are cleared and use those bits as the ldstub lock.  */
 181 #define __v7_compare_and_exchange_val_24_acq(mem, newval, oldval) \
 182   ({ __typeof (mem) __acev_memp = (mem);                              \
 183      __typeof (*mem) __acev_ret;                                      \
 184      __typeof (*mem) __acev_newval = (newval);                        \
 185                                                                       \
 186      __sparc32_atomic_do_lock24 (__acev_memp);                        \
 187      __acev_ret = *__acev_memp & 0xffffff;                            \
 188      if (__acev_ret == (oldval))                                      \
 189        *__acev_memp = __acev_newval;                                  \
 190      else                                                             \
 191        __sparc32_atomic_do_unlock24 (__acev_memp);                    \
 192      __asm __volatile ("" ::: "memory");                              \
 193      __acev_ret; })
 194
 195 #define __v7_exchange_24_rel(mem, newval) \
 196   ({ __typeof (mem) __acev_memp = (mem);                              \
 197      __typeof (*mem) __acev_ret;                                      \
 198      __typeof (*mem) __acev_newval = (newval);                        \
 199                                                                       \
 200      __sparc32_atomic_do_lock24 (__acev_memp);                        \
 201      __acev_ret = *__acev_memp & 0xffffff;                            \
 202      *__acev_memp = __acev_newval;                                    \
 203      __asm __volatile ("" ::: "memory");                              \
 204      __acev_ret; })
 205
 206 #ifdef SHARED
 207
 208 /* When dynamically linked, we assume pre-v9 libraries are only ever
 209    used on pre-v9 CPU.  */
 210 # define __atomic_is_v9 0
 211
 212 # define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
 213   __v7_compare_and_exchange_val_acq (mem, newval, oldval)
 214
 215 # define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
 216   __v7_compare_and_exchange_bool_acq (mem, newval, oldval)
 217
 218 # define atomic_exchange_acq(mem, newval) \
 219   __v7_exchange_acq (mem, newval)
 220
 221 # define atomic_exchange_and_add(mem, value) \
 222   __v7_exchange_and_add (mem, value)
 223
 224 # define atomic_compare_and_exchange_val_24_acq(mem, newval, oldval) \
 225   ({                                                                  \
 226      if (sizeof (*mem) != 4)                                          \
 227        abort ();                                                      \
 228      __v7_compare_and_exchange_val_24_acq (mem, newval, oldval); })
 229
 230 # define atomic_exchange_24_rel(mem, newval) \
 231   ({                                                                  \
 232      if (sizeof (*mem) != 4)                                          \
 233        abort ();                                                      \
 234      __v7_exchange_24_rel (mem, newval); })
 235
 236 # define atomic_full_barrier() __asm ("" ::: "memory")
 237 # define atomic_read_barrier() atomic_full_barrier ()
 238 # define atomic_write_barrier() atomic_full_barrier ()
 239
 240 #else
 241
 242 /* In libc.a/libpthread.a etc. we don't know if we'll be run on
 243    pre-v9 or v9 CPU.  To be interoperable with dynamically linked
 244    apps on v9 CPUs e.g. with process shared primitives, use cas insn
 245    on v9 CPUs and ldstub on pre-v9.  */
 246
 247 extern uint64_t _dl_hwcap __attribute__((weak));
 248 # define __atomic_is_v9 \
 249   (__builtin_expect (&_dl_hwcap != 0, 1) \
 250    && __builtin_expect (_dl_hwcap & HWCAP_SPARC_V9, HWCAP_SPARC_V9))
 251
 252 # define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
 253   ({                                                                  \
 254      __typeof (*mem) __acev_wret;                                     \
 255      if (sizeof (*mem) != 4)                                          \
 256        abort ();                                                      \
 257      if (__atomic_is_v9)                                              \
 258        __acev_wret                                                    \
 259          = __v9_compare_and_exchange_val_32_acq (mem, newval, oldval);\
 260      else                                                             \
 261        __acev_wret                                                    \
 262          = __v7_compare_and_exchange_val_acq (mem, newval, oldval);   \
 263      __acev_wret; })
 264
 265 # define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
 266   ({                                                                  \
 267      int __acev_wret;                                                 \
 268      if (sizeof (*mem) != 4)                                          \
 269        abort ();                                                      \
 270      if (__atomic_is_v9)                                              \
 271        {                                                              \
 272          __typeof (oldval) __acev_woldval = (oldval);                 \
 273          __acev_wret                                                  \
 274            = __v9_compare_and_exchange_val_32_acq (mem, newval,       \
 275                                                    __acev_woldval)    \
 276              != __acev_woldval;                                       \
 277        }                                                              \
 278      else                                                             \
 279        __acev_wret                                                    \
 280          = __v7_compare_and_exchange_bool_acq (mem, newval, oldval);  \
 281      __acev_wret; })
 282
 283 # define atomic_exchange_rel(mem, newval) \
 284   ({                                                                  \
 285      __typeof (*mem) __acev_wret;                                     \
 286      if (sizeof (*mem) != 4)                                          \
 287        abort ();                                                      \
 288      if (__atomic_is_v9)                                              \
 289        {                                                              \
 290          __typeof (mem) __acev_wmemp = (mem);                         \
 291          __typeof (*(mem)) __acev_wval = (newval);                    \
 292          do                                                           \
 293            __acev_wret = *__acev_wmemp;                               \
 294          while (__builtin_expect                                      \
 295                   (__v9_compare_and_exchange_val_32_acq (__acev_wmemp,\
 296                                                          __acev_wval, \
 297                                                          __acev_wret) \
 298                    != __acev_wret, 0));                               \
 299        }                                                              \
 300      else                                                             \
 301        __acev_wret = __v7_exchange_acq (mem, newval);                 \
 302      __acev_wret; })
 303
 304 # define atomic_compare_and_exchange_val_24_acq(mem, newval, oldval) \
 305   ({                                                                  \
 306      __typeof (*mem) __acev_wret;                                     \
 307      if (sizeof (*mem) != 4)                                          \
 308        abort ();                                                      \
 309      if (__atomic_is_v9)                                              \
 310        __acev_wret                                                    \
 311          = __v9_compare_and_exchange_val_32_acq (mem, newval, oldval);\
 312      else                                                             \
 313        __acev_wret                                                    \
 314          = __v7_compare_and_exchange_val_24_acq (mem, newval, oldval);\
 315      __acev_wret; })
 316
 317 # define atomic_exchange_24_rel(mem, newval) \
 318   ({                                                                  \
 319      __typeof (*mem) __acev_w24ret;                                   \
 320      if (sizeof (*mem) != 4)                                          \
 321        abort ();                                                      \
 322      if (__atomic_is_v9)                                              \
 323        __acev_w24ret = atomic_exchange_rel (mem, newval);             \
 324      else                                                             \
 325        __acev_w24ret = __v7_exchange_24_rel (mem, newval);            \
 326      __acev_w24ret; })
 327
 328 #define atomic_full_barrier()                                           \
 329   do {                                                                  \
 330      if (__atomic_is_v9)                                                \
 331        /* membar #LoadLoad | #LoadStore | #StoreLoad | #StoreStore */   \
 332        __asm __volatile (".word 0x8143e00f" : : : "memory");            \
 333      else                                                               \
 334        __asm __volatile ("" : : : "memory");                            \
 335   } while (0)
 336
 337 #define atomic_read_barrier()                                           \
 338   do {                                                                  \
 339      if (__atomic_is_v9)                                                \
 340        /* membar #LoadLoad | #LoadStore */                              \
 341        __asm __volatile (".word 0x8143e005" : : : "memory");            \
 342      else                                                               \
 343        __asm __volatile ("" : : : "memory");                            \
 344   } while (0)
 345
 346 #define atomic_write_barrier()                                          \
 347   do {                                                                  \
 348      if (__atomic_is_v9)                                                \
 349        /* membar  #LoadStore | #StoreStore */                           \
 350        __asm __volatile (".word 0x8143e00c" : : : "memory");            \
 351      else                                                               \
 352        __asm __volatile ("" : : : "memory");                            \
 353   } while (0)
 354
 355 #endif
 356
 357 #include <sysdep.h>
 358
 359 #endif  /* bits/atomic.h */