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scsi: aic7xxx: fix EISA support
[thirdparty/kernel/linux.git] / drivers / scsi / aic7xxx / aic7xxx_osm_pci.c
1 /*
2 * Linux driver attachment glue for PCI based controllers.
3 *
4 * Copyright (c) 2000-2001 Adaptec Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * substantially similar to the "NO WARRANTY" disclaimer below
15 * ("Disclaimer") and any redistribution must be conditioned upon
16 * including a substantially similar Disclaimer requirement for further
17 * binary redistribution.
18 * 3. Neither the names of the above-listed copyright holders nor the names
19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
25 *
26 * NO WARRANTY
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGES.
38 *
39 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm_pci.c#47 $
40 */
41
42 #include "aic7xxx_osm.h"
43 #include "aic7xxx_pci.h"
44
45 /* Define the macro locally since it's different for different class of chips.
46 */
47 #define ID(x) ID_C(x, PCI_CLASS_STORAGE_SCSI)
48
49 static const struct pci_device_id ahc_linux_pci_id_table[] = {
50 /* aic7850 based controllers */
51 ID(ID_AHA_2902_04_10_15_20C_30C),
52 /* aic7860 based controllers */
53 ID(ID_AHA_2930CU),
54 ID(ID_AHA_1480A & ID_DEV_VENDOR_MASK),
55 ID(ID_AHA_2940AU_0 & ID_DEV_VENDOR_MASK),
56 ID(ID_AHA_2940AU_CN & ID_DEV_VENDOR_MASK),
57 ID(ID_AHA_2930C_VAR & ID_DEV_VENDOR_MASK),
58 /* aic7870 based controllers */
59 ID(ID_AHA_2940),
60 ID(ID_AHA_3940),
61 ID(ID_AHA_398X),
62 ID(ID_AHA_2944),
63 ID(ID_AHA_3944),
64 ID(ID_AHA_4944),
65 /* aic7880 based controllers */
66 ID(ID_AHA_2940U & ID_DEV_VENDOR_MASK),
67 ID(ID_AHA_3940U & ID_DEV_VENDOR_MASK),
68 ID(ID_AHA_2944U & ID_DEV_VENDOR_MASK),
69 ID(ID_AHA_3944U & ID_DEV_VENDOR_MASK),
70 ID(ID_AHA_398XU & ID_DEV_VENDOR_MASK),
71 ID(ID_AHA_4944U & ID_DEV_VENDOR_MASK),
72 ID(ID_AHA_2930U & ID_DEV_VENDOR_MASK),
73 ID(ID_AHA_2940U_PRO & ID_DEV_VENDOR_MASK),
74 ID(ID_AHA_2940U_CN & ID_DEV_VENDOR_MASK),
75 /* aic7890 based controllers */
76 ID(ID_AHA_2930U2),
77 ID(ID_AHA_2940U2B),
78 ID(ID_AHA_2940U2_OEM),
79 ID(ID_AHA_2940U2),
80 ID(ID_AHA_2950U2B),
81 ID16(ID_AIC7890_ARO & ID_AIC7895_ARO_MASK),
82 ID(ID_AAA_131U2),
83 /* aic7890 based controllers */
84 ID(ID_AHA_29160),
85 ID(ID_AHA_29160_CPQ),
86 ID(ID_AHA_29160N),
87 ID(ID_AHA_29160C),
88 ID(ID_AHA_29160B),
89 ID(ID_AHA_19160B),
90 ID(ID_AIC7892_ARO),
91 /* aic7892 based controllers */
92 ID(ID_AHA_2940U_DUAL),
93 ID(ID_AHA_3940AU),
94 ID(ID_AHA_3944AU),
95 ID(ID_AIC7895_ARO),
96 ID(ID_AHA_3950U2B_0),
97 ID(ID_AHA_3950U2B_1),
98 ID(ID_AHA_3950U2D_0),
99 ID(ID_AHA_3950U2D_1),
100 ID(ID_AIC7896_ARO),
101 /* aic7899 based controllers */
102 ID(ID_AHA_3960D),
103 ID(ID_AHA_3960D_CPQ),
104 ID(ID_AIC7899_ARO),
105 /* Generic chip probes for devices we don't know exactly. */
106 ID(ID_AIC7850 & ID_DEV_VENDOR_MASK),
107 ID(ID_AIC7855 & ID_DEV_VENDOR_MASK),
108 ID(ID_AIC7859 & ID_DEV_VENDOR_MASK),
109 ID(ID_AIC7860 & ID_DEV_VENDOR_MASK),
110 ID(ID_AIC7870 & ID_DEV_VENDOR_MASK),
111 ID(ID_AIC7880 & ID_DEV_VENDOR_MASK),
112 ID16(ID_AIC7890 & ID_9005_GENERIC_MASK),
113 ID16(ID_AIC7892 & ID_9005_GENERIC_MASK),
114 ID(ID_AIC7895 & ID_DEV_VENDOR_MASK),
115 ID16(ID_AIC7896 & ID_9005_GENERIC_MASK),
116 ID16(ID_AIC7899 & ID_9005_GENERIC_MASK),
117 ID(ID_AIC7810 & ID_DEV_VENDOR_MASK),
118 ID(ID_AIC7815 & ID_DEV_VENDOR_MASK),
119 { 0 }
120 };
121
122 MODULE_DEVICE_TABLE(pci, ahc_linux_pci_id_table);
123
124 #ifdef CONFIG_PM
125 static int
126 ahc_linux_pci_dev_suspend(struct pci_dev *pdev, pm_message_t mesg)
127 {
128 struct ahc_softc *ahc = pci_get_drvdata(pdev);
129 int rc;
130
131 if ((rc = ahc_suspend(ahc)))
132 return rc;
133
134 pci_save_state(pdev);
135 pci_disable_device(pdev);
136
137 if (mesg.event & PM_EVENT_SLEEP)
138 pci_set_power_state(pdev, PCI_D3hot);
139
140 return rc;
141 }
142
143 static int
144 ahc_linux_pci_dev_resume(struct pci_dev *pdev)
145 {
146 struct ahc_softc *ahc = pci_get_drvdata(pdev);
147 int rc;
148
149 pci_set_power_state(pdev, PCI_D0);
150 pci_restore_state(pdev);
151
152 if ((rc = pci_enable_device(pdev))) {
153 dev_printk(KERN_ERR, &pdev->dev,
154 "failed to enable device after resume (%d)\n", rc);
155 return rc;
156 }
157
158 pci_set_master(pdev);
159
160 ahc_pci_resume(ahc);
161
162 return (ahc_resume(ahc));
163 }
164 #endif
165
166 static void
167 ahc_linux_pci_dev_remove(struct pci_dev *pdev)
168 {
169 struct ahc_softc *ahc = pci_get_drvdata(pdev);
170 u_long s;
171
172 if (ahc->platform_data && ahc->platform_data->host)
173 scsi_remove_host(ahc->platform_data->host);
174
175 ahc_lock(ahc, &s);
176 ahc_intr_enable(ahc, FALSE);
177 ahc_unlock(ahc, &s);
178 ahc_free(ahc);
179 }
180
181 static void
182 ahc_linux_pci_inherit_flags(struct ahc_softc *ahc)
183 {
184 struct pci_dev *pdev = ahc->dev_softc, *master_pdev;
185 unsigned int master_devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
186
187 master_pdev = pci_get_slot(pdev->bus, master_devfn);
188 if (master_pdev) {
189 struct ahc_softc *master = pci_get_drvdata(master_pdev);
190 if (master) {
191 ahc->flags &= ~AHC_BIOS_ENABLED;
192 ahc->flags |= master->flags & AHC_BIOS_ENABLED;
193
194 ahc->flags &= ~AHC_PRIMARY_CHANNEL;
195 ahc->flags |= master->flags & AHC_PRIMARY_CHANNEL;
196 } else
197 printk(KERN_ERR "aic7xxx: no multichannel peer found!\n");
198 pci_dev_put(master_pdev);
199 }
200 }
201
202 static int
203 ahc_linux_pci_dev_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
204 {
205 char buf[80];
206 const uint64_t mask_39bit = 0x7FFFFFFFFFULL;
207 struct ahc_softc *ahc;
208 ahc_dev_softc_t pci;
209 const struct ahc_pci_identity *entry;
210 char *name;
211 int error;
212 struct device *dev = &pdev->dev;
213
214 pci = pdev;
215 entry = ahc_find_pci_device(pci);
216 if (entry == NULL)
217 return (-ENODEV);
218
219 /*
220 * Allocate a softc for this card and
221 * set it up for attachment by our
222 * common detect routine.
223 */
224 sprintf(buf, "ahc_pci:%d:%d:%d",
225 ahc_get_pci_bus(pci),
226 ahc_get_pci_slot(pci),
227 ahc_get_pci_function(pci));
228 name = kstrdup(buf, GFP_ATOMIC);
229 if (name == NULL)
230 return (-ENOMEM);
231 ahc = ahc_alloc(NULL, name);
232 if (ahc == NULL)
233 return (-ENOMEM);
234 if (pci_enable_device(pdev)) {
235 ahc_free(ahc);
236 return (-ENODEV);
237 }
238 pci_set_master(pdev);
239
240 if (sizeof(dma_addr_t) > 4
241 && ahc->features & AHC_LARGE_SCBS
242 && dma_set_mask(dev, mask_39bit) == 0
243 && dma_get_required_mask(dev) > DMA_BIT_MASK(32)) {
244 ahc->flags |= AHC_39BIT_ADDRESSING;
245 } else {
246 if (dma_set_mask(dev, DMA_BIT_MASK(32))) {
247 ahc_free(ahc);
248 printk(KERN_WARNING "aic7xxx: No suitable DMA available.\n");
249 return (-ENODEV);
250 }
251 }
252 ahc->dev_softc = pci;
253 ahc->dev = &pci->dev;
254 error = ahc_pci_config(ahc, entry);
255 if (error != 0) {
256 ahc_free(ahc);
257 return (-error);
258 }
259
260 /*
261 * Second Function PCI devices need to inherit some
262 * settings from function 0.
263 */
264 if ((ahc->features & AHC_MULTI_FUNC) && PCI_FUNC(pdev->devfn) != 0)
265 ahc_linux_pci_inherit_flags(ahc);
266
267 pci_set_drvdata(pdev, ahc);
268 ahc_linux_register_host(ahc, &aic7xxx_driver_template);
269 return (0);
270 }
271
272 /******************************* PCI Routines *********************************/
273 uint32_t
274 ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width)
275 {
276 switch (width) {
277 case 1:
278 {
279 uint8_t retval;
280
281 pci_read_config_byte(pci, reg, &retval);
282 return (retval);
283 }
284 case 2:
285 {
286 uint16_t retval;
287 pci_read_config_word(pci, reg, &retval);
288 return (retval);
289 }
290 case 4:
291 {
292 uint32_t retval;
293 pci_read_config_dword(pci, reg, &retval);
294 return (retval);
295 }
296 default:
297 panic("ahc_pci_read_config: Read size too big");
298 /* NOTREACHED */
299 return (0);
300 }
301 }
302
303 void
304 ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width)
305 {
306 switch (width) {
307 case 1:
308 pci_write_config_byte(pci, reg, value);
309 break;
310 case 2:
311 pci_write_config_word(pci, reg, value);
312 break;
313 case 4:
314 pci_write_config_dword(pci, reg, value);
315 break;
316 default:
317 panic("ahc_pci_write_config: Write size too big");
318 /* NOTREACHED */
319 }
320 }
321
322
323 static struct pci_driver aic7xxx_pci_driver = {
324 .name = "aic7xxx",
325 .probe = ahc_linux_pci_dev_probe,
326 #ifdef CONFIG_PM
327 .suspend = ahc_linux_pci_dev_suspend,
328 .resume = ahc_linux_pci_dev_resume,
329 #endif
330 .remove = ahc_linux_pci_dev_remove,
331 .id_table = ahc_linux_pci_id_table
332 };
333
334 int
335 ahc_linux_pci_init(void)
336 {
337 return pci_register_driver(&aic7xxx_pci_driver);
338 }
339
340 void
341 ahc_linux_pci_exit(void)
342 {
343 pci_unregister_driver(&aic7xxx_pci_driver);
344 }
345
346 static int
347 ahc_linux_pci_reserve_io_region(struct ahc_softc *ahc, resource_size_t *base)
348 {
349 if (aic7xxx_allow_memio == 0)
350 return (ENOMEM);
351
352 *base = pci_resource_start(ahc->dev_softc, 0);
353 if (*base == 0)
354 return (ENOMEM);
355 if (!request_region(*base, 256, "aic7xxx"))
356 return (ENOMEM);
357 return (0);
358 }
359
360 static int
361 ahc_linux_pci_reserve_mem_region(struct ahc_softc *ahc,
362 resource_size_t *bus_addr,
363 uint8_t __iomem **maddr)
364 {
365 resource_size_t start;
366 int error;
367
368 error = 0;
369 start = pci_resource_start(ahc->dev_softc, 1);
370 if (start != 0) {
371 *bus_addr = start;
372 if (!request_mem_region(start, 0x1000, "aic7xxx"))
373 error = ENOMEM;
374 if (error == 0) {
375 *maddr = ioremap_nocache(start, 256);
376 if (*maddr == NULL) {
377 error = ENOMEM;
378 release_mem_region(start, 0x1000);
379 }
380 }
381 } else
382 error = ENOMEM;
383 return (error);
384 }
385
386 int
387 ahc_pci_map_registers(struct ahc_softc *ahc)
388 {
389 uint32_t command;
390 resource_size_t base;
391 uint8_t __iomem *maddr;
392 int error;
393
394 /*
395 * If its allowed, we prefer memory mapped access.
396 */
397 command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 4);
398 command &= ~(PCIM_CMD_PORTEN|PCIM_CMD_MEMEN);
399 base = 0;
400 maddr = NULL;
401 error = ahc_linux_pci_reserve_mem_region(ahc, &base, &maddr);
402 if (error == 0) {
403 ahc->platform_data->mem_busaddr = base;
404 ahc->tag = BUS_SPACE_MEMIO;
405 ahc->bsh.maddr = maddr;
406 ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND,
407 command | PCIM_CMD_MEMEN, 4);
408
409 /*
410 * Do a quick test to see if memory mapped
411 * I/O is functioning correctly.
412 */
413 if (ahc_pci_test_register_access(ahc) != 0) {
414
415 printk("aic7xxx: PCI Device %d:%d:%d "
416 "failed memory mapped test. Using PIO.\n",
417 ahc_get_pci_bus(ahc->dev_softc),
418 ahc_get_pci_slot(ahc->dev_softc),
419 ahc_get_pci_function(ahc->dev_softc));
420 iounmap(maddr);
421 release_mem_region(ahc->platform_data->mem_busaddr,
422 0x1000);
423 ahc->bsh.maddr = NULL;
424 maddr = NULL;
425 } else
426 command |= PCIM_CMD_MEMEN;
427 } else {
428 printk("aic7xxx: PCI%d:%d:%d MEM region 0x%llx "
429 "unavailable. Cannot memory map device.\n",
430 ahc_get_pci_bus(ahc->dev_softc),
431 ahc_get_pci_slot(ahc->dev_softc),
432 ahc_get_pci_function(ahc->dev_softc),
433 (unsigned long long)base);
434 }
435
436 /*
437 * We always prefer memory mapped access.
438 */
439 if (maddr == NULL) {
440
441 error = ahc_linux_pci_reserve_io_region(ahc, &base);
442 if (error == 0) {
443 ahc->tag = BUS_SPACE_PIO;
444 ahc->bsh.ioport = (u_long)base;
445 command |= PCIM_CMD_PORTEN;
446 } else {
447 printk("aic7xxx: PCI%d:%d:%d IO region 0x%llx[0..255] "
448 "unavailable. Cannot map device.\n",
449 ahc_get_pci_bus(ahc->dev_softc),
450 ahc_get_pci_slot(ahc->dev_softc),
451 ahc_get_pci_function(ahc->dev_softc),
452 (unsigned long long)base);
453 }
454 }
455 ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 4);
456 return (error);
457 }
458
459 int
460 ahc_pci_map_int(struct ahc_softc *ahc)
461 {
462 int error;
463
464 error = request_irq(ahc->dev_softc->irq, ahc_linux_isr,
465 IRQF_SHARED, "aic7xxx", ahc);
466 if (error == 0)
467 ahc->platform_data->irq = ahc->dev_softc->irq;
468
469 return (-error);
470 }
471