]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
Merge tag 'drm-intel-next-2022-10-28' of git://anongit.freedesktop.org/drm/drm-intel...
authorDave Airlie <airlied@redhat.com>
Tue, 1 Nov 2022 07:48:12 +0000 (17:48 +1000)
committerDave Airlie <airlied@redhat.com>
Tue, 1 Nov 2022 07:48:17 +0000 (17:48 +1000)
- Hotplug code clean-up and organization (Jani, Gustavo)
- More VBT specific code clean-up, doc, organization,
  and improvements (Ville)
- More MTL enabling work (Matt, RK, Anusha, Jose)
- FBC related clean-ups and improvements (Ville)
- Removing unused sw_fence_await_reservation (Niranjana)
- Big chunch of display house clean-up (Ville)
- Many Watermark fixes and clean-ups (Ville)
- Fix device info for devices without display (Jani)
- Fix TC port PLLs after readout (Ville)
- DPLL ID clean-ups (Ville)
- Prep work for finishing (de)gamma readout (Ville)
- PSR fixes and improvements (Jouni, Jose)
- Reject excessive dotclocks early (Ville)
- DRRS related improvements (Ville)
- Simplify uncore register updates (Andrzej)
- Fix simulated GPU reset wrt. encoder HW readout (Imre)
- Add a ADL-P workaround (Jose)
- Fix clear mask in GEN7_MISCCPCTL update (Andrzej)
- Temporarily disable runtime_pm for discrete (Anshuman)
- Improve fbdev debugs (Nirmoy)
- Fix DP FRL link training status (Ankit)
- Other small display fixes (Ankit, Suraj)
- Allow panel fixed modes to have differing sync
  polarities (Ville)
- Clean up crtc state flag checks (Ville)
- Fix race conditions during DKL PHY accesses (Imre)
- Prep-work for cdclock squash and crawl modes (Anusha)
- ELD precompute and readout (Ville)

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/Y1wd6ZJ8LdJpCfZL@intel.com
18 files changed:
1  2 
drivers/gpu/drm/i915/Makefile
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display.h
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_fb.c
drivers/gpu/drm/i915/display/intel_fbdev.c
drivers/gpu/drm/i915/display/intel_hdmi.c
drivers/gpu/drm/i915/gt/intel_gt_regs.h
drivers/gpu/drm/i915/gt/intel_workarounds.c
drivers/gpu/drm/i915/i915_driver.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_pci.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_device_info.h
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_uncore.h
drivers/gpu/drm/i915/pxp/intel_pxp_session.c

Simple merge
index c459eb362c47f7e505c920d6736ee361566f46ed,5802be24a22f46ed9474895fd9cbf2b3cc88f730..298ed36f078a8fee225f74d268e532af585ab3ae
@@@ -337,10 -324,11 +337,11 @@@ static int i915_driver_early_probe(stru
        if (i915_inject_probe_failure(dev_priv))
                return -ENODEV;
  
-       intel_device_info_subplatform_init(dev_priv);
+       intel_device_info_runtime_init_early(dev_priv);
        intel_step_init(dev_priv);
  
 -      intel_uncore_mmio_debug_init_early(&dev_priv->mmio_debug);
 +      intel_uncore_mmio_debug_init_early(dev_priv);
  
        spin_lock_init(&dev_priv->irq_lock);
        spin_lock_init(&dev_priv->gpu_error.lock);
@@@ -738,10 -717,6 +740,9 @@@ static void i915_driver_hw_remove(struc
   */
  static void i915_driver_register(struct drm_i915_private *dev_priv)
  {
-       struct drm_device *dev = &dev_priv->drm;
 +      struct intel_gt *gt;
 +      unsigned int i;
 +
        i915_gem_driver_register(dev_priv);
        i915_pmu_register(dev_priv);
  
Simple merge
Simple merge
index cd4487a1d3be0f5b5b4d9f476f1a89cd04b7f1fb,7676ce5f7379b2b61088935efd6938b4a82d05f6..9486127a44f7945957505d992addae22fd4b9dfa
@@@ -1142,8 -1129,8 +1143,9 @@@ static const struct intel_device_info m
        .__runtime.media.ip.ver = 13,
        PLATFORM(INTEL_METEORLAKE),
        .display.has_modular_fia = 1,
 +      .extra_gt_list = xelpmp_extra_gt,
        .has_flat_ccs = 0,
+       .has_gmd_id = 1,
        .has_snoop = 1,
        .__runtime.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
        .__runtime.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
Simple merge
Simple merge
Simple merge