queue-4.14/powerpc-fsl-add-barrier_nospec-implementation-for-nxp-powerpc-book3e.patch

   1 From foo@baz Fri Mar 29 15:53:50 CET 2019
   2 From: Michael Ellerman <mpe@ellerman.id.au>
   3 Date: Fri, 29 Mar 2019 22:26:01 +1100
   4 Subject: powerpc/fsl: Add barrier_nospec implementation for NXP PowerPC Book3E
   5 To: stable@vger.kernel.org, gregkh@linuxfoundation.org
   6 Cc: linuxppc-dev@ozlabs.org, diana.craciun@nxp.com, msuchanek@suse.de, christophe.leroy@c-s.fr
   7 Message-ID: <20190329112620.14489-14-mpe@ellerman.id.au>
   8
   9 From: Diana Craciun <diana.craciun@nxp.com>
  10
  11 commit ebcd1bfc33c7a90df941df68a6e5d4018c022fba upstream.
  12
  13 Implement the barrier_nospec as a isync;sync instruction sequence.
  14 The implementation uses the infrastructure built for BOOK3S 64.
  15
  16 Signed-off-by: Diana Craciun <diana.craciun@nxp.com>
  17 [mpe: Split out of larger patch]
  18 Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
  19 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  20 ---
  21  arch/powerpc/Kconfig               |    2 +-
  22  arch/powerpc/include/asm/barrier.h |    8 +++++++-
  23  arch/powerpc/lib/feature-fixups.c  |   31 +++++++++++++++++++++++++++++++
  24  3 files changed, 39 insertions(+), 2 deletions(-)
  25
  26 --- a/arch/powerpc/Kconfig
  27 +++ b/arch/powerpc/Kconfig
  28 @@ -239,7 +239,7 @@ config PPC
  29  config PPC_BARRIER_NOSPEC
  30      bool
  31      default y
  32 -    depends on PPC_BOOK3S_64
  33 +    depends on PPC_BOOK3S_64 || PPC_FSL_BOOK3E
  34
  35  config GENERIC_CSUM
  36         def_bool n
  37 --- a/arch/powerpc/include/asm/barrier.h
  38 +++ b/arch/powerpc/include/asm/barrier.h
  39 @@ -76,12 +76,18 @@ do {                                                                        \
  40         ___p1;                                                          \
  41  })
  42
  43 +#ifdef CONFIG_PPC_BOOK3S_64
  44 +#define NOSPEC_BARRIER_SLOT   nop
  45 +#elif defined(CONFIG_PPC_FSL_BOOK3E)
  46 +#define NOSPEC_BARRIER_SLOT   nop; nop
  47 +#endif
  48 +
  49  #ifdef CONFIG_PPC_BARRIER_NOSPEC
  50  /*
  51   * Prevent execution of subsequent instructions until preceding branches have
  52   * been fully resolved and are no longer executing speculatively.
  53   */
  54 -#define barrier_nospec_asm NOSPEC_BARRIER_FIXUP_SECTION; nop
  55 +#define barrier_nospec_asm NOSPEC_BARRIER_FIXUP_SECTION; NOSPEC_BARRIER_SLOT
  56
  57  // This also acts as a compiler barrier due to the memory clobber.
  58  #define barrier_nospec() asm (stringify_in_c(barrier_nospec_asm) ::: "memory")
  59 --- a/arch/powerpc/lib/feature-fixups.c
  60 +++ b/arch/powerpc/lib/feature-fixups.c
  61 @@ -318,6 +318,37 @@ void do_barrier_nospec_fixups(bool enabl
  62  }
  63  #endif /* CONFIG_PPC_BARRIER_NOSPEC */
  64
  65 +#ifdef CONFIG_PPC_FSL_BOOK3E
  66 +void do_barrier_nospec_fixups_range(bool enable, void *fixup_start, void *fixup_end)
  67 +{
  68 +       unsigned int instr[2], *dest;
  69 +       long *start, *end;
  70 +       int i;
  71 +
  72 +       start = fixup_start;
  73 +       end = fixup_end;
  74 +
  75 +       instr[0] = PPC_INST_NOP;
  76 +       instr[1] = PPC_INST_NOP;
  77 +
  78 +       if (enable) {
  79 +               pr_info("barrier-nospec: using isync; sync as speculation barrier\n");
  80 +               instr[0] = PPC_INST_ISYNC;
  81 +               instr[1] = PPC_INST_SYNC;
  82 +       }
  83 +
  84 +       for (i = 0; start < end; start++, i++) {
  85 +               dest = (void *)start + *start;
  86 +
  87 +               pr_devel("patching dest %lx\n", (unsigned long)dest);
  88 +               patch_instruction(dest, instr[0]);
  89 +               patch_instruction(dest + 1, instr[1]);
  90 +       }
  91 +
  92 +       printk(KERN_DEBUG "barrier-nospec: patched %d locations\n", i);
  93 +}
  94 +#endif /* CONFIG_PPC_FSL_BOOK3E */
  95 +
  96  void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
  97  {
  98         long *start, *end;