1 From b2ed3563c8032b7efe6568e3e83959ee8b334f0c Mon Sep 17 00:00:00 2001
2 From: Matthew Whitehead <tedheadster@gmail.com>
3 Date: Thu, 14 Mar 2019 16:46:00 -0400
4 Subject: x86/cpu/cyrix: Use correct macros for Cyrix calls on Geode processors
6 [ Upstream commit 18fb053f9b827bd98cfc64f2a35df8ab19745a1d ]
8 There are comments in processor-cyrix.h advising you to _not_ make calls
9 using the deprecated macros in this style:
11 setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x80);
13 This is because it expands the macro into a non-functioning calling
14 sequence. The calling order must be:
16 outb(CX86_CCR2, 0x22);
21 * When using the old macros a line like
22 * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
25 * outb((CX86_CCR2), 0x22);
27 * outb((CX86_CCR2), 0x22);
32 The new macros fix this problem, so use them instead. Tested on an
33 actual Geode processor.
35 Signed-off-by: Matthew Whitehead <tedheadster@gmail.com>
36 Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
38 Link: https://lkml.kernel.org/r/1552596361-8967-2-git-send-email-tedheadster@gmail.com
39 Signed-off-by: Sasha Levin <sashal@kernel.org>
41 arch/x86/kernel/cpu/cyrix.c | 14 +++++++-------
42 1 file changed, 7 insertions(+), 7 deletions(-)
44 diff --git a/arch/x86/kernel/cpu/cyrix.c b/arch/x86/kernel/cpu/cyrix.c
45 index 8949b7ae6d92..fa61c870ada9 100644
46 --- a/arch/x86/kernel/cpu/cyrix.c
47 +++ b/arch/x86/kernel/cpu/cyrix.c
48 @@ -124,7 +124,7 @@ static void set_cx86_reorder(void)
49 setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
51 /* Load/Store Serialize to mem access disable (=reorder it) */
52 - setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80);
53 + setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80);
54 /* set load/store serialize from 1GB to 4GB */
56 setCx86(CX86_CCR3, ccr3);
57 @@ -135,11 +135,11 @@ static void set_cx86_memwb(void)
58 pr_info("Enable Memory-Write-back mode on Cyrix/NSC processor.\n");
60 /* CCR2 bit 2: unlock NW bit */
61 - setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) & ~0x04);
62 + setCx86(CX86_CCR2, getCx86(CX86_CCR2) & ~0x04);
63 /* set 'Not Write-through' */
64 write_cr0(read_cr0() | X86_CR0_NW);
65 /* CCR2 bit 2: lock NW bit and set WT1 */
66 - setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x14);
67 + setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x14);
71 @@ -153,14 +153,14 @@ static void geode_configure(void)
72 local_irq_save(flags);
74 /* Suspend on halt power saving and enable #SUSP pin */
75 - setCx86_old(CX86_CCR2, getCx86_old(CX86_CCR2) | 0x88);
76 + setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
78 ccr3 = getCx86(CX86_CCR3);
79 setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */
82 /* FPU fast, DTE cache, Mem bypass */
83 - setCx86_old(CX86_CCR4, getCx86_old(CX86_CCR4) | 0x38);
84 + setCx86(CX86_CCR4, getCx86(CX86_CCR4) | 0x38);
85 setCx86(CX86_CCR3, ccr3); /* disable MAPEN */
88 @@ -296,7 +296,7 @@ static void init_cyrix(struct cpuinfo_x86 *c)
89 /* GXm supports extended cpuid levels 'ala' AMD */
90 if (c->cpuid_level == 2) {
91 /* Enable cxMMX extensions (GX1 Datasheet 54) */
92 - setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7) | 1);
93 + setCx86(CX86_CCR7, getCx86(CX86_CCR7) | 1);
96 * GXm : 0x30 ... 0x5f GXm datasheet 51
97 @@ -319,7 +319,7 @@ static void init_cyrix(struct cpuinfo_x86 *c)
99 dir0_msn++; /* M II */
100 /* Enable MMX extensions (App note 108) */
101 - setCx86_old(CX86_CCR7, getCx86_old(CX86_CCR7)|1);
102 + setCx86(CX86_CCR7, getCx86(CX86_CCR7)|1);
104 /* A 6x86MX - it has the bug. */
105 set_cpu_bug(c, X86_BUG_COMA);