queue-4.19/arm64-dts-rockchip-fix-rk3328-rgmii-high-tx-error-rate.patch

   1 From 6fd8b9780ec1a49ac46e0aaf8775247205e66231 Mon Sep 17 00:00:00 2001
   2 From: Peter Geis <pgwipeout@gmail.com>
   3 Date: Wed, 13 Mar 2019 18:45:36 +0000
   4 Subject: arm64: dts: rockchip: fix rk3328 rgmii high tx error rate
   5
   6 From: Peter Geis <pgwipeout@gmail.com>
   7
   8 commit 6fd8b9780ec1a49ac46e0aaf8775247205e66231 upstream.
   9
  10 Several rk3328 based boards experience high rgmii tx error rates.
  11 This is due to several pins in the rk3328.dtsi rgmii pinmux that are
  12 missing a defined pull strength setting.
  13 This causes the pinmux driver to default to 2ma (bit mask 00).
  14
  15 These pins are only defined in the rk3328.dtsi, and are not listed in
  16 the rk3328 specification.
  17 The TRM only lists them as "Reserved"
  18 (RK3328 TRM V1.1, 3.3.3 Detail Register Description, GRF_GPIO0B_IOMUX,
  19 GRF_GPIO0C_IOMUX, GRF_GPIO0D_IOMUX).
  20 However, removal of these pins from the rgmii pinmux definition causes
  21 the interface to fail to transmit.
  22
  23 Also, the rgmii tx and rx pins defined in the dtsi are not consistent
  24 with the rk3328 specification, with tx pins currently set to 12ma and
  25 rx pins set to 2ma.
  26
  27 Fix this by setting tx pins to 8ma and the rx pins to 4ma, consistent
  28 with the specification.
  29 Defining the drive strength for the undefined pins eliminated the high
  30 tx packet error rate observed under heavy data transfers.
  31 Aligning the drive strength to the TRM values eliminated the occasional
  32 packet retry errors under iperf3 testing.
  33 This allows much higher data rates with no recorded tx errors.
  34
  35 Tested on the rk3328-roc-cc board.
  36
  37 Fixes: 52e02d377a72 ("arm64: dts: rockchip: add core dtsi file for RK3328 SoCs")
  38 Cc: stable@vger.kernel.org
  39 Signed-off-by: Peter Geis <pgwipeout@gmail.com>
  40 Signed-off-by: Heiko Stuebner <heiko@sntech.de>
  41 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  42
  43 ---
  44  arch/arm64/boot/dts/rockchip/rk3328.dtsi |   44 +++++++++++++++----------------
  45  1 file changed, 22 insertions(+), 22 deletions(-)
  46
  47 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
  48 +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
  49 @@ -1553,50 +1553,50 @@
  50                         rgmiim1_pins: rgmiim1-pins {
  51                                 rockchip,pins =
  52                                         /* mac_txclk */
  53 -                                       <1 RK_PB4 2 &pcfg_pull_none_12ma>,
  54 +                                       <1 RK_PB4 2 &pcfg_pull_none_8ma>,
  55                                         /* mac_rxclk */
  56 -                                       <1 RK_PB5 2 &pcfg_pull_none_2ma>,
  57 +                                       <1 RK_PB5 2 &pcfg_pull_none_4ma>,
  58                                         /* mac_mdio */
  59 -                                       <1 RK_PC3 2 &pcfg_pull_none_2ma>,
  60 +                                       <1 RK_PC3 2 &pcfg_pull_none_4ma>,
  61                                         /* mac_txen */
  62 -                                       <1 RK_PD1 2 &pcfg_pull_none_12ma>,
  63 +                                       <1 RK_PD1 2 &pcfg_pull_none_8ma>,
  64                                         /* mac_clk */
  65 -                                       <1 RK_PC5 2 &pcfg_pull_none_2ma>,
  66 +                                       <1 RK_PC5 2 &pcfg_pull_none_4ma>,
  67                                         /* mac_rxdv */
  68 -                                       <1 RK_PC6 2 &pcfg_pull_none_2ma>,
  69 +                                       <1 RK_PC6 2 &pcfg_pull_none_4ma>,
  70                                         /* mac_mdc */
  71 -                                       <1 RK_PC7 2 &pcfg_pull_none_2ma>,
  72 +                                       <1 RK_PC7 2 &pcfg_pull_none_4ma>,
  73                                         /* mac_rxd1 */
  74 -                                       <1 RK_PB2 2 &pcfg_pull_none_2ma>,
  75 +                                       <1 RK_PB2 2 &pcfg_pull_none_4ma>,
  76                                         /* mac_rxd0 */
  77 -                                       <1 RK_PB3 2 &pcfg_pull_none_2ma>,
  78 +                                       <1 RK_PB3 2 &pcfg_pull_none_4ma>,
  79                                         /* mac_txd1 */
  80 -                                       <1 RK_PB0 2 &pcfg_pull_none_12ma>,
  81 +                                       <1 RK_PB0 2 &pcfg_pull_none_8ma>,
  82                                         /* mac_txd0 */
  83 -                                       <1 RK_PB1 2 &pcfg_pull_none_12ma>,
  84 +                                       <1 RK_PB1 2 &pcfg_pull_none_8ma>,
  85                                         /* mac_rxd3 */
  86 -                                       <1 RK_PB6 2 &pcfg_pull_none_2ma>,
  87 +                                       <1 RK_PB6 2 &pcfg_pull_none_4ma>,
  88                                         /* mac_rxd2 */
  89 -                                       <1 RK_PB7 2 &pcfg_pull_none_2ma>,
  90 +                                       <1 RK_PB7 2 &pcfg_pull_none_4ma>,
  91                                         /* mac_txd3 */
  92 -                                       <1 RK_PC0 2 &pcfg_pull_none_12ma>,
  93 +                                       <1 RK_PC0 2 &pcfg_pull_none_8ma>,
  94                                         /* mac_txd2 */
  95 -                                       <1 RK_PC1 2 &pcfg_pull_none_12ma>,
  96 +                                       <1 RK_PC1 2 &pcfg_pull_none_8ma>,
  97
  98                                         /* mac_txclk */
  99 -                                       <0 RK_PB0 1 &pcfg_pull_none>,
 100 +                                       <0 RK_PB0 1 &pcfg_pull_none_8ma>,
 101                                         /* mac_txen */
 102 -                                       <0 RK_PB4 1 &pcfg_pull_none>,
 103 +                                       <0 RK_PB4 1 &pcfg_pull_none_8ma>,
 104                                         /* mac_clk */
 105 -                                       <0 RK_PD0 1 &pcfg_pull_none>,
 106 +                                       <0 RK_PD0 1 &pcfg_pull_none_4ma>,
 107                                         /* mac_txd1 */
 108 -                                       <0 RK_PC0 1 &pcfg_pull_none>,
 109 +                                       <0 RK_PC0 1 &pcfg_pull_none_8ma>,
 110                                         /* mac_txd0 */
 111 -                                       <0 RK_PC1 1 &pcfg_pull_none>,
 112 +                                       <0 RK_PC1 1 &pcfg_pull_none_8ma>,
 113                                         /* mac_txd3 */
 114 -                                       <0 RK_PC7 1 &pcfg_pull_none>,
 115 +                                       <0 RK_PC7 1 &pcfg_pull_none_8ma>,
 116                                         /* mac_txd2 */
 117 -                                       <0 RK_PC6 1 &pcfg_pull_none>;
 118 +                                       <0 RK_PC6 1 &pcfg_pull_none_8ma>;
 119                         };
 120
 121                         rmiim1_pins: rmiim1-pins {