queue-4.19/drm-i915-gvt-do-not-let-pin-count-of-shadow-mm-go-ne.patch

   1 From 53aa4978d19ae2e80cfa8f70f3b18b96c1b4c018 Mon Sep 17 00:00:00 2001
   2 From: Yan Zhao <yan.y.zhao@intel.com>
   3 Date: Wed, 27 Mar 2019 00:55:45 -0400
   4 Subject: drm/i915/gvt: do not let pin count of shadow mm go negative
   5
   6 [ Upstream commit 663a50ceac75c2208d2ad95365bc8382fd42f44d ]
   7
   8 shadow mm's pin count got increased in workload preparation phase, which
   9 is after workload scanning.
  10 it will get decreased in complete_current_workload() anyway after
  11 workload completion.
  12 Sometimes, if a workload meets a scanning error, its shadow mm pin count
  13 will not get increased but will get decreased in the end.
  14 This patch lets shadow mm's pin count not go below 0.
  15
  16 Fixes: 2707e4446688 ("drm/i915/gvt: vGPU graphics memory virtualization")
  17 Cc: zhenyuw@linux.intel.com
  18 Cc: stable@vger.kernel.org #4.14+
  19 Signed-off-by: Yan Zhao <yan.y.zhao@intel.com>
  20 Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
  21 Signed-off-by: Sasha Levin <sashal@kernel.org>
  22 ---
  23  drivers/gpu/drm/i915/gvt/gtt.c | 2 +-
  24  1 file changed, 1 insertion(+), 1 deletion(-)
  25
  26 diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
  27 index 00aad8164dec..542f31ce108f 100644
  28 --- a/drivers/gpu/drm/i915/gvt/gtt.c
  29 +++ b/drivers/gpu/drm/i915/gvt/gtt.c
  30 @@ -1940,7 +1940,7 @@ void _intel_vgpu_mm_release(struct kref *mm_ref)
  31   */
  32  void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm)
  33  {
  34 -       atomic_dec(&mm->pincount);
  35 +       atomic_dec_if_positive(&mm->pincount);
  36  }
  37
  38  /**
  39 --
  40 2.19.1
  41