queue-4.19/pinctrl-meson-meson8b-add-the-eth_rxd2-and-eth_rxd3-.patch

   1 From 87c21772c7708507a914745acd1b21013f2cab98 Mon Sep 17 00:00:00 2001
   2 From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
   3 Date: Sat, 12 Jan 2019 13:59:13 +0100
   4 Subject: pinctrl: meson: meson8b: add the eth_rxd2 and eth_rxd3 pins
   5
   6 [ Upstream commit 6daae00243e622dd3feec7965bfe421ad6dd317e ]
   7
   8 Gigabit Ethernet requires the Ethernet TXD0..3 and RXD0..3 data lines.
   9 Add the missing eth_rxd2 and eth_rxd3 definitions so we don't have to
  10 rely on the bootloader to set them up correctly.
  11
  12 The vendor u-boot sources for Odroid-C1 use the following Ethernet
  13 pinmux configuration:
  14   SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_6, 0x3f4f);
  15   SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_7, 0xf00000);
  16 This translates to the following pin groups in the mainline kernel:
  17 - register 6 bit  0: eth_rxd1 (DIF_0_P)
  18 - register 6 bit  1: eth_rxd0 (DIF_0_N)
  19 - register 6 bit  2: eth_rx_dv (DIF_1_P)
  20 - register 6 bit  3: eth_rx_clk (DIF_1_N)
  21 - register 6 bit  6: eth_tx_en (DIF_3_P)
  22 - register 6 bit  8: eth_ref_clk (DIF_3_N)
  23 - register 6 bit  9: eth_mdc (DIF_4_P)
  24 - register 6 bit 10: eth_mdio_en (DIF_4_N)
  25 - register 6 bit 11: eth_tx_clk (GPIOH_9)
  26 - register 6 bit 12: eth_txd2 (GPIOH_8)
  27 - register 6 bit 13: eth_txd3 (GPIOH_7)
  28 - register 7 bit 20: eth_txd0_0 (GPIOH_6)
  29 - register 7 bit 21: eth_txd1_0 (GPIOH_5)
  30 - register 7 bit 22: eth_rxd3 (DIF_2_P)
  31 - register 7 bit 23: eth_rxd2 (DIF_2_N)
  32
  33 All functions except eth_rxd2 and eth_rxd3 are already supported by the
  34 pinctrl-meson8b driver.
  35
  36 Suggested-by: Jianxin Pan <jianxin.pan@amlogic.com>
  37 Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
  38 Reviewed-by: Kevin Hilman <khilman@baylibre.com>
  39 Tested-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
  40 Reviewed-by: Emiliano Ingrassia <ingrassia@epigenesys.com>
  41 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  42 Signed-off-by: Sasha Levin <sashal@kernel.org>
  43 ---
  44  drivers/pinctrl/meson/pinctrl-meson8b.c | 6 +++++-
  45  1 file changed, 5 insertions(+), 1 deletion(-)
  46
  47 diff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c
  48 index ead4beb5f55f..036124fd363c 100644
  49 --- a/drivers/pinctrl/meson/pinctrl-meson8b.c
  50 +++ b/drivers/pinctrl/meson/pinctrl-meson8b.c
  51 @@ -346,6 +346,8 @@ static const unsigned int eth_rx_dv_pins[]  = { DIF_1_P };
  52  static const unsigned int eth_rx_clk_pins[]    = { DIF_1_N };
  53  static const unsigned int eth_txd0_1_pins[]    = { DIF_2_P };
  54  static const unsigned int eth_txd1_1_pins[]    = { DIF_2_N };
  55 +static const unsigned int eth_rxd3_pins[]      = { DIF_2_P };
  56 +static const unsigned int eth_rxd2_pins[]      = { DIF_2_N };
  57  static const unsigned int eth_tx_en_pins[]     = { DIF_3_P };
  58  static const unsigned int eth_ref_clk_pins[]   = { DIF_3_N };
  59  static const unsigned int eth_mdc_pins[]       = { DIF_4_P };
  60 @@ -571,6 +573,8 @@ static struct meson_pmx_group meson8b_cbus_groups[] = {
  61         GROUP(eth_ref_clk,      6,      8),
  62         GROUP(eth_mdc,          6,      9),
  63         GROUP(eth_mdio_en,      6,      10),
  64 +       GROUP(eth_rxd3,         7,      22),
  65 +       GROUP(eth_rxd2,         7,      23),
  66  };
  67
  68  static struct meson_pmx_group meson8b_aobus_groups[] = {
  69 @@ -720,7 +724,7 @@ static const char * const ethernet_groups[] = {
  70         "eth_tx_clk", "eth_tx_en", "eth_txd1_0", "eth_txd1_1",
  71         "eth_txd0_0", "eth_txd0_1", "eth_rx_clk", "eth_rx_dv",
  72         "eth_rxd1", "eth_rxd0", "eth_mdio_en", "eth_mdc", "eth_ref_clk",
  73 -       "eth_txd2", "eth_txd3"
  74 +       "eth_txd2", "eth_txd3", "eth_rxd3", "eth_rxd2"
  75  };
  76
  77  static const char * const i2c_a_groups[] = {
  78 --
  79 2.19.1
  80