queue-5.1/dmaengine-mediatek-cqdma-sleeping-in-atomic-context.patch

   1 From d0f2964f7c4b9ac799a379e7c6dc966bfd654d43 Mon Sep 17 00:00:00 2001
   2 From: Dan Carpenter <dan.carpenter@oracle.com>
   3 Date: Thu, 9 May 2019 13:09:23 +0300
   4 Subject: dmaengine: mediatek-cqdma: sleeping in atomic context
   5
   6 [ Upstream commit 069b3c4214f27b130d0642f32438560db30f452e ]
   7
   8 The mtk_cqdma_poll_engine_done() function takes a true/false parameter
   9 where true means it's called from atomic context.  There are a couple
  10 places where it was set to false but it's actually in atomic context
  11 so it should be true.
  12
  13 All the callers for mtk_cqdma_hard_reset() are holding a spin_lock and
  14 in mtk_cqdma_free_chan_resources() we take a spin_lock before calling
  15 the mtk_cqdma_poll_engine_done() function.
  16
  17 Fixes: b1f01e48df5a ("dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoC")
  18 Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
  19 Signed-off-by: Vinod Koul <vkoul@kernel.org>
  20 Signed-off-by: Sasha Levin <sashal@kernel.org>
  21 ---
  22  drivers/dma/mediatek/mtk-cqdma.c | 4 ++--
  23  1 file changed, 2 insertions(+), 2 deletions(-)
  24
  25 diff --git a/drivers/dma/mediatek/mtk-cqdma.c b/drivers/dma/mediatek/mtk-cqdma.c
  26 index 814853842e29..723b11c190b3 100644
  27 --- a/drivers/dma/mediatek/mtk-cqdma.c
  28 +++ b/drivers/dma/mediatek/mtk-cqdma.c
  29 @@ -225,7 +225,7 @@ static int mtk_cqdma_hard_reset(struct mtk_cqdma_pchan *pc)
  30         mtk_dma_set(pc, MTK_CQDMA_RESET, MTK_CQDMA_HARD_RST_BIT);
  31         mtk_dma_clr(pc, MTK_CQDMA_RESET, MTK_CQDMA_HARD_RST_BIT);
  32
  33 -       return mtk_cqdma_poll_engine_done(pc, false);
  34 +       return mtk_cqdma_poll_engine_done(pc, true);
  35  }
  36
  37  static void mtk_cqdma_start(struct mtk_cqdma_pchan *pc,
  38 @@ -671,7 +671,7 @@ static void mtk_cqdma_free_chan_resources(struct dma_chan *c)
  39                 mtk_dma_set(cvc->pc, MTK_CQDMA_FLUSH, MTK_CQDMA_FLUSH_BIT);
  40
  41                 /* wait for the completion of flush operation */
  42 -               if (mtk_cqdma_poll_engine_done(cvc->pc, false) < 0)
  43 +               if (mtk_cqdma_poll_engine_done(cvc->pc, true) < 0)
  44                         dev_err(cqdma2dev(to_cqdma_dev(c)), "cqdma flush timeout\n");
  45
  46                 /* clear the flush bit and interrupt flag */
  47 --
  48 2.20.1
  49