1 From 8458b480cd451b18f9c59042d804721b506cb9d7 Mon Sep 17 00:00:00 2001
2 From: Jianguo Chen <chenjianguo3@huawei.com>
3 Date: Wed, 20 Mar 2019 18:54:21 +0000
4 Subject: irqchip/mbigen: Don't clear eventid when freeing an MSI
6 [ Upstream commit fca269f201a8d9985c0a31fb60b15d4eb57cef80 ]
8 mbigen_write_msg clears eventid bits of a mbigen register
9 when free a interrupt, because msi_domain_deactivate memset
10 struct msg to zero. Then multiple mbigen pins with zero eventid
11 will report the same interrupt number.
13 The eventid clear call trace:
17 irq_domain_deactivate_irq
18 __irq_domain_deactivate_irq
19 __irq_domain_deactivate_irq
21 platform_msi_write_msg
24 Signed-off-by: Jianguo Chen <chenjianguo3@huawei.com>
25 [maz: massaged subject]
26 Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
27 Signed-off-by: Sasha Levin <sashal@kernel.org>
29 drivers/irqchip/irq-mbigen.c | 3 +++
30 1 file changed, 3 insertions(+)
32 diff --git a/drivers/irqchip/irq-mbigen.c b/drivers/irqchip/irq-mbigen.c
33 index 05d87f60d929..406bfe618448 100644
34 --- a/drivers/irqchip/irq-mbigen.c
35 +++ b/drivers/irqchip/irq-mbigen.c
36 @@ -160,6 +160,9 @@ static void mbigen_write_msg(struct msi_desc *desc, struct msi_msg *msg)
37 void __iomem *base = d->chip_data;
40 + if (!msg->address_lo && !msg->address_hi)
43 base += get_mbigen_vec_reg(d->hwirq);
44 val = readl_relaxed(base);