releases/5.1.7/cxgb4-revert-cxgb4-remove-sge_host_page_size-dependency-on-page-size.patch

   1 From foo@baz Fri 31 May 2019 03:16:39 PM PDT
   2 From: Vishal Kulkarni <vishal@chelsio.com>
   3 Date: Thu, 23 May 2019 08:07:21 +0530
   4 Subject: cxgb4: Revert "cxgb4: Remove SGE_HOST_PAGE_SIZE dependency on page size"
   5
   6 From: Vishal Kulkarni <vishal@chelsio.com>
   7
   8 [ Upstream commit ab0610efabb4c4f419a531455708caf1dd29357e ]
   9
  10 This reverts commit 2391b0030e241386d710df10e53e2cfc3c5d4fc1 which has
  11 introduced regression. Now SGE's BAR2 Doorbell/GTS Page Size is
  12 interpreted correctly in the firmware itself by using actual host
  13 page size. Hence previous commit needs to be reverted.
  14
  15 Signed-off-by: Vishal Kulkarni <vishal@chelsio.com>
  16 Signed-off-by: David S. Miller <davem@davemloft.net>
  17 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  18 ---
  19  drivers/net/ethernet/chelsio/cxgb4/t4_hw.c |   11 +++++++++++
  20  1 file changed, 11 insertions(+)
  21
  22 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
  23 +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
  24 @@ -7206,10 +7206,21 @@ int t4_fixup_host_params(struct adapter
  25                          unsigned int cache_line_size)
  26  {
  27         unsigned int page_shift = fls(page_size) - 1;
  28 +       unsigned int sge_hps = page_shift - 10;
  29         unsigned int stat_len = cache_line_size > 64 ? 128 : 64;
  30         unsigned int fl_align = cache_line_size < 32 ? 32 : cache_line_size;
  31         unsigned int fl_align_log = fls(fl_align) - 1;
  32
  33 +       t4_write_reg(adap, SGE_HOST_PAGE_SIZE_A,
  34 +                    HOSTPAGESIZEPF0_V(sge_hps) |
  35 +                    HOSTPAGESIZEPF1_V(sge_hps) |
  36 +                    HOSTPAGESIZEPF2_V(sge_hps) |
  37 +                    HOSTPAGESIZEPF3_V(sge_hps) |
  38 +                    HOSTPAGESIZEPF4_V(sge_hps) |
  39 +                    HOSTPAGESIZEPF5_V(sge_hps) |
  40 +                    HOSTPAGESIZEPF6_V(sge_hps) |
  41 +                    HOSTPAGESIZEPF7_V(sge_hps));
  42 +
  43         if (is_t4(adap->params.chip)) {
  44                 t4_set_reg_field(adap, SGE_CONTROL_A,
  45                                  INGPADBOUNDARY_V(INGPADBOUNDARY_M) |