--- /dev/null
+From 30d62d4453e49f85dd17b2ba60bbb68b6593dba0 Mon Sep 17 00:00:00 2001
+From: Andres Rodriguez <andresx7@gmail.com>
+Date: Thu, 2 May 2019 15:31:57 -0400
+Subject: drm: add non-desktop quirk for Valve HMDs
+
+From: Andres Rodriguez <andresx7@gmail.com>
+
+commit 30d62d4453e49f85dd17b2ba60bbb68b6593dba0 upstream.
+
+Add vendor/product pairs for the Valve Index HMDs.
+
+Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
+Cc: Dave Airlie <airlied@redhat.com>
+Cc: <stable@vger.kernel.org> # v4.15
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190502193157.15692-1-andresx7@gmail.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_edid.c | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/drivers/gpu/drm/drm_edid.c
++++ b/drivers/gpu/drm/drm_edid.c
+@@ -172,6 +172,25 @@ static const struct edid_quirk {
+ /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
+ { "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
+
++ /* Valve Index Headset */
++ { "VLV", 0x91a8, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b0, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b1, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b2, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b3, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b4, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b5, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b6, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b7, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b8, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91b9, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91ba, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bb, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bc, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bd, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91be, EDID_QUIRK_NON_DESKTOP },
++ { "VLV", 0x91bf, EDID_QUIRK_NON_DESKTOP },
++
+ /* HTC Vive and Vive Pro VR Headsets */
+ { "HVR", 0xaa01, EDID_QUIRK_NON_DESKTOP },
+ { "HVR", 0xaa02, EDID_QUIRK_NON_DESKTOP },
--- /dev/null
+From 29054230f3e11ea818eccfa7bb4e4b3e89544164 Mon Sep 17 00:00:00 2001
+From: Ryan Pavlik <ryan.pavlik@collabora.com>
+Date: Mon, 3 Dec 2018 10:46:44 -0600
+Subject: drm: add non-desktop quirks to Sensics and OSVR headsets.
+
+From: Ryan Pavlik <ryan.pavlik@collabora.com>
+
+commit 29054230f3e11ea818eccfa7bb4e4b3e89544164 upstream.
+
+Add two EDID vendor/product pairs used across a variety of
+Sensics products, as well as the OSVR HDK and HDK 2.
+
+Signed-off-by: Ryan Pavlik <ryan.pavlik@collabora.com>
+Signed-off-by: Daniel Stone <daniels@collabora.com>
+Reviewed-by: Daniel Stone <daniels@collabora.com>
+Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
+Link: https://patchwork.freedesktop.org/patch/msgid/20181203164644.13974-1-ryan.pavlik@collabora.com
+Cc: <stable@vger.kernel.org> # v4.15+
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_edid.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/gpu/drm/drm_edid.c
++++ b/drivers/gpu/drm/drm_edid.c
+@@ -212,6 +212,12 @@ static const struct edid_quirk {
+
+ /* Sony PlayStation VR Headset */
+ { "SNY", 0x0704, EDID_QUIRK_NON_DESKTOP },
++
++ /* Sensics VR Headsets */
++ { "SEN", 0x1019, EDID_QUIRK_NON_DESKTOP },
++
++ /* OSVR HDK and HDK2 VR Headsets */
++ { "SVR", 0x1019, EDID_QUIRK_NON_DESKTOP },
+ };
+
+ /*
--- /dev/null
+From ada637e70f96862ff5ba20a169506b58cf567db9 Mon Sep 17 00:00:00 2001
+From: Harry Wentland <harry.wentland@amd.com>
+Date: Tue, 14 May 2019 09:05:37 -0400
+Subject: drm/amd/display: Add ASICREV_IS_PICASSO
+
+From: Harry Wentland <harry.wentland@amd.com>
+
+commit ada637e70f96862ff5ba20a169506b58cf567db9 upstream.
+
+[WHY]
+We only want to load DMCU FW on Picasso and Raven 2, not on Raven 1.
+
+Signed-off-by: Harry Wentland <harry.wentland@amd.com>
+Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/display/include/dal_asic_id.h | 7 ++++---
+ 1 file changed, 4 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/include/dal_asic_id.h
++++ b/drivers/gpu/drm/amd/display/include/dal_asic_id.h
+@@ -138,13 +138,14 @@
+ #endif
+ #define RAVEN_UNKNOWN 0xFF
+
+-#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
+-#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < 0xF0))
+-#endif /* DCN1_01 */
+ #define ASIC_REV_IS_RAVEN(eChipRev) ((eChipRev >= RAVEN_A0) && eChipRev < RAVEN_UNKNOWN)
+ #define RAVEN1_F0 0xF0
+ #define ASICREV_IS_RV1_F0(eChipRev) ((eChipRev >= RAVEN1_F0) && (eChipRev < RAVEN_UNKNOWN))
+
++#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
++#define ASICREV_IS_PICASSO(eChipRev) ((eChipRev >= PICASSO_A0) && (eChipRev < RAVEN2_A0))
++#define ASICREV_IS_RAVEN2(eChipRev) ((eChipRev >= RAVEN2_A0) && (eChipRev < 0xF0))
++#endif /* DCN1_01 */
+
+ #define FAMILY_RV 142 /* DCN 1*/
+
--- /dev/null
+From 332af874db929f92931727bfe191b2c666438c81 Mon Sep 17 00:00:00 2001
+From: Helen Koike <helen.koike@collabora.com>
+Date: Mon, 3 Jun 2019 13:56:07 -0300
+Subject: drm/amd: fix fb references in async update
+
+From: Helen Koike <helen.koike@collabora.com>
+
+commit 332af874db929f92931727bfe191b2c666438c81 upstream.
+
+Async update callbacks are expected to set the old_fb in the new_state
+so prepare/cleanup framebuffers are balanced.
+
+Calling drm_atomic_set_fb_for_plane() (which gets a reference of the new
+fb and put the old fb) is not required, as it's taken care by
+drm_mode_cursor_universal() when calling drm_atomic_helper_update_plane().
+
+Cc: <stable@vger.kernel.org> # v4.20+
+Fixes: 674e78acae0d ("drm/amd/display: Add fast path for cursor plane updates")
+Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
+Signed-off-by: Helen Koike <helen.koike@collabora.com>
+Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190603165610.24614-3-helen.koike@collabora.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -3789,8 +3789,7 @@ static void dm_plane_atomic_async_update
+ struct drm_plane_state *old_state =
+ drm_atomic_get_old_plane_state(new_state->state, plane);
+
+- if (plane->state->fb != new_state->fb)
+- drm_atomic_set_fb_for_plane(plane->state, new_state->fb);
++ swap(plane->state->fb, new_state->fb);
+
+ plane->state->src_x = new_state->src_x;
+ plane->state->src_y = new_state->src_y;
--- /dev/null
+From ce0e22f5d886d1b56c7ab4347c45b9ac5fcc058d Mon Sep 17 00:00:00 2001
+From: Louis Li <Ching-shih.Li@amd.com>
+Date: Sat, 25 May 2019 06:39:47 +0800
+Subject: drm/amdgpu: fix ring test failure issue during s3 in vce 3.0 (V2)
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Louis Li <Ching-shih.Li@amd.com>
+
+commit ce0e22f5d886d1b56c7ab4347c45b9ac5fcc058d upstream.
+
+[What]
+vce ring test fails consistently during resume in s3 cycle, due to
+mismatch read & write pointers.
+On debug/analysis its found that rptr to be compared is not being
+correctly updated/read, which leads to this failure.
+Below is the failure signature:
+ [drm:amdgpu_vce_ring_test_ring] *ERROR* amdgpu: ring 12 test failed
+ [drm:amdgpu_device_ip_resume_phase2] *ERROR* resume of IP block <vce_v3_0> failed -110
+ [drm:amdgpu_device_resume] *ERROR* amdgpu_device_ip_resume failed (-110).
+
+[How]
+fetch rptr appropriately, meaning move its read location further down
+in the code flow.
+With this patch applied the s3 failure is no more seen for >5k s3 cycles,
+which otherwise is pretty consistent.
+
+V2: remove reduntant fetch of rptr
+
+Signed-off-by: Louis Li <Ching-shih.Li@amd.com>
+Reviewed-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
+@@ -1072,7 +1072,7 @@ void amdgpu_vce_ring_emit_fence(struct a
+ int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring)
+ {
+ struct amdgpu_device *adev = ring->adev;
+- uint32_t rptr = amdgpu_ring_get_rptr(ring);
++ uint32_t rptr;
+ unsigned i;
+ int r, timeout = adev->usec_timeout;
+
+@@ -1084,6 +1084,8 @@ int amdgpu_vce_ring_test_ring(struct amd
+ if (r)
+ return r;
+
++ rptr = amdgpu_ring_get_rptr(ring);
++
+ amdgpu_ring_write(ring, VCE_CMD_END);
+ amdgpu_ring_commit(ring);
+
--- /dev/null
+From 9d6fea5744d6798353f37ac42a8a653a2607ca69 Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Wed, 8 May 2019 21:45:06 -0500
+Subject: drm/amdgpu/psp: move psp version specific function pointers to early_init
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 9d6fea5744d6798353f37ac42a8a653a2607ca69 upstream.
+
+In case we need to use them for GPU reset prior initializing the
+asic. Fixes a crash if the driver attempts to reset the GPU at driver
+load time.
+
+Acked-by: Christian König <christian.koenig@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 19 ++++++++++---------
+ 1 file changed, 10 insertions(+), 9 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+@@ -38,18 +38,10 @@ static void psp_set_funcs(struct amdgpu_
+ static int psp_early_init(void *handle)
+ {
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
++ struct psp_context *psp = &adev->psp;
+
+ psp_set_funcs(adev);
+
+- return 0;
+-}
+-
+-static int psp_sw_init(void *handle)
+-{
+- struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+- struct psp_context *psp = &adev->psp;
+- int ret;
+-
+ switch (adev->asic_type) {
+ case CHIP_VEGA10:
+ case CHIP_VEGA12:
+@@ -67,6 +59,15 @@ static int psp_sw_init(void *handle)
+
+ psp->adev = adev;
+
++ return 0;
++}
++
++static int psp_sw_init(void *handle)
++{
++ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
++ struct psp_context *psp = &adev->psp;
++ int ret;
++
+ ret = psp_init_microcode(psp);
+ if (ret) {
+ DRM_ERROR("Failed to load psp firmware!\n");
--- /dev/null
+From bdb1ccb080dafc1b4224873a5b759ff85a7d1c10 Mon Sep 17 00:00:00 2001
+From: Aaron Liu <aaron.liu@amd.com>
+Date: Tue, 30 Apr 2019 09:47:25 +0800
+Subject: drm/amdgpu: remove ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check when hotplug-in
+
+From: Aaron Liu <aaron.liu@amd.com>
+
+commit bdb1ccb080dafc1b4224873a5b759ff85a7d1c10 upstream.
+
+In amdgpu_atif_handler, when hotplug event received, remove
+ATPX_DGPU_REQ_POWER_FOR_DISPLAYS check. This bit's check will cause missing
+system resume.
+
+Signed-off-by: Aaron Liu <aaron.liu@amd.com>
+Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
++++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+@@ -464,8 +464,7 @@ static int amdgpu_atif_handler(struct am
+ }
+ }
+ if (req.pending & ATIF_DGPU_DISPLAY_EVENT) {
+- if ((adev->flags & AMD_IS_PX) &&
+- amdgpu_atpx_dgpu_req_power_for_displays()) {
++ if (adev->flags & AMD_IS_PX) {
+ pm_runtime_get_sync(adev->ddev->dev);
+ /* Just fire off a uevent and let userspace tell us what to do */
+ drm_helper_hpd_irq_event(adev->ddev);
--- /dev/null
+From 5887a59961e2295c5b02f39dbc0ecf9212709b7b Mon Sep 17 00:00:00 2001
+From: Alex Deucher <alexander.deucher@amd.com>
+Date: Fri, 17 May 2019 09:21:13 -0500
+Subject: drm/amdgpu/soc15: skip reset on init
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+commit 5887a59961e2295c5b02f39dbc0ecf9212709b7b upstream.
+
+Not necessary on soc15 and breaks driver reload on server cards.
+
+Acked-by: Amber Lin <Amber.Lin@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/amd/amdgpu/soc15.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
+@@ -713,6 +713,11 @@ static bool soc15_need_reset_on_init(str
+ {
+ u32 sol_reg;
+
++ /* Just return false for soc15 GPUs. Reset does not seem to
++ * be necessary.
++ */
++ return false;
++
+ if (adev->flags & AMD_IS_APU)
+ return false;
+
--- /dev/null
+From 89a4aac0ab0e6f5eea10d7bf4869dd15c3de2cd4 Mon Sep 17 00:00:00 2001
+From: Helen Koike <helen.koike@collabora.com>
+Date: Mon, 3 Jun 2019 13:56:10 -0300
+Subject: drm: don't block fb changes for async plane updates
+
+From: Helen Koike <helen.koike@collabora.com>
+
+commit 89a4aac0ab0e6f5eea10d7bf4869dd15c3de2cd4 upstream.
+
+In the case of a normal sync update, the preparation of framebuffers (be
+it calling drm_atomic_helper_prepare_planes() or doing setups with
+drm_framebuffer_get()) are performed in the new_state and the respective
+cleanups are performed in the old_state.
+
+In the case of async updates, the preparation is also done in the
+new_state but the cleanups are done in the new_state (because updates
+are performed in place, i.e. in the current state).
+
+The current code blocks async udpates when the fb is changed, turning
+async updates into sync updates, slowing down cursor updates and
+introducing regressions in igt tests with errors of type:
+
+"CRITICAL: completed 97 cursor updated in a period of 30 flips, we
+expect to complete approximately 15360 updates, with the threshold set
+at 7680"
+
+Fb changes in async updates were prevented to avoid the following scenario:
+
+- Async update, oldfb = NULL, newfb = fb1, prepare fb1, cleanup fb1
+- Async update, oldfb = fb1, newfb = fb2, prepare fb2, cleanup fb2
+- Non-async commit, oldfb = fb2, newfb = fb1, prepare fb1, cleanup fb2 (wrong)
+Where we have a single call to prepare fb2 but double cleanup call to fb2.
+
+To solve the above problems, instead of blocking async fb changes, we
+place the old framebuffer in the new_state object, so when the code
+performs cleanups in the new_state it will cleanup the old_fb and we
+will have the following scenario instead:
+
+- Async update, oldfb = NULL, newfb = fb1, prepare fb1, no cleanup
+- Async update, oldfb = fb1, newfb = fb2, prepare fb2, cleanup fb1
+- Non-async commit, oldfb = fb2, newfb = fb1, prepare fb1, cleanup fb2
+
+Where calls to prepare/cleanup are balanced.
+
+Cc: <stable@vger.kernel.org> # v4.14+
+Fixes: 25dc194b34dd ("drm: Block fb changes for async plane updates")
+Suggested-by: Boris Brezillon <boris.brezillon@collabora.com>
+Signed-off-by: Helen Koike <helen.koike@collabora.com>
+Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
+Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190603165610.24614-6-helen.koike@collabora.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_atomic_helper.c | 22 ++++++++++++----------
+ include/drm/drm_modeset_helper_vtables.h | 8 ++++++++
+ 2 files changed, 20 insertions(+), 10 deletions(-)
+
+--- a/drivers/gpu/drm/drm_atomic_helper.c
++++ b/drivers/gpu/drm/drm_atomic_helper.c
+@@ -1607,15 +1607,6 @@ int drm_atomic_helper_async_check(struct
+ old_plane_state->crtc != new_plane_state->crtc)
+ return -EINVAL;
+
+- /*
+- * FIXME: Since prepare_fb and cleanup_fb are always called on
+- * the new_plane_state for async updates we need to block framebuffer
+- * changes. This prevents use of a fb that's been cleaned up and
+- * double cleanups from occuring.
+- */
+- if (old_plane_state->fb != new_plane_state->fb)
+- return -EINVAL;
+-
+ funcs = plane->helper_private;
+ if (!funcs->atomic_async_update)
+ return -EINVAL;
+@@ -1646,6 +1637,8 @@ EXPORT_SYMBOL(drm_atomic_helper_async_ch
+ * drm_atomic_async_check() succeeds. Async commits are not supposed to swap
+ * the states like normal sync commits, but just do in-place changes on the
+ * current state.
++ *
++ * TODO: Implement full swap instead of doing in-place changes.
+ */
+ void drm_atomic_helper_async_commit(struct drm_device *dev,
+ struct drm_atomic_state *state)
+@@ -1656,6 +1649,9 @@ void drm_atomic_helper_async_commit(stru
+ int i;
+
+ for_each_new_plane_in_state(state, plane, plane_state, i) {
++ struct drm_framebuffer *new_fb = plane_state->fb;
++ struct drm_framebuffer *old_fb = plane->state->fb;
++
+ funcs = plane->helper_private;
+ funcs->atomic_async_update(plane, plane_state);
+
+@@ -1664,11 +1660,17 @@ void drm_atomic_helper_async_commit(stru
+ * plane->state in-place, make sure at least common
+ * properties have been properly updated.
+ */
+- WARN_ON_ONCE(plane->state->fb != plane_state->fb);
++ WARN_ON_ONCE(plane->state->fb != new_fb);
+ WARN_ON_ONCE(plane->state->crtc_x != plane_state->crtc_x);
+ WARN_ON_ONCE(plane->state->crtc_y != plane_state->crtc_y);
+ WARN_ON_ONCE(plane->state->src_x != plane_state->src_x);
+ WARN_ON_ONCE(plane->state->src_y != plane_state->src_y);
++
++ /*
++ * Make sure the FBs have been swapped so that cleanups in the
++ * new_state performs a cleanup in the old FB.
++ */
++ WARN_ON_ONCE(plane_state->fb != old_fb);
+ }
+ }
+ EXPORT_SYMBOL(drm_atomic_helper_async_commit);
+--- a/include/drm/drm_modeset_helper_vtables.h
++++ b/include/drm/drm_modeset_helper_vtables.h
+@@ -1178,6 +1178,14 @@ struct drm_plane_helper_funcs {
+ * current one with the new plane configurations in the new
+ * plane_state.
+ *
++ * Drivers should also swap the framebuffers between current plane
++ * state (&drm_plane.state) and new_state.
++ * This is required since cleanup for async commits is performed on
++ * the new state, rather than old state like for traditional commits.
++ * Since we want to give up the reference on the current (old) fb
++ * instead of our brand new one, swap them in the driver during the
++ * async commit.
++ *
+ * FIXME:
+ * - It only works for single plane updates
+ * - Async Pageflips are not supported yet
--- /dev/null
+From 0cbd0adc4429930567083d18cc8c0fbc5f635d96 Mon Sep 17 00:00:00 2001
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+Date: Thu, 18 Apr 2019 08:01:57 +0200
+Subject: drm: Fix timestamp docs for variable refresh properties.
+
+From: Mario Kleiner <mario.kleiner.de@gmail.com>
+
+commit 0cbd0adc4429930567083d18cc8c0fbc5f635d96 upstream.
+
+As discussed with Nicholas and Daniel Vetter (patchwork
+link to discussion below), the VRR timestamping behaviour
+produced utterly useless and bogus vblank/pageflip
+timestamps. We have found a way to fix this and provide
+sane behaviour.
+
+As of Linux 5.2, the amdgpu driver will be able to
+provide exactly the same vblank / pageflip timestamp
+semantic in variable refresh rate mode as in standard
+fixed refresh rate mode. This is achieved by deferring
+core vblank handling (drm_crtc_handle_vblank()) until
+the end of front porch, and also defer the sending of
+pageflip completion events until end of front porch,
+when we can safely compute correct pageflip/vblank
+timestamps.
+
+The same approach will be possible for other VRR
+capable kms drivers, so we can actually have sane
+and useful timestamps in VRR mode.
+
+This patch removes the section of the docs that
+describes the broken timestamp behaviour present
+in Linux 5.0/5.1.
+
+Fixes: ab7a664f7a2d ("drm: Document variable refresh properties")
+Link: https://patchwork.freedesktop.org/patch/285333/
+Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
+Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190418060157.18968-1-mario.kleiner.de@gmail.com
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/drm_connector.c | 6 ------
+ 1 file changed, 6 deletions(-)
+
+--- a/drivers/gpu/drm/drm_connector.c
++++ b/drivers/gpu/drm/drm_connector.c
+@@ -1385,12 +1385,6 @@ EXPORT_SYMBOL(drm_mode_create_scaling_mo
+ *
+ * The driver may place further restrictions within these minimum
+ * and maximum bounds.
+- *
+- * The semantics for the vertical blank timestamp differ when
+- * variable refresh rate is active. The vertical blank timestamp
+- * is defined to be an estimate using the current mode's fixed
+- * refresh rate timings. The semantics for the page-flip event
+- * timestamp remain the same.
+ */
+
+ /**
--- /dev/null
+From 396dd8143bdd94bd1c358a228a631c8c895a1126 Mon Sep 17 00:00:00 2001
+From: Daniel Drake <drake@endlessm.com>
+Date: Tue, 23 Apr 2019 17:28:10 +0800
+Subject: drm/i915/fbc: disable framebuffer compression on GeminiLake
+
+From: Daniel Drake <drake@endlessm.com>
+
+commit 396dd8143bdd94bd1c358a228a631c8c895a1126 upstream.
+
+On many (all?) the Gemini Lake systems we work with, there is frequent
+momentary graphical corruption at the top of the screen, and it seems
+that disabling framebuffer compression can avoid this.
+
+The ticket was reported 6 months ago and has already affected a
+multitude of users, without any real progress being made. So, lets
+disable framebuffer compression on GeminiLake until a solution is found.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108085
+Fixes: fd7d6c5c8f3e ("drm/i915: enable FBC on gen9+ too")
+Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
+Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
+Cc: Jani Nikula <jani.nikula@linux.intel.com>
+Cc: <stable@vger.kernel.org> # v4.11+
+Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
+Signed-off-by: Daniel Drake <drake@endlessm.com>
+Signed-off-by: Jian-Hong Pan <jian-hong@endlessm.com>
+Signed-off-by: Jani Nikula <jani.nikula@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190423092810.28359-1-jian-hong@endlessm.com
+(cherry picked from commit 1d25724b41fad7eeb2c3058a5c8190d6ece73e08)
+Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_fbc.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_fbc.c
++++ b/drivers/gpu/drm/i915/intel_fbc.c
+@@ -1278,6 +1278,10 @@ static int intel_sanitize_fbc_option(str
+ if (!HAS_FBC(dev_priv))
+ return 0;
+
++ /* https://bugs.freedesktop.org/show_bug.cgi?id=108085 */
++ if (IS_GEMINILAKE(dev_priv))
++ return 0;
++
+ if (IS_BROADWELL(dev_priv) || INTEL_GEN(dev_priv) >= 9)
+ return 1;
+
--- /dev/null
+From d90c06d57027203f73021bb7ddb30b800d65c636 Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri, 1 Mar 2019 14:03:47 +0000
+Subject: drm/i915: Fix I915_EXEC_RING_MASK
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit d90c06d57027203f73021bb7ddb30b800d65c636 upstream.
+
+This was supposed to be a mask of all known rings, but it is being used
+by execbuffer to filter out invalid rings, and so is instead mapping high
+unused values onto valid rings. Instead of a mask of all known rings,
+we need it to be the mask of all possible rings.
+
+Fixes: 549f7365820a ("drm/i915: Enable SandyBridge blitter ring")
+Fixes: de1add360522 ("drm/i915: Decouple execbuf uAPI from internal implementation")
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Cc: <stable@vger.kernel.org> # v4.6+
+Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
+Link: https://patchwork.freedesktop.org/patch/msgid/20190301140404.26690-21-chris@chris-wilson.co.uk
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ include/uapi/drm/i915_drm.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/include/uapi/drm/i915_drm.h
++++ b/include/uapi/drm/i915_drm.h
+@@ -972,7 +972,7 @@ struct drm_i915_gem_execbuffer2 {
+ * struct drm_i915_gem_exec_fence *fences.
+ */
+ __u64 cliprects_ptr;
+-#define I915_EXEC_RING_MASK (7<<0)
++#define I915_EXEC_RING_MASK (0x3f)
+ #define I915_EXEC_DEFAULT (0<<0)
+ #define I915_EXEC_RENDER (1<<0)
+ #define I915_EXEC_BSD (2<<0)
--- /dev/null
+From a8c2d5ab9e71be3f9431c47bd45329a36e1fc650 Mon Sep 17 00:00:00 2001
+From: Weinan <weinan.z.li@intel.com>
+Date: Fri, 10 May 2019 15:57:20 +0800
+Subject: drm/i915/gvt: emit init breadcrumb for gvt request
+
+From: Weinan <weinan.z.li@intel.com>
+
+commit a8c2d5ab9e71be3f9431c47bd45329a36e1fc650 upstream.
+
+"To track whether a request has started on HW, we can emit a breadcrumb at
+the beginning of the request and check its timeline's HWSP to see if the
+breadcrumb has advanced past the start of this request." It means all the
+request which timeline's has_init_breadcrumb is true, then the
+emit_init_breadcrumb process must have before emitting the real commands,
+otherwise, the scheduler might get a wrong state of this request during
+reset. If the request is exactly the guilty one, the scheduler won't
+terminate it with the wrong state. To avoid this, do emit_init_breadcrumb
+for all the requests from gvt.
+
+v2: cc to stable kernel
+
+Fixes: 8547444137ec ("drm/i915: Identify active requests")
+Cc: stable@vger.kernel.org
+Acked-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+Signed-off-by: Weinan <weinan.z.li@intel.com>
+Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/gvt/scheduler.c | 19 +++++++++++++++++++
+ 1 file changed, 19 insertions(+)
+
+--- a/drivers/gpu/drm/i915/gvt/scheduler.c
++++ b/drivers/gpu/drm/i915/gvt/scheduler.c
+@@ -298,12 +298,31 @@ static int copy_workload_to_ring_buffer(
+ struct i915_request *req = workload->req;
+ void *shadow_ring_buffer_va;
+ u32 *cs;
++ int err;
+
+ if ((IS_KABYLAKE(req->i915) || IS_BROXTON(req->i915)
+ || IS_COFFEELAKE(req->i915))
+ && is_inhibit_context(req->hw_context))
+ intel_vgpu_restore_inhibit_context(vgpu, req);
+
++ /*
++ * To track whether a request has started on HW, we can emit a
++ * breadcrumb at the beginning of the request and check its
++ * timeline's HWSP to see if the breadcrumb has advanced past the
++ * start of this request. Actually, the request must have the
++ * init_breadcrumb if its timeline set has_init_bread_crumb, or the
++ * scheduler might get a wrong state of it during reset. Since the
++ * requests from gvt always set the has_init_breadcrumb flag, here
++ * need to do the emit_init_breadcrumb for all the requests.
++ */
++ if (req->engine->emit_init_breadcrumb) {
++ err = req->engine->emit_init_breadcrumb(req);
++ if (err) {
++ gvt_vgpu_err("fail to emit init breadcrumb\n");
++ return err;
++ }
++ }
++
+ /* allocate shadow ring buffer */
+ cs = intel_ring_begin(workload->req, workload->rb_len / sizeof(u32));
+ if (IS_ERR(cs)) {
--- /dev/null
+From 387a4c2b55291b37e245c840813bd8a8bd06ed49 Mon Sep 17 00:00:00 2001
+From: Tina Zhang <tina.zhang@intel.com>
+Date: Thu, 23 May 2019 06:18:36 +0800
+Subject: drm/i915/gvt: Initialize intel_gvt_gtt_entry in stack
+
+From: Tina Zhang <tina.zhang@intel.com>
+
+commit 387a4c2b55291b37e245c840813bd8a8bd06ed49 upstream.
+
+Stack struct intel_gvt_gtt_entry value needs to be initialized before
+being used, as the fields may contain garbage values.
+
+W/o this patch, set_ggtt_entry prints:
+-------------------------------------
+274.046840: set_ggtt_entry: vgpu1:set ggtt entry 0x9bed8000ffffe900
+274.046846: set_ggtt_entry: vgpu1:set ggtt entry 0xe55df001
+274.046852: set_ggtt_entry: vgpu1:set ggtt entry 0x9bed8000ffffe900
+
+0x9bed8000 is the stack grabage.
+
+W/ this patch, set_ggtt_entry prints:
+------------------------------------
+274.046840: set_ggtt_entry: vgpu1:set ggtt entry 0xffffe900
+274.046846: set_ggtt_entry: vgpu1:set ggtt entry 0xe55df001
+274.046852: set_ggtt_entry: vgpu1:set ggtt entry 0xffffe900
+
+v2:
+- Initialize during declaration. (Zhenyu)
+
+Fixes: 7598e8700e9a ("drm/i915/gvt: Missed to cancel dma map for ggtt entries")
+Cc: stable@vger.kernel.org # v4.20+
+Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
+Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+Signed-off-by: Tina Zhang <tina.zhang@intel.com>
+Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/gvt/gtt.c | 6 ++++--
+ 1 file changed, 4 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/i915/gvt/gtt.c
++++ b/drivers/gpu/drm/i915/gvt/gtt.c
+@@ -2178,7 +2178,8 @@ static int emulate_ggtt_mmio_write(struc
+ struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
+ unsigned long g_gtt_index = off >> info->gtt_entry_size_shift;
+ unsigned long gma, gfn;
+- struct intel_gvt_gtt_entry e, m;
++ struct intel_gvt_gtt_entry e = {.val64 = 0, .type = GTT_TYPE_GGTT_PTE};
++ struct intel_gvt_gtt_entry m = {.val64 = 0, .type = GTT_TYPE_GGTT_PTE};
+ dma_addr_t dma_addr;
+ int ret;
+ struct intel_gvt_partial_pte *partial_pte, *pos, *n;
+@@ -2245,7 +2246,8 @@ static int emulate_ggtt_mmio_write(struc
+
+ if (!partial_update && (ops->test_present(&e))) {
+ gfn = ops->get_pfn(&e);
+- m = e;
++ m.val64 = e.val64;
++ m.type = e.type;
+
+ /* one PTE update may be issued in multiple writes and the
+ * first write may not construct a valid gfn
--- /dev/null
+From 551bd3368a7b3cfef01edaade8970948d178d40a Mon Sep 17 00:00:00 2001
+From: Jonathan Corbet <corbet@lwn.net>
+Date: Thu, 23 May 2019 10:06:46 -0600
+Subject: drm/i915: Maintain consistent documentation subsection ordering
+
+From: Jonathan Corbet <corbet@lwn.net>
+
+commit 551bd3368a7b3cfef01edaade8970948d178d40a upstream.
+
+With Sphinx 2.0 (or prior versions with the deprecation warnings fixed) the
+docs build fails with:
+
+ Documentation/gpu/i915.rst:403: WARNING: Title level inconsistent:
+
+ Global GTT Fence Handling
+ ~~~~~~~~~~~~~~~~~~~~~~~~~
+
+ reST markup error:
+ Documentation/gpu/i915.rst:403: (SEVERE/4) Title level inconsistent:
+
+I "fixed" it by changing the subsections in i915.rst, but that didn't seem
+like the correct change. It turns out that a couple of i915 files create
+their own subsections in kerneldoc comments using apostrophes as the
+heading marker:
+
+ Layout
+ ''''''
+
+That breaks the normal subsection marker ordering, and newer Sphinx is
+rather more strict about enforcing that ordering. So fix the offending
+comments to make Sphinx happy.
+
+(This is unfortunate, in that kerneldoc comments shouldn't need to be aware
+of where they might be included in the heading hierarchy, but I don't see
+a better way around it).
+
+Cc: stable@vger.kernel.org # v4.14+
+Acked-by: Jani Nikula <jani.nikula@intel.com>
+Signed-off-by: Jonathan Corbet <corbet@lwn.net>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_reg.h | 6 +++---
+ drivers/gpu/drm/i915/intel_workarounds.c | 2 +-
+ 2 files changed, 4 insertions(+), 4 deletions(-)
+
+--- a/drivers/gpu/drm/i915/i915_reg.h
++++ b/drivers/gpu/drm/i915/i915_reg.h
+@@ -32,7 +32,7 @@
+ * macros. Do **not** mass change existing definitions just to update the style.
+ *
+ * Layout
+- * ''''''
++ * ~~~~~~
+ *
+ * Keep helper macros near the top. For example, _PIPE() and friends.
+ *
+@@ -78,7 +78,7 @@
+ * style. Use lower case in hexadecimal values.
+ *
+ * Naming
+- * ''''''
++ * ~~~~~~
+ *
+ * Try to name registers according to the specs. If the register name changes in
+ * the specs from platform to another, stick to the original name.
+@@ -96,7 +96,7 @@
+ * suffix to the name. For example, ``_SKL`` or ``_GEN8``.
+ *
+ * Examples
+- * ''''''''
++ * ~~~~~~~~
+ *
+ * (Note that the values in the example are indented using spaces instead of
+ * TABs to avoid misalignment in generated documentation. Use TABs in the
+--- a/drivers/gpu/drm/i915/intel_workarounds.c
++++ b/drivers/gpu/drm/i915/intel_workarounds.c
+@@ -37,7 +37,7 @@
+ * costly and simplifies things. We can revisit this in the future.
+ *
+ * Layout
+- * ''''''
++ * ~~~~~~
+ *
+ * Keep things in this file ordered by WA type, as per the above (context, GT,
+ * display, register whitelist, batchbuffer). Then, inside each type, keep the
--- /dev/null
+From b30a43ac7132cdda833ac4b13dd1ebd35ace14b7 Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Thu, 18 Apr 2019 16:45:15 +1000
+Subject: drm/nouveau: add kconfig option to turn off nouveau legacy contexts. (v3)
+
+From: Dave Airlie <airlied@redhat.com>
+
+commit b30a43ac7132cdda833ac4b13dd1ebd35ace14b7 upstream.
+
+There was a nouveau DDX that relied on legacy context ioctls to work,
+but we fixed it years ago, give distros that have a modern DDX the
+option to break the uAPI and close the mess of holes that legacy
+context support is.
+
+Full context of the story:
+
+commit 0e975980d435d58df2d430d688b8c18778b42218
+Author: Peter Antoine <peter.antoine@intel.com>
+Date: Tue Jun 23 08:18:49 2015 +0100
+
+ drm: Turn off Legacy Context Functions
+
+ The context functions are not used by the i915 driver and should not
+ be used by modeset drivers. These driver functions contain several bugs
+ and security holes. This change makes these functions optional can be
+ turned on by a setting, they are turned off by default for modeset
+ driver with the exception of the nouvea driver that may require them with
+ an old version of libdrm.
+
+ The previous attempt was
+
+ commit 7c510133d93dd6f15ca040733ba7b2891ed61fd1
+ Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+ Date: Thu Aug 8 15:41:21 2013 +0200
+
+ drm: mark context support as a legacy subsystem
+
+ but this had to be reverted
+
+ commit c21eb21cb50d58e7cbdcb8b9e7ff68b85cfa5095
+ Author: Dave Airlie <airlied@redhat.com>
+ Date: Fri Sep 20 08:32:59 2013 +1000
+
+ Revert "drm: mark context support as a legacy subsystem"
+
+ v2: remove returns from void function, and formatting (Daniel Vetter)
+
+ v3:
+ - s/Nova/nouveau/ in the commit message, and add references to the
+ previous attempts
+ - drop the part touching the drm hw lock, that should be a separate
+ patch.
+
+ Signed-off-by: Peter Antoine <peter.antoine@intel.com> (v2)
+ Cc: Peter Antoine <peter.antoine@intel.com> (v2)
+ Reviewed-by: Peter Antoine <peter.antoine@intel.com>
+ Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+v2: move DRM_VM dependency into legacy config.
+v3: fix missing dep (kbuild robot)
+
+Cc: stable@vger.kernel.org
+Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/nouveau/Kconfig | 13 ++++++++++++-
+ drivers/gpu/drm/nouveau/nouveau_drm.c | 7 +++++--
+ 2 files changed, 17 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/nouveau/Kconfig
++++ b/drivers/gpu/drm/nouveau/Kconfig
+@@ -17,10 +17,21 @@ config DRM_NOUVEAU
+ select INPUT if ACPI && X86
+ select THERMAL if ACPI && X86
+ select ACPI_VIDEO if ACPI && X86
+- select DRM_VM
+ help
+ Choose this option for open-source NVIDIA support.
+
++config NOUVEAU_LEGACY_CTX_SUPPORT
++ bool "Nouveau legacy context support"
++ depends on DRM_NOUVEAU
++ select DRM_VM
++ default y
++ help
++ There was a version of the nouveau DDX that relied on legacy
++ ctx ioctls not erroring out. But that was back in time a long
++ ways, so offer a way to disable it now. For uapi compat with
++ old nouveau ddx this should be on by default, but modern distros
++ should consider turning it off.
++
+ config NOUVEAU_PLATFORM_DRIVER
+ bool "Nouveau (NVIDIA) SoC GPUs"
+ depends on DRM_NOUVEAU && ARCH_TEGRA
+--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
++++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
+@@ -1094,8 +1094,11 @@ nouveau_driver_fops = {
+ static struct drm_driver
+ driver_stub = {
+ .driver_features =
+- DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
+- DRIVER_KMS_LEGACY_CONTEXT,
++ DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER
++#if defined(CONFIG_NOUVEAU_LEGACY_CTX_SUPPORT)
++ | DRIVER_KMS_LEGACY_CONTEXT
++#endif
++ ,
+
+ .open = nouveau_drm_open,
+ .postclose = nouveau_drm_postclose,
--- /dev/null
+From 2e26ccb119bde03584be53406bbd22e711b0d6e6 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
+Date: Mon, 6 May 2019 19:57:52 +0200
+Subject: drm/radeon: prefer lower reference dividers
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Christian König <christian.koenig@amd.com>
+
+commit 2e26ccb119bde03584be53406bbd22e711b0d6e6 upstream.
+
+Instead of the closest reference divider prefer the lowest,
+this fixes flickering issues on HP Compaq nx9420.
+
+Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=108514
+Suggested-by: Paul Dufresne <dufresnep@gmail.com>
+Signed-off-by: Christian König <christian.koenig@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_display.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+--- a/drivers/gpu/drm/radeon/radeon_display.c
++++ b/drivers/gpu/drm/radeon/radeon_display.c
+@@ -922,12 +922,12 @@ static void avivo_get_fb_ref_div(unsigne
+ ref_div_max = max(min(100 / post_div, ref_div_max), 1u);
+
+ /* get matching reference and feedback divider */
+- *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max);
++ *ref_div = min(max(den/post_div, 1u), ref_div_max);
+ *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den);
+
+ /* limit fb divider to its maximum */
+ if (*fb_div > fb_div_max) {
+- *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div);
++ *ref_div = (*ref_div * fb_div_max)/(*fb_div);
+ *fb_div = fb_div_max;
+ }
+ }
drm-vc4-fix-fb-references-in-async-update.patch
drm-gma500-cdv-check-vbt-config-bits-when-detecting-lvds-panels.patch
drm-msm-fix-fb-references-in-async-update.patch
+drm-add-non-desktop-quirk-for-valve-hmds.patch
+drm-nouveau-add-kconfig-option-to-turn-off-nouveau-legacy-contexts.-v3.patch
+drm-add-non-desktop-quirks-to-sensics-and-osvr-headsets.patch
+drm-fix-timestamp-docs-for-variable-refresh-properties.patch
+drm-amdgpu-psp-move-psp-version-specific-function-pointers-to-early_init.patch
+drm-radeon-prefer-lower-reference-dividers.patch
+drm-amdgpu-remove-atpx_dgpu_req_power_for_displays-check-when-hotplug-in.patch
+drm-i915-fix-i915_exec_ring_mask.patch
+drm-amdgpu-soc15-skip-reset-on-init.patch
+drm-amd-display-add-asicrev_is_picasso.patch
+drm-amdgpu-fix-ring-test-failure-issue-during-s3-in-vce-3.0-v2.patch
+drm-i915-fbc-disable-framebuffer-compression-on-geminilake.patch
+drm-i915-gvt-emit-init-breadcrumb-for-gvt-request.patch
+drm-i915-maintain-consistent-documentation-subsection-ordering.patch
+drm-don-t-block-fb-changes-for-async-plane-updates.patch
+drm-i915-gvt-initialize-intel_gvt_gtt_entry-in-stack.patch
+drm-amd-fix-fb-references-in-async-update.patch
+tty-serial_core-add-install.patch
--- /dev/null
+From 4cdd17ba1dff20ffc99fdbd2e6f0201fc7fe67df Mon Sep 17 00:00:00 2001
+From: Jiri Slaby <jslaby@suse.cz>
+Date: Wed, 17 Apr 2019 10:58:53 +0200
+Subject: TTY: serial_core, add ->install
+
+From: Jiri Slaby <jslaby@suse.cz>
+
+commit 4cdd17ba1dff20ffc99fdbd2e6f0201fc7fe67df upstream.
+
+We need to compute the uart state only on the first open. This is
+usually what is done in the ->install hook. serial_core used to do this
+in ->open on every open. So move it to ->install.
+
+As a side effect, it ensures the state is set properly in the window
+after tty_init_dev is called, but before uart_open. This fixes a bunch
+of races between tty_open and flush_to_ldisc we were dealing with
+recently.
+
+One of such bugs was attempted to fix in commit fedb5760648a (serial:
+fix race between flush_to_ldisc and tty_open), but it only took care of
+a couple of functions (uart_start and uart_unthrottle). I was able to
+reproduce the crash on a SLE system, but in uart_write_room which is
+also called from flush_to_ldisc via process_echoes. I was *unable* to
+reproduce the bug locally. It is due to having this patch in my queue
+since 2012!
+
+ general protection fault: 0000 [#1] SMP KASAN PTI
+ CPU: 1 PID: 5 Comm: kworker/u4:0 Tainted: G L 4.12.14-396-default #1 SLE15-SP1 (unreleased)
+ Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.12.0-0-ga698c89-prebuilt.qemu.org 04/01/2014
+ Workqueue: events_unbound flush_to_ldisc
+ task: ffff8800427d8040 task.stack: ffff8800427f0000
+ RIP: 0010:uart_write_room+0xc4/0x590
+ RSP: 0018:ffff8800427f7088 EFLAGS: 00010202
+ RAX: dffffc0000000000 RBX: 0000000000000000 RCX: 0000000000000000
+ RDX: 000000000000002f RSI: 00000000000000ee RDI: ffff88003888bd90
+ RBP: ffffffffb9545850 R08: 0000000000000001 R09: 0000000000000400
+ R10: ffff8800427d825c R11: 000000000000006e R12: 1ffff100084fee12
+ R13: ffffc900004c5000 R14: ffff88003888bb28 R15: 0000000000000178
+ FS: 0000000000000000(0000) GS:ffff880043300000(0000) knlGS:0000000000000000
+ CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
+ CR2: 0000561da0794148 CR3: 000000000ebf4000 CR4: 00000000000006e0
+ Call Trace:
+ tty_write_room+0x6d/0xc0
+ __process_echoes+0x55/0x870
+ n_tty_receive_buf_common+0x105e/0x26d0
+ tty_ldisc_receive_buf+0xb7/0x1c0
+ tty_port_default_receive_buf+0x107/0x180
+ flush_to_ldisc+0x35d/0x5c0
+...
+
+0 in rbx means tty->driver_data is NULL in uart_write_room. 0x178 is
+tried to be dereferenced (0x178 >> 3 is 0x2f in rdx) at
+uart_write_room+0xc4. 0x178 is exactly (struct uart_state *)NULL->refcount
+used in uart_port_lock from uart_write_room.
+
+So revert the upstream commit here as my local patch should fix the
+whole family.
+
+Signed-off-by: Jiri Slaby <jslaby@suse.cz>
+Cc: Li RongQing <lirongqing@baidu.com>
+Cc: Wang Li <wangli39@baidu.com>
+Cc: Zhang Yu <zhangyu31@baidu.com>
+Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Cc: stable <stable@vger.kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/tty/serial/serial_core.c | 24 +++++++++++++-----------
+ 1 file changed, 13 insertions(+), 11 deletions(-)
+
+--- a/drivers/tty/serial/serial_core.c
++++ b/drivers/tty/serial/serial_core.c
+@@ -130,9 +130,6 @@ static void uart_start(struct tty_struct
+ struct uart_port *port;
+ unsigned long flags;
+
+- if (!state)
+- return;
+-
+ port = uart_port_lock(state, flags);
+ __uart_start(tty);
+ uart_port_unlock(port, flags);
+@@ -730,9 +727,6 @@ static void uart_unthrottle(struct tty_s
+ upstat_t mask = UPSTAT_SYNC_FIFO;
+ struct uart_port *port;
+
+- if (!state)
+- return;
+-
+ port = uart_port_ref(state);
+ if (!port)
+ return;
+@@ -1747,6 +1741,16 @@ static void uart_dtr_rts(struct tty_port
+ uart_port_deref(uport);
+ }
+
++static int uart_install(struct tty_driver *driver, struct tty_struct *tty)
++{
++ struct uart_driver *drv = driver->driver_state;
++ struct uart_state *state = drv->state + tty->index;
++
++ tty->driver_data = state;
++
++ return tty_standard_install(driver, tty);
++}
++
+ /*
+ * Calls to uart_open are serialised by the tty_lock in
+ * drivers/tty/tty_io.c:tty_open()
+@@ -1759,11 +1763,8 @@ static void uart_dtr_rts(struct tty_port
+ */
+ static int uart_open(struct tty_struct *tty, struct file *filp)
+ {
+- struct uart_driver *drv = tty->driver->driver_state;
+- int retval, line = tty->index;
+- struct uart_state *state = drv->state + line;
+-
+- tty->driver_data = state;
++ struct uart_state *state = tty->driver_data;
++ int retval;
+
+ retval = tty_port_open(&state->port, tty, filp);
+ if (retval > 0)
+@@ -2448,6 +2449,7 @@ static void uart_poll_put_char(struct tt
+ #endif
+
+ static const struct tty_operations uart_ops = {
++ .install = uart_install,
+ .open = uart_open,
+ .close = uart_close,
+ .write = uart_write,
projects / thirdparty / kernel / stable-queue.git / commitdiff
