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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Performance event support for s390x - CPU-measurement Counter Sets
4 *
5 * Copyright IBM Corp. 2019
6 * Author(s): Hendrik Brueckner <brueckner@linux.ibm.com>
7 * Thomas Richer <tmricht@linux.ibm.com>
8 */
9 #define KMSG_COMPONENT "cpum_cf_diag"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/kernel.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/percpu.h>
15 #include <linux/notifier.h>
16 #include <linux/init.h>
17 #include <linux/export.h>
18 #include <linux/slab.h>
19 #include <linux/processor.h>
20
21 #include <asm/ctl_reg.h>
22 #include <asm/irq.h>
23 #include <asm/cpu_mcf.h>
24 #include <asm/timex.h>
25 #include <asm/debug.h>
26
27 #define CF_DIAG_CTRSET_DEF 0xfeef /* Counter set header mark */
28
29 static unsigned int cf_diag_cpu_speed;
30 static debug_info_t *cf_diag_dbg;
31
32 struct cf_diag_csd { /* Counter set data per CPU */
33 size_t used; /* Bytes used in data/start */
34 unsigned char start[PAGE_SIZE]; /* Counter set at event start */
35 unsigned char data[PAGE_SIZE]; /* Counter set at event delete */
36 };
37 DEFINE_PER_CPU(struct cf_diag_csd, cf_diag_csd);
38
39 /* Counter sets are stored as data stream in a page sized memory buffer and
40 * exported to user space via raw data attached to the event sample data.
41 * Each counter set starts with an eight byte header consisting of:
42 * - a two byte eye catcher (0xfeef)
43 * - a one byte counter set number
44 * - a two byte counter set size (indicates the number of counters in this set)
45 * - a three byte reserved value (must be zero) to make the header the same
46 * size as a counter value.
47 * All counter values are eight byte in size.
48 *
49 * All counter sets are followed by a 64 byte trailer.
50 * The trailer consists of a:
51 * - flag field indicating valid fields when corresponding bit set
52 * - the counter facility first and second version number
53 * - the CPU speed if nonzero
54 * - the time stamp the counter sets have been collected
55 * - the time of day (TOD) base value
56 * - the machine type.
57 *
58 * The counter sets are saved when the process is prepared to be executed on a
59 * CPU and saved again when the process is going to be removed from a CPU.
60 * The difference of both counter sets are calculated and stored in the event
61 * sample data area.
62 */
63
64 struct cf_ctrset_entry { /* CPU-M CF counter set entry (8 byte) */
65 unsigned int def:16; /* 0-15 Data Entry Format */
66 unsigned int set:16; /* 16-31 Counter set identifier */
67 unsigned int ctr:16; /* 32-47 Number of stored counters */
68 unsigned int res1:16; /* 48-63 Reserved */
69 };
70
71 struct cf_trailer_entry { /* CPU-M CF_DIAG trailer (64 byte) */
72 /* 0 - 7 */
73 union {
74 struct {
75 unsigned int clock_base:1; /* TOD clock base set */
76 unsigned int speed:1; /* CPU speed set */
77 /* Measurement alerts */
78 unsigned int mtda:1; /* Loss of MT ctr. data alert */
79 unsigned int caca:1; /* Counter auth. change alert */
80 unsigned int lcda:1; /* Loss of counter data alert */
81 };
82 unsigned long flags; /* 0-63 All indicators */
83 };
84 /* 8 - 15 */
85 unsigned int cfvn:16; /* 64-79 Ctr First Version */
86 unsigned int csvn:16; /* 80-95 Ctr Second Version */
87 unsigned int cpu_speed:32; /* 96-127 CPU speed */
88 /* 16 - 23 */
89 unsigned long timestamp; /* 128-191 Timestamp (TOD) */
90 /* 24 - 55 */
91 union {
92 struct {
93 unsigned long progusage1;
94 unsigned long progusage2;
95 unsigned long progusage3;
96 unsigned long tod_base;
97 };
98 unsigned long progusage[4];
99 };
100 /* 56 - 63 */
101 unsigned int mach_type:16; /* Machine type */
102 unsigned int res1:16; /* Reserved */
103 unsigned int res2:32; /* Reserved */
104 };
105
106 /* Create the trailer data at the end of a page. */
107 static void cf_diag_trailer(struct cf_trailer_entry *te)
108 {
109 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
110 struct cpuid cpuid;
111
112 te->cfvn = cpuhw->info.cfvn; /* Counter version numbers */
113 te->csvn = cpuhw->info.csvn;
114
115 get_cpu_id(&cpuid); /* Machine type */
116 te->mach_type = cpuid.machine;
117 te->cpu_speed = cf_diag_cpu_speed;
118 if (te->cpu_speed)
119 te->speed = 1;
120 te->clock_base = 1; /* Save clock base */
121 memcpy(&te->tod_base, &tod_clock_base[1], 8);
122 store_tod_clock((__u64 *)&te->timestamp);
123 }
124
125 /*
126 * Change the CPUMF state to active.
127 * Enable and activate the CPU-counter sets according
128 * to the per-cpu control state.
129 */
130 static void cf_diag_enable(struct pmu *pmu)
131 {
132 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
133 int err;
134
135 debug_sprintf_event(cf_diag_dbg, 5,
136 "%s pmu %p cpu %d flags %#x state %#llx\n",
137 __func__, pmu, smp_processor_id(), cpuhw->flags,
138 cpuhw->state);
139 if (cpuhw->flags & PMU_F_ENABLED)
140 return;
141
142 err = lcctl(cpuhw->state);
143 if (err) {
144 pr_err("Enabling the performance measuring unit "
145 "failed with rc=%x\n", err);
146 return;
147 }
148 cpuhw->flags |= PMU_F_ENABLED;
149 }
150
151 /*
152 * Change the CPUMF state to inactive.
153 * Disable and enable (inactive) the CPU-counter sets according
154 * to the per-cpu control state.
155 */
156 static void cf_diag_disable(struct pmu *pmu)
157 {
158 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
159 u64 inactive;
160 int err;
161
162 debug_sprintf_event(cf_diag_dbg, 5,
163 "%s pmu %p cpu %d flags %#x state %#llx\n",
164 __func__, pmu, smp_processor_id(), cpuhw->flags,
165 cpuhw->state);
166 if (!(cpuhw->flags & PMU_F_ENABLED))
167 return;
168
169 inactive = cpuhw->state & ~((1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1);
170 err = lcctl(inactive);
171 if (err) {
172 pr_err("Disabling the performance measuring unit "
173 "failed with rc=%x\n", err);
174 return;
175 }
176 cpuhw->flags &= ~PMU_F_ENABLED;
177 }
178
179 /* Number of perf events counting hardware events */
180 static atomic_t cf_diag_events = ATOMIC_INIT(0);
181
182 /* Release the PMU if event is the last perf event */
183 static void cf_diag_perf_event_destroy(struct perf_event *event)
184 {
185 debug_sprintf_event(cf_diag_dbg, 5,
186 "%s event %p cpu %d cf_diag_events %d\n",
187 __func__, event, event->cpu,
188 atomic_read(&cf_diag_events));
189 if (atomic_dec_return(&cf_diag_events) == 0)
190 __kernel_cpumcf_end();
191 }
192
193 /* Setup the event. Test for authorized counter sets and only include counter
194 * sets which are authorized at the time of the setup. Including unauthorized
195 * counter sets result in specification exception (and panic).
196 */
197 static int __hw_perf_event_init(struct perf_event *event)
198 {
199 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
200 struct perf_event_attr *attr = &event->attr;
201 enum cpumf_ctr_set i;
202 int err = 0;
203
204 debug_sprintf_event(cf_diag_dbg, 5,
205 "%s event %p cpu %d authorized %#x\n", __func__,
206 event, event->cpu, cpuhw->info.auth_ctl);
207
208 event->hw.config = attr->config;
209 event->hw.config_base = 0;
210 local64_set(&event->count, 0);
211
212 /* Add all authorized counter sets to config_base */
213 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i)
214 if (cpuhw->info.auth_ctl & cpumf_ctr_ctl[i])
215 event->hw.config_base |= cpumf_ctr_ctl[i];
216
217 /* No authorized counter sets, nothing to count/sample */
218 if (!event->hw.config_base) {
219 err = -EINVAL;
220 goto out;
221 }
222
223 /* Set sample_period to indicate sampling */
224 event->hw.sample_period = attr->sample_period;
225 local64_set(&event->hw.period_left, event->hw.sample_period);
226 event->hw.last_period = event->hw.sample_period;
227 out:
228 debug_sprintf_event(cf_diag_dbg, 5, "%s err %d config_base %#lx\n",
229 __func__, err, event->hw.config_base);
230 return err;
231 }
232
233 static int cf_diag_event_init(struct perf_event *event)
234 {
235 struct perf_event_attr *attr = &event->attr;
236 int err = -ENOENT;
237
238 debug_sprintf_event(cf_diag_dbg, 5,
239 "%s event %p cpu %d config %#llx "
240 "sample_type %#llx cf_diag_events %d\n", __func__,
241 event, event->cpu, attr->config, attr->sample_type,
242 atomic_read(&cf_diag_events));
243
244 if (event->attr.config != PERF_EVENT_CPUM_CF_DIAG ||
245 event->attr.type != PERF_TYPE_RAW)
246 goto out;
247
248 /* Raw events are used to access counters directly,
249 * hence do not permit excludes.
250 * This event is usesless without PERF_SAMPLE_RAW to return counter set
251 * values as raw data.
252 */
253 if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv ||
254 !(attr->sample_type & (PERF_SAMPLE_CPU | PERF_SAMPLE_RAW))) {
255 err = -EOPNOTSUPP;
256 goto out;
257 }
258
259 /* Initialize for using the CPU-measurement counter facility */
260 if (atomic_inc_return(&cf_diag_events) == 1) {
261 if (__kernel_cpumcf_begin()) {
262 atomic_dec(&cf_diag_events);
263 err = -EBUSY;
264 goto out;
265 }
266 }
267 event->destroy = cf_diag_perf_event_destroy;
268
269 err = __hw_perf_event_init(event);
270 if (unlikely(err))
271 event->destroy(event);
272 out:
273 debug_sprintf_event(cf_diag_dbg, 5, "%s err %d\n", __func__, err);
274 return err;
275 }
276
277 static void cf_diag_read(struct perf_event *event)
278 {
279 debug_sprintf_event(cf_diag_dbg, 5, "%s event %p\n", __func__, event);
280 }
281
282 /* Return the maximum possible counter set size (in number of 8 byte counters)
283 * depending on type and model number.
284 */
285 static size_t cf_diag_ctrset_size(enum cpumf_ctr_set ctrset,
286 struct cpumf_ctr_info *info)
287 {
288 size_t ctrset_size = 0;
289
290 switch (ctrset) {
291 case CPUMF_CTR_SET_BASIC:
292 if (info->cfvn >= 1)
293 ctrset_size = 6;
294 break;
295 case CPUMF_CTR_SET_USER:
296 if (info->cfvn == 1)
297 ctrset_size = 6;
298 else if (info->cfvn >= 3)
299 ctrset_size = 2;
300 break;
301 case CPUMF_CTR_SET_CRYPTO:
302 ctrset_size = 16;
303 break;
304 case CPUMF_CTR_SET_EXT:
305 if (info->csvn == 1)
306 ctrset_size = 32;
307 else if (info->csvn == 2)
308 ctrset_size = 48;
309 else if (info->csvn >= 3)
310 ctrset_size = 128;
311 break;
312 case CPUMF_CTR_SET_MT_DIAG:
313 if (info->csvn > 3)
314 ctrset_size = 48;
315 break;
316 case CPUMF_CTR_SET_MAX:
317 break;
318 }
319
320 return ctrset_size;
321 }
322
323 /* Calculate memory needed to store all counter sets together with header and
324 * trailer data. This is independend of the counter set authorization which
325 * can vary depending on the configuration.
326 */
327 static size_t cf_diag_ctrset_maxsize(struct cpumf_ctr_info *info)
328 {
329 size_t max_size = sizeof(struct cf_trailer_entry);
330 enum cpumf_ctr_set i;
331
332 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
333 size_t size = cf_diag_ctrset_size(i, info);
334
335 if (size)
336 max_size += size * sizeof(u64) +
337 sizeof(struct cf_ctrset_entry);
338 }
339 debug_sprintf_event(cf_diag_dbg, 5, "%s max_size %zu\n", __func__,
340 max_size);
341
342 return max_size;
343 }
344
345 /* Read a counter set. The counter set number determines which counter set and
346 * the CPUM-CF first and second version number determine the number of
347 * available counters in this counter set.
348 * Each counter set starts with header containing the counter set number and
349 * the number of 8 byte counters.
350 *
351 * The functions returns the number of bytes occupied by this counter set
352 * including the header.
353 * If there is no counter in the counter set, this counter set is useless and
354 * zero is returned on this case.
355 */
356 static size_t cf_diag_getctrset(struct cf_ctrset_entry *ctrdata, int ctrset,
357 size_t room)
358 {
359 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
360 size_t ctrset_size, need = 0;
361 int rc = 3; /* Assume write failure */
362
363 ctrdata->def = CF_DIAG_CTRSET_DEF;
364 ctrdata->set = ctrset;
365 ctrdata->res1 = 0;
366 ctrset_size = cf_diag_ctrset_size(ctrset, &cpuhw->info);
367
368 if (ctrset_size) { /* Save data */
369 need = ctrset_size * sizeof(u64) + sizeof(*ctrdata);
370 if (need <= room)
371 rc = ctr_stcctm(ctrset, ctrset_size,
372 (u64 *)(ctrdata + 1));
373 if (rc != 3)
374 ctrdata->ctr = ctrset_size;
375 else
376 need = 0;
377 }
378
379 debug_sprintf_event(cf_diag_dbg, 6,
380 "%s ctrset %d ctrset_size %zu cfvn %d csvn %d"
381 " need %zd rc:%d\n",
382 __func__, ctrset, ctrset_size, cpuhw->info.cfvn,
383 cpuhw->info.csvn, need, rc);
384 return need;
385 }
386
387 /* Read out all counter sets and save them in the provided data buffer.
388 * The last 64 byte host an artificial trailer entry.
389 */
390 static size_t cf_diag_getctr(void *data, size_t sz, unsigned long auth)
391 {
392 struct cf_trailer_entry *trailer;
393 size_t offset = 0, done;
394 int i;
395
396 memset(data, 0, sz);
397 sz -= sizeof(*trailer); /* Always room for trailer */
398 for (i = CPUMF_CTR_SET_BASIC; i < CPUMF_CTR_SET_MAX; ++i) {
399 struct cf_ctrset_entry *ctrdata = data + offset;
400
401 if (!(auth & cpumf_ctr_ctl[i]))
402 continue; /* Counter set not authorized */
403
404 done = cf_diag_getctrset(ctrdata, i, sz - offset);
405 offset += done;
406 debug_sprintf_event(cf_diag_dbg, 6,
407 "%s ctrset %d offset %zu done %zu\n",
408 __func__, i, offset, done);
409 }
410 trailer = data + offset;
411 cf_diag_trailer(trailer);
412 return offset + sizeof(*trailer);
413 }
414
415 /* Calculate the difference for each counter in a counter set. */
416 static void cf_diag_diffctrset(u64 *pstart, u64 *pstop, int counters)
417 {
418 for (; --counters >= 0; ++pstart, ++pstop)
419 if (*pstop >= *pstart)
420 *pstop -= *pstart;
421 else
422 *pstop = *pstart - *pstop;
423 }
424
425 /* Scan the counter sets and calculate the difference of each counter
426 * in each set. The result is the increment of each counter during the
427 * period the counter set has been activated.
428 *
429 * Return true on success.
430 */
431 static int cf_diag_diffctr(struct cf_diag_csd *csd, unsigned long auth)
432 {
433 struct cf_trailer_entry *trailer_start, *trailer_stop;
434 struct cf_ctrset_entry *ctrstart, *ctrstop;
435 size_t offset = 0;
436
437 auth &= (1 << CPUMF_LCCTL_ENABLE_SHIFT) - 1;
438 do {
439 ctrstart = (struct cf_ctrset_entry *)(csd->start + offset);
440 ctrstop = (struct cf_ctrset_entry *)(csd->data + offset);
441
442 if (memcmp(ctrstop, ctrstart, sizeof(*ctrstop))) {
443 pr_err("cpum_cf_diag counter set compare error "
444 "in set %i\n", ctrstart->set);
445 return 0;
446 }
447 auth &= ~cpumf_ctr_ctl[ctrstart->set];
448 if (ctrstart->def == CF_DIAG_CTRSET_DEF) {
449 cf_diag_diffctrset((u64 *)(ctrstart + 1),
450 (u64 *)(ctrstop + 1), ctrstart->ctr);
451 offset += ctrstart->ctr * sizeof(u64) +
452 sizeof(*ctrstart);
453 }
454 debug_sprintf_event(cf_diag_dbg, 6,
455 "%s set %d ctr %d offset %zu auth %lx\n",
456 __func__, ctrstart->set, ctrstart->ctr,
457 offset, auth);
458 } while (ctrstart->def && auth);
459
460 /* Save time_stamp from start of event in stop's trailer */
461 trailer_start = (struct cf_trailer_entry *)(csd->start + offset);
462 trailer_stop = (struct cf_trailer_entry *)(csd->data + offset);
463 trailer_stop->progusage[0] = trailer_start->timestamp;
464
465 return 1;
466 }
467
468 /* Create perf event sample with the counter sets as raw data. The sample
469 * is then pushed to the event subsystem and the function checks for
470 * possible event overflows. If an event overflow occurs, the PMU is
471 * stopped.
472 *
473 * Return non-zero if an event overflow occurred.
474 */
475 static int cf_diag_push_sample(struct perf_event *event,
476 struct cf_diag_csd *csd)
477 {
478 struct perf_sample_data data;
479 struct perf_raw_record raw;
480 struct pt_regs regs;
481 int overflow;
482
483 /* Setup perf sample */
484 perf_sample_data_init(&data, 0, event->hw.last_period);
485 memset(&regs, 0, sizeof(regs));
486 memset(&raw, 0, sizeof(raw));
487
488 if (event->attr.sample_type & PERF_SAMPLE_CPU)
489 data.cpu_entry.cpu = event->cpu;
490 if (event->attr.sample_type & PERF_SAMPLE_RAW) {
491 raw.frag.size = csd->used;
492 raw.frag.data = csd->data;
493 raw.size = csd->used;
494 data.raw = &raw;
495 }
496
497 overflow = perf_event_overflow(event, &data, &regs);
498 debug_sprintf_event(cf_diag_dbg, 6,
499 "%s event %p cpu %d sample_type %#llx raw %d "
500 "ov %d\n", __func__, event, event->cpu,
501 event->attr.sample_type, raw.size, overflow);
502 if (overflow)
503 event->pmu->stop(event, 0);
504
505 perf_event_update_userpage(event);
506 return overflow;
507 }
508
509 static void cf_diag_start(struct perf_event *event, int flags)
510 {
511 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
512 struct cf_diag_csd *csd = this_cpu_ptr(&cf_diag_csd);
513 struct hw_perf_event *hwc = &event->hw;
514
515 debug_sprintf_event(cf_diag_dbg, 5,
516 "%s event %p cpu %d flags %#x hwc-state %#x\n",
517 __func__, event, event->cpu, flags, hwc->state);
518 if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
519 return;
520
521 /* (Re-)enable and activate all counter sets */
522 lcctl(0); /* Reset counter sets */
523 hwc->state = 0;
524 ctr_set_multiple_enable(&cpuhw->state, hwc->config_base);
525 lcctl(cpuhw->state); /* Enable counter sets */
526 csd->used = cf_diag_getctr(csd->start, sizeof(csd->start),
527 event->hw.config_base);
528 ctr_set_multiple_start(&cpuhw->state, hwc->config_base);
529 /* Function cf_diag_enable() starts the counter sets. */
530 }
531
532 static void cf_diag_stop(struct perf_event *event, int flags)
533 {
534 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
535 struct cf_diag_csd *csd = this_cpu_ptr(&cf_diag_csd);
536 struct hw_perf_event *hwc = &event->hw;
537
538 debug_sprintf_event(cf_diag_dbg, 5,
539 "%s event %p cpu %d flags %#x hwc-state %#x\n",
540 __func__, event, event->cpu, flags, hwc->state);
541
542 /* Deactivate all counter sets */
543 ctr_set_multiple_stop(&cpuhw->state, hwc->config_base);
544 local64_inc(&event->count);
545 csd->used = cf_diag_getctr(csd->data, sizeof(csd->data),
546 event->hw.config_base);
547 if (cf_diag_diffctr(csd, event->hw.config_base))
548 cf_diag_push_sample(event, csd);
549 hwc->state |= PERF_HES_STOPPED;
550 }
551
552 static int cf_diag_add(struct perf_event *event, int flags)
553 {
554 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
555 int err = 0;
556
557 debug_sprintf_event(cf_diag_dbg, 5,
558 "%s event %p cpu %d flags %#x cpuhw:%p\n",
559 __func__, event, event->cpu, flags, cpuhw);
560
561 if (cpuhw->flags & PMU_F_IN_USE) {
562 err = -EAGAIN;
563 goto out;
564 }
565
566 event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
567
568 cpuhw->flags |= PMU_F_IN_USE;
569 if (flags & PERF_EF_START)
570 cf_diag_start(event, PERF_EF_RELOAD);
571 out:
572 debug_sprintf_event(cf_diag_dbg, 5, "%s err %d\n", __func__, err);
573 return err;
574 }
575
576 static void cf_diag_del(struct perf_event *event, int flags)
577 {
578 struct cpu_cf_events *cpuhw = this_cpu_ptr(&cpu_cf_events);
579
580 debug_sprintf_event(cf_diag_dbg, 5,
581 "%s event %p cpu %d flags %#x\n",
582 __func__, event, event->cpu, flags);
583
584 cf_diag_stop(event, PERF_EF_UPDATE);
585 ctr_set_multiple_stop(&cpuhw->state, event->hw.config_base);
586 ctr_set_multiple_disable(&cpuhw->state, event->hw.config_base);
587 cpuhw->flags &= ~PMU_F_IN_USE;
588 }
589
590 CPUMF_EVENT_ATTR(CF_DIAG, CF_DIAG, PERF_EVENT_CPUM_CF_DIAG);
591
592 static struct attribute *cf_diag_events_attr[] = {
593 CPUMF_EVENT_PTR(CF_DIAG, CF_DIAG),
594 NULL,
595 };
596
597 PMU_FORMAT_ATTR(event, "config:0-63");
598
599 static struct attribute *cf_diag_format_attr[] = {
600 &format_attr_event.attr,
601 NULL,
602 };
603
604 static struct attribute_group cf_diag_events_group = {
605 .name = "events",
606 .attrs = cf_diag_events_attr,
607 };
608 static struct attribute_group cf_diag_format_group = {
609 .name = "format",
610 .attrs = cf_diag_format_attr,
611 };
612 static const struct attribute_group *cf_diag_attr_groups[] = {
613 &cf_diag_events_group,
614 &cf_diag_format_group,
615 NULL,
616 };
617
618 /* Performance monitoring unit for s390x */
619 static struct pmu cf_diag = {
620 .task_ctx_nr = perf_sw_context,
621 .pmu_enable = cf_diag_enable,
622 .pmu_disable = cf_diag_disable,
623 .event_init = cf_diag_event_init,
624 .add = cf_diag_add,
625 .del = cf_diag_del,
626 .start = cf_diag_start,
627 .stop = cf_diag_stop,
628 .read = cf_diag_read,
629
630 .attr_groups = cf_diag_attr_groups
631 };
632
633 /* Get the CPU speed, try sampling facility first and CPU attributes second. */
634 static void cf_diag_get_cpu_speed(void)
635 {
636 if (cpum_sf_avail()) { /* Sampling facility first */
637 struct hws_qsi_info_block si;
638
639 memset(&si, 0, sizeof(si));
640 if (!qsi(&si)) {
641 cf_diag_cpu_speed = si.cpu_speed;
642 return;
643 }
644 }
645
646 if (test_facility(34)) { /* CPU speed extract static part */
647 unsigned long mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
648
649 if (mhz != -1UL)
650 cf_diag_cpu_speed = mhz & 0xffffffff;
651 }
652 }
653
654 /* Initialize the counter set PMU to generate complete counter set data as
655 * event raw data. This relies on the CPU Measurement Counter Facility device
656 * already being loaded and initialized.
657 */
658 static int __init cf_diag_init(void)
659 {
660 struct cpumf_ctr_info info;
661 size_t need;
662 int rc;
663
664 if (!kernel_cpumcf_avail() || !stccm_avail() || qctri(&info))
665 return -ENODEV;
666 cf_diag_get_cpu_speed();
667
668 /* Make sure the counter set data fits into predefined buffer. */
669 need = cf_diag_ctrset_maxsize(&info);
670 if (need > sizeof(((struct cf_diag_csd *)0)->start)) {
671 pr_err("Insufficient memory for PMU(cpum_cf_diag) need=%zu\n",
672 need);
673 return -ENOMEM;
674 }
675
676 /* Setup s390dbf facility */
677 cf_diag_dbg = debug_register(KMSG_COMPONENT, 2, 1, 128);
678 if (!cf_diag_dbg) {
679 pr_err("Registration of s390dbf(cpum_cf_diag) failed\n");
680 return -ENOMEM;
681 }
682 debug_register_view(cf_diag_dbg, &debug_sprintf_view);
683
684 rc = perf_pmu_register(&cf_diag, "cpum_cf_diag", PERF_TYPE_RAW);
685 if (rc) {
686 debug_unregister_view(cf_diag_dbg, &debug_sprintf_view);
687 debug_unregister(cf_diag_dbg);
688 pr_err("Registration of PMU(cpum_cf_diag) failed with rc=%i\n",
689 rc);
690 }
691 return rc;
692 }
693 arch_initcall(cf_diag_init);