1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
27 #include "kvm_emulate.h"
28 #include "mmu/page_track.h"
37 #include <linux/clocksource.h>
38 #include <linux/interrupt.h>
39 #include <linux/kvm.h>
41 #include <linux/vmalloc.h>
42 #include <linux/export.h>
43 #include <linux/moduleparam.h>
44 #include <linux/mman.h>
45 #include <linux/highmem.h>
46 #include <linux/iommu.h>
47 #include <linux/cpufreq.h>
48 #include <linux/user-return-notifier.h>
49 #include <linux/srcu.h>
50 #include <linux/slab.h>
51 #include <linux/perf_event.h>
52 #include <linux/uaccess.h>
53 #include <linux/hash.h>
54 #include <linux/pci.h>
55 #include <linux/timekeeper_internal.h>
56 #include <linux/pvclock_gtod.h>
57 #include <linux/kvm_irqfd.h>
58 #include <linux/irqbypass.h>
59 #include <linux/sched/stat.h>
60 #include <linux/sched/isolation.h>
61 #include <linux/mem_encrypt.h>
62 #include <linux/entry-kvm.h>
63 #include <linux/suspend.h>
64 #include <linux/smp.h>
66 #include <trace/events/ipi.h>
67 #include <trace/events/kvm.h>
69 #include <asm/debugreg.h>
74 #include <linux/kernel_stat.h>
75 #include <asm/fpu/api.h>
76 #include <asm/fpu/xcr.h>
77 #include <asm/fpu/xstate.h>
78 #include <asm/pvclock.h>
79 #include <asm/div64.h>
80 #include <asm/irq_remapping.h>
81 #include <asm/mshyperv.h>
82 #include <asm/hypervisor.h>
83 #include <asm/tlbflush.h>
84 #include <asm/intel_pt.h>
85 #include <asm/emulate_prefix.h>
87 #include <clocksource/hyperv_timer.h>
89 #define CREATE_TRACE_POINTS
92 #define MAX_IO_MSRS 256
93 #define KVM_MAX_MCE_BANKS 32
95 struct kvm_caps kvm_caps __read_mostly
= {
96 .supported_mce_cap
= MCG_CTL_P
| MCG_SER_P
,
98 EXPORT_SYMBOL_GPL(kvm_caps
);
100 #define ERR_PTR_USR(e) ((void __user *)ERR_PTR(e))
102 #define emul_to_vcpu(ctxt) \
103 ((struct kvm_vcpu *)(ctxt)->vcpu)
106 * - enable syscall per default because its emulated by KVM
107 * - enable LME and LMA per default on 64 bit KVM
111 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
113 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
116 static u64 __read_mostly cr4_reserved_bits
= CR4_RESERVED_BITS
;
118 #define KVM_EXIT_HYPERCALL_VALID_MASK (1 << KVM_HC_MAP_GPA_RANGE)
120 #define KVM_CAP_PMU_VALID_MASK KVM_PMU_CAP_DISABLE
122 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
123 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
125 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
126 static void process_nmi(struct kvm_vcpu
*vcpu
);
127 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
128 static void store_regs(struct kvm_vcpu
*vcpu
);
129 static int sync_regs(struct kvm_vcpu
*vcpu
);
130 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
);
132 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
133 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
);
135 static DEFINE_MUTEX(vendor_module_lock
);
136 struct kvm_x86_ops kvm_x86_ops __read_mostly
;
138 #define KVM_X86_OP(func) \
139 DEFINE_STATIC_CALL_NULL(kvm_x86_##func, \
140 *(((struct kvm_x86_ops *)0)->func));
141 #define KVM_X86_OP_OPTIONAL KVM_X86_OP
142 #define KVM_X86_OP_OPTIONAL_RET0 KVM_X86_OP
143 #include <asm/kvm-x86-ops.h>
144 EXPORT_STATIC_CALL_GPL(kvm_x86_get_cs_db_l_bits
);
145 EXPORT_STATIC_CALL_GPL(kvm_x86_cache_reg
);
147 static bool __read_mostly ignore_msrs
= 0;
148 module_param(ignore_msrs
, bool, 0644);
150 bool __read_mostly report_ignored_msrs
= true;
151 module_param(report_ignored_msrs
, bool, 0644);
152 EXPORT_SYMBOL_GPL(report_ignored_msrs
);
154 unsigned int min_timer_period_us
= 200;
155 module_param(min_timer_period_us
, uint
, 0644);
157 static bool __read_mostly kvmclock_periodic_sync
= true;
158 module_param(kvmclock_periodic_sync
, bool, 0444);
160 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
161 static u32 __read_mostly tsc_tolerance_ppm
= 250;
162 module_param(tsc_tolerance_ppm
, uint
, 0644);
165 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
166 * adaptive tuning starting from default advancement of 1000ns. '0' disables
167 * advancement entirely. Any other value is used as-is and disables adaptive
168 * tuning, i.e. allows privileged userspace to set an exact advancement time.
170 static int __read_mostly lapic_timer_advance_ns
= -1;
171 module_param(lapic_timer_advance_ns
, int, 0644);
173 static bool __read_mostly vector_hashing
= true;
174 module_param(vector_hashing
, bool, 0444);
176 bool __read_mostly enable_vmware_backdoor
= false;
177 module_param(enable_vmware_backdoor
, bool, 0444);
178 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
181 * Flags to manipulate forced emulation behavior (any non-zero value will
182 * enable forced emulation).
184 #define KVM_FEP_CLEAR_RFLAGS_RF BIT(1)
185 static int __read_mostly force_emulation_prefix
;
186 module_param(force_emulation_prefix
, int, 0644);
188 int __read_mostly pi_inject_timer
= -1;
189 module_param(pi_inject_timer
, bint
, 0644);
191 /* Enable/disable PMU virtualization */
192 bool __read_mostly enable_pmu
= true;
193 EXPORT_SYMBOL_GPL(enable_pmu
);
194 module_param(enable_pmu
, bool, 0444);
196 bool __read_mostly eager_page_split
= true;
197 module_param(eager_page_split
, bool, 0644);
199 /* Enable/disable SMT_RSB bug mitigation */
200 static bool __read_mostly mitigate_smt_rsb
;
201 module_param(mitigate_smt_rsb
, bool, 0444);
204 * Restoring the host value for MSRs that are only consumed when running in
205 * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU
206 * returns to userspace, i.e. the kernel can run with the guest's value.
208 #define KVM_MAX_NR_USER_RETURN_MSRS 16
210 struct kvm_user_return_msrs
{
211 struct user_return_notifier urn
;
213 struct kvm_user_return_msr_values
{
216 } values
[KVM_MAX_NR_USER_RETURN_MSRS
];
219 u32 __read_mostly kvm_nr_uret_msrs
;
220 EXPORT_SYMBOL_GPL(kvm_nr_uret_msrs
);
221 static u32 __read_mostly kvm_uret_msrs_list
[KVM_MAX_NR_USER_RETURN_MSRS
];
222 static struct kvm_user_return_msrs __percpu
*user_return_msrs
;
224 #define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP | XFEATURE_MASK_SSE \
225 | XFEATURE_MASK_YMM | XFEATURE_MASK_BNDREGS \
226 | XFEATURE_MASK_BNDCSR | XFEATURE_MASK_AVX512 \
227 | XFEATURE_MASK_PKRU | XFEATURE_MASK_XTILE)
229 u64 __read_mostly host_efer
;
230 EXPORT_SYMBOL_GPL(host_efer
);
232 bool __read_mostly allow_smaller_maxphyaddr
= 0;
233 EXPORT_SYMBOL_GPL(allow_smaller_maxphyaddr
);
235 bool __read_mostly enable_apicv
= true;
236 EXPORT_SYMBOL_GPL(enable_apicv
);
238 u64 __read_mostly host_xss
;
239 EXPORT_SYMBOL_GPL(host_xss
);
241 u64 __read_mostly host_arch_capabilities
;
242 EXPORT_SYMBOL_GPL(host_arch_capabilities
);
244 const struct _kvm_stats_desc kvm_vm_stats_desc
[] = {
245 KVM_GENERIC_VM_STATS(),
246 STATS_DESC_COUNTER(VM
, mmu_shadow_zapped
),
247 STATS_DESC_COUNTER(VM
, mmu_pte_write
),
248 STATS_DESC_COUNTER(VM
, mmu_pde_zapped
),
249 STATS_DESC_COUNTER(VM
, mmu_flooded
),
250 STATS_DESC_COUNTER(VM
, mmu_recycled
),
251 STATS_DESC_COUNTER(VM
, mmu_cache_miss
),
252 STATS_DESC_ICOUNTER(VM
, mmu_unsync
),
253 STATS_DESC_ICOUNTER(VM
, pages_4k
),
254 STATS_DESC_ICOUNTER(VM
, pages_2m
),
255 STATS_DESC_ICOUNTER(VM
, pages_1g
),
256 STATS_DESC_ICOUNTER(VM
, nx_lpage_splits
),
257 STATS_DESC_PCOUNTER(VM
, max_mmu_rmap_size
),
258 STATS_DESC_PCOUNTER(VM
, max_mmu_page_hash_collisions
)
261 const struct kvm_stats_header kvm_vm_stats_header
= {
262 .name_size
= KVM_STATS_NAME_SIZE
,
263 .num_desc
= ARRAY_SIZE(kvm_vm_stats_desc
),
264 .id_offset
= sizeof(struct kvm_stats_header
),
265 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
266 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
267 sizeof(kvm_vm_stats_desc
),
270 const struct _kvm_stats_desc kvm_vcpu_stats_desc
[] = {
271 KVM_GENERIC_VCPU_STATS(),
272 STATS_DESC_COUNTER(VCPU
, pf_taken
),
273 STATS_DESC_COUNTER(VCPU
, pf_fixed
),
274 STATS_DESC_COUNTER(VCPU
, pf_emulate
),
275 STATS_DESC_COUNTER(VCPU
, pf_spurious
),
276 STATS_DESC_COUNTER(VCPU
, pf_fast
),
277 STATS_DESC_COUNTER(VCPU
, pf_mmio_spte_created
),
278 STATS_DESC_COUNTER(VCPU
, pf_guest
),
279 STATS_DESC_COUNTER(VCPU
, tlb_flush
),
280 STATS_DESC_COUNTER(VCPU
, invlpg
),
281 STATS_DESC_COUNTER(VCPU
, exits
),
282 STATS_DESC_COUNTER(VCPU
, io_exits
),
283 STATS_DESC_COUNTER(VCPU
, mmio_exits
),
284 STATS_DESC_COUNTER(VCPU
, signal_exits
),
285 STATS_DESC_COUNTER(VCPU
, irq_window_exits
),
286 STATS_DESC_COUNTER(VCPU
, nmi_window_exits
),
287 STATS_DESC_COUNTER(VCPU
, l1d_flush
),
288 STATS_DESC_COUNTER(VCPU
, halt_exits
),
289 STATS_DESC_COUNTER(VCPU
, request_irq_exits
),
290 STATS_DESC_COUNTER(VCPU
, irq_exits
),
291 STATS_DESC_COUNTER(VCPU
, host_state_reload
),
292 STATS_DESC_COUNTER(VCPU
, fpu_reload
),
293 STATS_DESC_COUNTER(VCPU
, insn_emulation
),
294 STATS_DESC_COUNTER(VCPU
, insn_emulation_fail
),
295 STATS_DESC_COUNTER(VCPU
, hypercalls
),
296 STATS_DESC_COUNTER(VCPU
, irq_injections
),
297 STATS_DESC_COUNTER(VCPU
, nmi_injections
),
298 STATS_DESC_COUNTER(VCPU
, req_event
),
299 STATS_DESC_COUNTER(VCPU
, nested_run
),
300 STATS_DESC_COUNTER(VCPU
, directed_yield_attempted
),
301 STATS_DESC_COUNTER(VCPU
, directed_yield_successful
),
302 STATS_DESC_COUNTER(VCPU
, preemption_reported
),
303 STATS_DESC_COUNTER(VCPU
, preemption_other
),
304 STATS_DESC_IBOOLEAN(VCPU
, guest_mode
),
305 STATS_DESC_COUNTER(VCPU
, notify_window_exits
),
308 const struct kvm_stats_header kvm_vcpu_stats_header
= {
309 .name_size
= KVM_STATS_NAME_SIZE
,
310 .num_desc
= ARRAY_SIZE(kvm_vcpu_stats_desc
),
311 .id_offset
= sizeof(struct kvm_stats_header
),
312 .desc_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
,
313 .data_offset
= sizeof(struct kvm_stats_header
) + KVM_STATS_NAME_SIZE
+
314 sizeof(kvm_vcpu_stats_desc
),
317 u64 __read_mostly host_xcr0
;
319 static struct kmem_cache
*x86_emulator_cache
;
322 * When called, it means the previous get/set msr reached an invalid msr.
323 * Return true if we want to ignore/silent this failed msr access.
325 static bool kvm_msr_ignored_check(u32 msr
, u64 data
, bool write
)
327 const char *op
= write
? "wrmsr" : "rdmsr";
330 if (report_ignored_msrs
)
331 kvm_pr_unimpl("ignored %s: 0x%x data 0x%llx\n",
336 kvm_debug_ratelimited("unhandled %s: 0x%x data 0x%llx\n",
342 static struct kmem_cache
*kvm_alloc_emulator_cache(void)
344 unsigned int useroffset
= offsetof(struct x86_emulate_ctxt
, src
);
345 unsigned int size
= sizeof(struct x86_emulate_ctxt
);
347 return kmem_cache_create_usercopy("x86_emulator", size
,
348 __alignof__(struct x86_emulate_ctxt
),
349 SLAB_ACCOUNT
, useroffset
,
350 size
- useroffset
, NULL
);
353 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
355 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
358 for (i
= 0; i
< ASYNC_PF_PER_VCPU
; i
++)
359 vcpu
->arch
.apf
.gfns
[i
] = ~0;
362 static void kvm_on_user_return(struct user_return_notifier
*urn
)
365 struct kvm_user_return_msrs
*msrs
366 = container_of(urn
, struct kvm_user_return_msrs
, urn
);
367 struct kvm_user_return_msr_values
*values
;
371 * Disabling irqs at this point since the following code could be
372 * interrupted and executed through kvm_arch_hardware_disable()
374 local_irq_save(flags
);
375 if (msrs
->registered
) {
376 msrs
->registered
= false;
377 user_return_notifier_unregister(urn
);
379 local_irq_restore(flags
);
380 for (slot
= 0; slot
< kvm_nr_uret_msrs
; ++slot
) {
381 values
= &msrs
->values
[slot
];
382 if (values
->host
!= values
->curr
) {
383 wrmsrl(kvm_uret_msrs_list
[slot
], values
->host
);
384 values
->curr
= values
->host
;
389 static int kvm_probe_user_return_msr(u32 msr
)
395 ret
= rdmsrl_safe(msr
, &val
);
398 ret
= wrmsrl_safe(msr
, val
);
404 int kvm_add_user_return_msr(u32 msr
)
406 BUG_ON(kvm_nr_uret_msrs
>= KVM_MAX_NR_USER_RETURN_MSRS
);
408 if (kvm_probe_user_return_msr(msr
))
411 kvm_uret_msrs_list
[kvm_nr_uret_msrs
] = msr
;
412 return kvm_nr_uret_msrs
++;
414 EXPORT_SYMBOL_GPL(kvm_add_user_return_msr
);
416 int kvm_find_user_return_msr(u32 msr
)
420 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
421 if (kvm_uret_msrs_list
[i
] == msr
)
426 EXPORT_SYMBOL_GPL(kvm_find_user_return_msr
);
428 static void kvm_user_return_msr_cpu_online(void)
430 unsigned int cpu
= smp_processor_id();
431 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
435 for (i
= 0; i
< kvm_nr_uret_msrs
; ++i
) {
436 rdmsrl_safe(kvm_uret_msrs_list
[i
], &value
);
437 msrs
->values
[i
].host
= value
;
438 msrs
->values
[i
].curr
= value
;
442 int kvm_set_user_return_msr(unsigned slot
, u64 value
, u64 mask
)
444 unsigned int cpu
= smp_processor_id();
445 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
448 value
= (value
& mask
) | (msrs
->values
[slot
].host
& ~mask
);
449 if (value
== msrs
->values
[slot
].curr
)
451 err
= wrmsrl_safe(kvm_uret_msrs_list
[slot
], value
);
455 msrs
->values
[slot
].curr
= value
;
456 if (!msrs
->registered
) {
457 msrs
->urn
.on_user_return
= kvm_on_user_return
;
458 user_return_notifier_register(&msrs
->urn
);
459 msrs
->registered
= true;
463 EXPORT_SYMBOL_GPL(kvm_set_user_return_msr
);
465 static void drop_user_return_notifiers(void)
467 unsigned int cpu
= smp_processor_id();
468 struct kvm_user_return_msrs
*msrs
= per_cpu_ptr(user_return_msrs
, cpu
);
470 if (msrs
->registered
)
471 kvm_on_user_return(&msrs
->urn
);
474 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
476 return vcpu
->arch
.apic_base
;
479 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
481 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
483 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
485 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
487 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
488 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
489 u64 reserved_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
) | 0x2ff |
490 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
492 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
494 if (!msr_info
->host_initiated
) {
495 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
497 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
501 kvm_lapic_set_base(vcpu
, msr_info
->data
);
502 kvm_recalculate_apic_map(vcpu
->kvm
);
507 * Handle a fault on a hardware virtualization (VMX or SVM) instruction.
509 * Hardware virtualization extension instructions may fault if a reboot turns
510 * off virtualization while processes are running. Usually after catching the
511 * fault we just panic; during reboot instead the instruction is ignored.
513 noinstr
void kvm_spurious_fault(void)
515 /* Fault while not rebooting. We want the trace. */
516 BUG_ON(!kvm_rebooting
);
518 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
520 #define EXCPT_BENIGN 0
521 #define EXCPT_CONTRIBUTORY 1
524 static int exception_class(int vector
)
534 return EXCPT_CONTRIBUTORY
;
541 #define EXCPT_FAULT 0
543 #define EXCPT_ABORT 2
544 #define EXCPT_INTERRUPT 3
547 static int exception_type(int vector
)
551 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
552 return EXCPT_INTERRUPT
;
557 * #DBs can be trap-like or fault-like, the caller must check other CPU
558 * state, e.g. DR6, to determine whether a #DB is a trap or fault.
560 if (mask
& (1 << DB_VECTOR
))
563 if (mask
& ((1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
566 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
569 /* Reserved exceptions will result in fault */
573 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
,
574 struct kvm_queued_exception
*ex
)
576 if (!ex
->has_payload
)
579 switch (ex
->vector
) {
582 * "Certain debug exceptions may clear bit 0-3. The
583 * remaining contents of the DR6 register are never
584 * cleared by the processor".
586 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
588 * In order to reflect the #DB exception payload in guest
589 * dr6, three components need to be considered: active low
590 * bit, FIXED_1 bits and active high bits (e.g. DR6_BD,
592 * DR6_ACTIVE_LOW contains the FIXED_1 and active low bits.
593 * In the target guest dr6:
594 * FIXED_1 bits should always be set.
595 * Active low bits should be cleared if 1-setting in payload.
596 * Active high bits should be set if 1-setting in payload.
598 * Note, the payload is compatible with the pending debug
599 * exceptions/exit qualification under VMX, that active_low bits
600 * are active high in payload.
601 * So they need to be flipped for DR6.
603 vcpu
->arch
.dr6
|= DR6_ACTIVE_LOW
;
604 vcpu
->arch
.dr6
|= ex
->payload
;
605 vcpu
->arch
.dr6
^= ex
->payload
& DR6_ACTIVE_LOW
;
608 * The #DB payload is defined as compatible with the 'pending
609 * debug exceptions' field under VMX, not DR6. While bit 12 is
610 * defined in the 'pending debug exceptions' field (enabled
611 * breakpoint), it is reserved and must be zero in DR6.
613 vcpu
->arch
.dr6
&= ~BIT(12);
616 vcpu
->arch
.cr2
= ex
->payload
;
620 ex
->has_payload
= false;
623 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
625 static void kvm_queue_exception_vmexit(struct kvm_vcpu
*vcpu
, unsigned int vector
,
626 bool has_error_code
, u32 error_code
,
627 bool has_payload
, unsigned long payload
)
629 struct kvm_queued_exception
*ex
= &vcpu
->arch
.exception_vmexit
;
632 ex
->injected
= false;
634 ex
->has_error_code
= has_error_code
;
635 ex
->error_code
= error_code
;
636 ex
->has_payload
= has_payload
;
637 ex
->payload
= payload
;
640 /* Forcibly leave the nested mode in cases like a vCPU reset */
641 static void kvm_leave_nested(struct kvm_vcpu
*vcpu
)
643 kvm_x86_ops
.nested_ops
->leave_nested(vcpu
);
646 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
647 unsigned nr
, bool has_error
, u32 error_code
,
648 bool has_payload
, unsigned long payload
, bool reinject
)
653 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
656 * If the exception is destined for L2 and isn't being reinjected,
657 * morph it to a VM-Exit if L1 wants to intercept the exception. A
658 * previously injected exception is not checked because it was checked
659 * when it was original queued, and re-checking is incorrect if _L1_
660 * injected the exception, in which case it's exempt from interception.
662 if (!reinject
&& is_guest_mode(vcpu
) &&
663 kvm_x86_ops
.nested_ops
->is_exception_vmexit(vcpu
, nr
, error_code
)) {
664 kvm_queue_exception_vmexit(vcpu
, nr
, has_error
, error_code
,
665 has_payload
, payload
);
669 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
673 * On VM-Entry, an exception can be pending if and only
674 * if event injection was blocked by nested_run_pending.
675 * In that case, however, vcpu_enter_guest() requests an
676 * immediate exit, and the guest shouldn't proceed far
677 * enough to need reinjection.
679 WARN_ON_ONCE(kvm_is_exception_pending(vcpu
));
680 vcpu
->arch
.exception
.injected
= true;
681 if (WARN_ON_ONCE(has_payload
)) {
683 * A reinjected event has already
684 * delivered its payload.
690 vcpu
->arch
.exception
.pending
= true;
691 vcpu
->arch
.exception
.injected
= false;
693 vcpu
->arch
.exception
.has_error_code
= has_error
;
694 vcpu
->arch
.exception
.vector
= nr
;
695 vcpu
->arch
.exception
.error_code
= error_code
;
696 vcpu
->arch
.exception
.has_payload
= has_payload
;
697 vcpu
->arch
.exception
.payload
= payload
;
698 if (!is_guest_mode(vcpu
))
699 kvm_deliver_exception_payload(vcpu
,
700 &vcpu
->arch
.exception
);
704 /* to check exception */
705 prev_nr
= vcpu
->arch
.exception
.vector
;
706 if (prev_nr
== DF_VECTOR
) {
707 /* triple fault -> shutdown */
708 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
711 class1
= exception_class(prev_nr
);
712 class2
= exception_class(nr
);
713 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
) ||
714 (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
716 * Synthesize #DF. Clear the previously injected or pending
717 * exception so as not to incorrectly trigger shutdown.
719 vcpu
->arch
.exception
.injected
= false;
720 vcpu
->arch
.exception
.pending
= false;
722 kvm_queue_exception_e(vcpu
, DF_VECTOR
, 0);
724 /* replace previous exception with a new one in a hope
725 that instruction re-execution will regenerate lost
731 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
733 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
735 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
737 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
739 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
741 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
743 void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
744 unsigned long payload
)
746 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
748 EXPORT_SYMBOL_GPL(kvm_queue_exception_p
);
750 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
751 u32 error_code
, unsigned long payload
)
753 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
754 true, payload
, false);
757 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
760 kvm_inject_gp(vcpu
, 0);
762 return kvm_skip_emulated_instruction(vcpu
);
766 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
768 static int complete_emulated_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
771 kvm_inject_gp(vcpu
, 0);
775 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
| EMULTYPE_SKIP
|
776 EMULTYPE_COMPLETE_USER_EXIT
);
779 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
781 ++vcpu
->stat
.pf_guest
;
784 * Async #PF in L2 is always forwarded to L1 as a VM-Exit regardless of
785 * whether or not L1 wants to intercept "regular" #PF.
787 if (is_guest_mode(vcpu
) && fault
->async_page_fault
)
788 kvm_queue_exception_vmexit(vcpu
, PF_VECTOR
,
789 true, fault
->error_code
,
790 true, fault
->address
);
792 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
796 void kvm_inject_emulated_page_fault(struct kvm_vcpu
*vcpu
,
797 struct x86_exception
*fault
)
799 struct kvm_mmu
*fault_mmu
;
800 WARN_ON_ONCE(fault
->vector
!= PF_VECTOR
);
802 fault_mmu
= fault
->nested_page_fault
? vcpu
->arch
.mmu
:
806 * Invalidate the TLB entry for the faulting address, if it exists,
807 * else the access will fault indefinitely (and to emulate hardware).
809 if ((fault
->error_code
& PFERR_PRESENT_MASK
) &&
810 !(fault
->error_code
& PFERR_RSVD_MASK
))
811 kvm_mmu_invalidate_addr(vcpu
, fault_mmu
, fault
->address
,
812 KVM_MMU_ROOT_CURRENT
);
814 fault_mmu
->inject_page_fault(vcpu
, fault
);
816 EXPORT_SYMBOL_GPL(kvm_inject_emulated_page_fault
);
818 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
820 atomic_inc(&vcpu
->arch
.nmi_queued
);
821 kvm_make_request(KVM_REQ_NMI
, vcpu
);
824 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
826 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
828 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
830 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
832 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
834 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
837 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
838 * a #GP and return false.
840 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
842 if (static_call(kvm_x86_get_cpl
)(vcpu
) <= required_cpl
)
844 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
848 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
850 if ((dr
!= 4 && dr
!= 5) || !kvm_is_cr4_bit_set(vcpu
, X86_CR4_DE
))
853 kvm_queue_exception(vcpu
, UD_VECTOR
);
856 EXPORT_SYMBOL_GPL(kvm_require_dr
);
858 static inline u64
pdptr_rsvd_bits(struct kvm_vcpu
*vcpu
)
860 return vcpu
->arch
.reserved_gpa_bits
| rsvd_bits(5, 8) | rsvd_bits(1, 2);
864 * Load the pae pdptrs. Return 1 if they are all valid, 0 otherwise.
866 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
868 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
869 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
873 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
876 * If the MMU is nested, CR3 holds an L2 GPA and needs to be translated
879 real_gpa
= kvm_translate_gpa(vcpu
, mmu
, gfn_to_gpa(pdpt_gfn
),
880 PFERR_USER_MASK
| PFERR_WRITE_MASK
, NULL
);
881 if (real_gpa
== INVALID_GPA
)
884 /* Note the offset, PDPTRs are 32 byte aligned when using PAE paging. */
885 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa_to_gfn(real_gpa
), pdpte
,
886 cr3
& GENMASK(11, 5), sizeof(pdpte
));
890 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
891 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
892 (pdpte
[i
] & pdptr_rsvd_bits(vcpu
))) {
898 * Marking VCPU_EXREG_PDPTR dirty doesn't work for !tdp_enabled.
899 * Shadow page roots need to be reconstructed instead.
901 if (!tdp_enabled
&& memcmp(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
)))
902 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, KVM_MMU_ROOT_CURRENT
);
904 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
905 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
906 kvm_make_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
);
907 vcpu
->arch
.pdptrs_from_userspace
= false;
911 EXPORT_SYMBOL_GPL(load_pdptrs
);
913 static bool kvm_is_valid_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
916 if (cr0
& 0xffffffff00000000UL
)
920 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
923 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
926 return static_call(kvm_x86_is_valid_cr0
)(vcpu
, cr0
);
929 void kvm_post_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long old_cr0
, unsigned long cr0
)
932 * CR0.WP is incorporated into the MMU role, but only for non-nested,
933 * indirect shadow MMUs. If paging is disabled, no updates are needed
934 * as there are no permission bits to emulate. If TDP is enabled, the
935 * MMU's metadata needs to be updated, e.g. so that emulating guest
936 * translations does the right thing, but there's no need to unload the
937 * root as CR0.WP doesn't affect SPTEs.
939 if ((cr0
^ old_cr0
) == X86_CR0_WP
) {
940 if (!(cr0
& X86_CR0_PG
))
949 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
950 kvm_clear_async_pf_completion_queue(vcpu
);
951 kvm_async_pf_hash_reset(vcpu
);
954 * Clearing CR0.PG is defined to flush the TLB from the guest's
957 if (!(cr0
& X86_CR0_PG
))
958 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
961 if ((cr0
^ old_cr0
) & KVM_MMU_CR0_ROLE_BITS
)
962 kvm_mmu_reset_context(vcpu
);
964 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
965 kvm_mmu_honors_guest_mtrrs(vcpu
->kvm
) &&
966 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
967 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
969 EXPORT_SYMBOL_GPL(kvm_post_set_cr0
);
971 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
973 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
975 if (!kvm_is_valid_cr0(vcpu
, cr0
))
980 /* Write to CR0 reserved bits are ignored, even on Intel. */
981 cr0
&= ~CR0_RESERVED_BITS
;
984 if ((vcpu
->arch
.efer
& EFER_LME
) && !is_paging(vcpu
) &&
985 (cr0
& X86_CR0_PG
)) {
990 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
995 if (!(vcpu
->arch
.efer
& EFER_LME
) && (cr0
& X86_CR0_PG
) &&
996 is_pae(vcpu
) && ((cr0
^ old_cr0
) & X86_CR0_PDPTR_BITS
) &&
997 !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
1000 if (!(cr0
& X86_CR0_PG
) &&
1001 (is_64_bit_mode(vcpu
) || kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
)))
1004 static_call(kvm_x86_set_cr0
)(vcpu
, cr0
);
1006 kvm_post_set_cr0(vcpu
, old_cr0
, cr0
);
1010 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
1012 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
1014 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
1016 EXPORT_SYMBOL_GPL(kvm_lmsw
);
1018 void kvm_load_guest_xsave_state(struct kvm_vcpu
*vcpu
)
1020 if (vcpu
->arch
.guest_state_protected
)
1023 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_OSXSAVE
)) {
1025 if (vcpu
->arch
.xcr0
!= host_xcr0
)
1026 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
1028 if (guest_can_use(vcpu
, X86_FEATURE_XSAVES
) &&
1029 vcpu
->arch
.ia32_xss
!= host_xss
)
1030 wrmsrl(MSR_IA32_XSS
, vcpu
->arch
.ia32_xss
);
1033 if (cpu_feature_enabled(X86_FEATURE_PKU
) &&
1034 vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
&&
1035 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
1036 kvm_is_cr4_bit_set(vcpu
, X86_CR4_PKE
)))
1037 write_pkru(vcpu
->arch
.pkru
);
1039 EXPORT_SYMBOL_GPL(kvm_load_guest_xsave_state
);
1041 void kvm_load_host_xsave_state(struct kvm_vcpu
*vcpu
)
1043 if (vcpu
->arch
.guest_state_protected
)
1046 if (cpu_feature_enabled(X86_FEATURE_PKU
) &&
1047 ((vcpu
->arch
.xcr0
& XFEATURE_MASK_PKRU
) ||
1048 kvm_is_cr4_bit_set(vcpu
, X86_CR4_PKE
))) {
1049 vcpu
->arch
.pkru
= rdpkru();
1050 if (vcpu
->arch
.pkru
!= vcpu
->arch
.host_pkru
)
1051 write_pkru(vcpu
->arch
.host_pkru
);
1054 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_OSXSAVE
)) {
1056 if (vcpu
->arch
.xcr0
!= host_xcr0
)
1057 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
1059 if (guest_can_use(vcpu
, X86_FEATURE_XSAVES
) &&
1060 vcpu
->arch
.ia32_xss
!= host_xss
)
1061 wrmsrl(MSR_IA32_XSS
, host_xss
);
1065 EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state
);
1067 #ifdef CONFIG_X86_64
1068 static inline u64
kvm_guest_supported_xfd(struct kvm_vcpu
*vcpu
)
1070 return vcpu
->arch
.guest_supported_xcr0
& XFEATURE_MASK_USER_DYNAMIC
;
1074 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
1077 u64 old_xcr0
= vcpu
->arch
.xcr0
;
1080 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
1081 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
1083 if (!(xcr0
& XFEATURE_MASK_FP
))
1085 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
1089 * Do not allow the guest to set bits that we do not support
1090 * saving. However, xcr0 bit 0 is always set, even if the
1091 * emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
1093 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
1094 if (xcr0
& ~valid_bits
)
1097 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
1098 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
1101 if (xcr0
& XFEATURE_MASK_AVX512
) {
1102 if (!(xcr0
& XFEATURE_MASK_YMM
))
1104 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
1108 if ((xcr0
& XFEATURE_MASK_XTILE
) &&
1109 ((xcr0
& XFEATURE_MASK_XTILE
) != XFEATURE_MASK_XTILE
))
1112 vcpu
->arch
.xcr0
= xcr0
;
1114 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
1115 kvm_update_cpuid_runtime(vcpu
);
1119 int kvm_emulate_xsetbv(struct kvm_vcpu
*vcpu
)
1121 /* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
1122 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0 ||
1123 __kvm_set_xcr(vcpu
, kvm_rcx_read(vcpu
), kvm_read_edx_eax(vcpu
))) {
1124 kvm_inject_gp(vcpu
, 0);
1128 return kvm_skip_emulated_instruction(vcpu
);
1130 EXPORT_SYMBOL_GPL(kvm_emulate_xsetbv
);
1132 bool __kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1134 if (cr4
& cr4_reserved_bits
)
1137 if (cr4
& vcpu
->arch
.cr4_guest_rsvd_bits
)
1142 EXPORT_SYMBOL_GPL(__kvm_is_valid_cr4
);
1144 static bool kvm_is_valid_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1146 return __kvm_is_valid_cr4(vcpu
, cr4
) &&
1147 static_call(kvm_x86_is_valid_cr4
)(vcpu
, cr4
);
1150 void kvm_post_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long old_cr4
, unsigned long cr4
)
1152 if ((cr4
^ old_cr4
) & KVM_MMU_CR4_ROLE_BITS
)
1153 kvm_mmu_reset_context(vcpu
);
1156 * If CR4.PCIDE is changed 0 -> 1, there is no need to flush the TLB
1157 * according to the SDM; however, stale prev_roots could be reused
1158 * incorrectly in the future after a MOV to CR3 with NOFLUSH=1, so we
1159 * free them all. This is *not* a superset of KVM_REQ_TLB_FLUSH_GUEST
1160 * or KVM_REQ_TLB_FLUSH_CURRENT, because the hardware TLB is not flushed,
1164 (cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
))
1165 kvm_mmu_unload(vcpu
);
1168 * The TLB has to be flushed for all PCIDs if any of the following
1169 * (architecturally required) changes happen:
1170 * - CR4.PCIDE is changed from 1 to 0
1171 * - CR4.PGE is toggled
1173 * This is a superset of KVM_REQ_TLB_FLUSH_CURRENT.
1175 if (((cr4
^ old_cr4
) & X86_CR4_PGE
) ||
1176 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
1177 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1180 * The TLB has to be flushed for the current PCID if any of the
1181 * following (architecturally required) changes happen:
1182 * - CR4.SMEP is changed from 0 to 1
1183 * - CR4.PAE is toggled
1185 else if (((cr4
^ old_cr4
) & X86_CR4_PAE
) ||
1186 ((cr4
& X86_CR4_SMEP
) && !(old_cr4
& X86_CR4_SMEP
)))
1187 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1190 EXPORT_SYMBOL_GPL(kvm_post_set_cr4
);
1192 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1194 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
1196 if (!kvm_is_valid_cr4(vcpu
, cr4
))
1199 if (is_long_mode(vcpu
)) {
1200 if (!(cr4
& X86_CR4_PAE
))
1202 if ((cr4
^ old_cr4
) & X86_CR4_LA57
)
1204 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
1205 && ((cr4
^ old_cr4
) & X86_CR4_PDPTR_BITS
)
1206 && !load_pdptrs(vcpu
, kvm_read_cr3(vcpu
)))
1209 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
1210 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
1211 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
1215 static_call(kvm_x86_set_cr4
)(vcpu
, cr4
);
1217 kvm_post_set_cr4(vcpu
, old_cr4
, cr4
);
1221 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
1223 static void kvm_invalidate_pcid(struct kvm_vcpu
*vcpu
, unsigned long pcid
)
1225 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
1226 unsigned long roots_to_free
= 0;
1230 * MOV CR3 and INVPCID are usually not intercepted when using TDP, but
1231 * this is reachable when running EPT=1 and unrestricted_guest=0, and
1232 * also via the emulator. KVM's TDP page tables are not in the scope of
1233 * the invalidation, but the guest's TLB entries need to be flushed as
1234 * the CPU may have cached entries in its TLB for the target PCID.
1236 if (unlikely(tdp_enabled
)) {
1237 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
1242 * If neither the current CR3 nor any of the prev_roots use the given
1243 * PCID, then nothing needs to be done here because a resync will
1244 * happen anyway before switching to any other CR3.
1246 if (kvm_get_active_pcid(vcpu
) == pcid
) {
1247 kvm_make_request(KVM_REQ_MMU_SYNC
, vcpu
);
1248 kvm_make_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
1252 * If PCID is disabled, there is no need to free prev_roots even if the
1253 * PCIDs for them are also 0, because MOV to CR3 always flushes the TLB
1256 if (!kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
))
1259 for (i
= 0; i
< KVM_MMU_NUM_PREV_ROOTS
; i
++)
1260 if (kvm_get_pcid(vcpu
, mmu
->prev_roots
[i
].pgd
) == pcid
)
1261 roots_to_free
|= KVM_MMU_ROOT_PREVIOUS(i
);
1263 kvm_mmu_free_roots(vcpu
->kvm
, mmu
, roots_to_free
);
1266 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
1268 bool skip_tlb_flush
= false;
1269 unsigned long pcid
= 0;
1270 #ifdef CONFIG_X86_64
1271 if (kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
)) {
1272 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
1273 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
1274 pcid
= cr3
& X86_CR3_PCID_MASK
;
1278 /* PDPTRs are always reloaded for PAE paging. */
1279 if (cr3
== kvm_read_cr3(vcpu
) && !is_pae_paging(vcpu
))
1280 goto handle_tlb_flush
;
1283 * Do not condition the GPA check on long mode, this helper is used to
1284 * stuff CR3, e.g. for RSM emulation, and there is no guarantee that
1285 * the current vCPU mode is accurate.
1287 if (kvm_vcpu_is_illegal_gpa(vcpu
, cr3
))
1290 if (is_pae_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
))
1293 if (cr3
!= kvm_read_cr3(vcpu
))
1294 kvm_mmu_new_pgd(vcpu
, cr3
);
1296 vcpu
->arch
.cr3
= cr3
;
1297 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
1298 /* Do not call post_set_cr3, we do not get here for confidential guests. */
1302 * A load of CR3 that flushes the TLB flushes only the current PCID,
1303 * even if PCID is disabled, in which case PCID=0 is flushed. It's a
1304 * moot point in the end because _disabling_ PCID will flush all PCIDs,
1305 * and it's impossible to use a non-zero PCID when PCID is disabled,
1306 * i.e. only PCID=0 can be relevant.
1308 if (!skip_tlb_flush
)
1309 kvm_invalidate_pcid(vcpu
, pcid
);
1313 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
1315 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
1317 if (cr8
& CR8_RESERVED_BITS
)
1319 if (lapic_in_kernel(vcpu
))
1320 kvm_lapic_set_tpr(vcpu
, cr8
);
1322 vcpu
->arch
.cr8
= cr8
;
1325 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
1327 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
1329 if (lapic_in_kernel(vcpu
))
1330 return kvm_lapic_get_cr8(vcpu
);
1332 return vcpu
->arch
.cr8
;
1334 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
1336 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
1340 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1341 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1342 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1346 void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1350 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1351 dr7
= vcpu
->arch
.guest_debug_dr7
;
1353 dr7
= vcpu
->arch
.dr7
;
1354 static_call(kvm_x86_set_dr7
)(vcpu
, dr7
);
1355 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1356 if (dr7
& DR7_BP_EN_MASK
)
1357 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1359 EXPORT_SYMBOL_GPL(kvm_update_dr7
);
1361 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1363 u64 fixed
= DR6_FIXED_1
;
1365 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1368 if (!guest_cpuid_has(vcpu
, X86_FEATURE_BUS_LOCK_DETECT
))
1369 fixed
|= DR6_BUS_LOCK
;
1373 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1375 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1379 vcpu
->arch
.db
[array_index_nospec(dr
, size
)] = val
;
1380 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1381 vcpu
->arch
.eff_db
[dr
] = val
;
1385 if (!kvm_dr6_valid(val
))
1387 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1391 if (!kvm_dr7_valid(val
))
1393 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1394 kvm_update_dr7(vcpu
);
1400 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1402 void kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1404 size_t size
= ARRAY_SIZE(vcpu
->arch
.db
);
1408 *val
= vcpu
->arch
.db
[array_index_nospec(dr
, size
)];
1412 *val
= vcpu
->arch
.dr6
;
1416 *val
= vcpu
->arch
.dr7
;
1420 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1422 int kvm_emulate_rdpmc(struct kvm_vcpu
*vcpu
)
1424 u32 ecx
= kvm_rcx_read(vcpu
);
1427 if (kvm_pmu_rdpmc(vcpu
, ecx
, &data
)) {
1428 kvm_inject_gp(vcpu
, 0);
1432 kvm_rax_write(vcpu
, (u32
)data
);
1433 kvm_rdx_write(vcpu
, data
>> 32);
1434 return kvm_skip_emulated_instruction(vcpu
);
1436 EXPORT_SYMBOL_GPL(kvm_emulate_rdpmc
);
1439 * The three MSR lists(msrs_to_save, emulated_msrs, msr_based_features) track
1440 * the set of MSRs that KVM exposes to userspace through KVM_GET_MSRS,
1441 * KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST. msrs_to_save holds MSRs that
1442 * require host support, i.e. should be probed via RDMSR. emulated_msrs holds
1443 * MSRs that KVM emulates without strictly requiring host support.
1444 * msr_based_features holds MSRs that enumerate features, i.e. are effectively
1445 * CPUID leafs. Note, msr_based_features isn't mutually exclusive with
1446 * msrs_to_save and emulated_msrs.
1449 static const u32 msrs_to_save_base
[] = {
1450 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1452 #ifdef CONFIG_X86_64
1453 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1455 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1456 MSR_IA32_FEAT_CTL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1457 MSR_IA32_SPEC_CTRL
, MSR_IA32_TSX_CTRL
,
1458 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1459 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1460 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1461 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1462 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1463 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1464 MSR_IA32_UMWAIT_CONTROL
,
1466 MSR_IA32_XFD
, MSR_IA32_XFD_ERR
,
1469 static const u32 msrs_to_save_pmu
[] = {
1470 MSR_ARCH_PERFMON_FIXED_CTR0
, MSR_ARCH_PERFMON_FIXED_CTR1
,
1471 MSR_ARCH_PERFMON_FIXED_CTR0
+ 2,
1472 MSR_CORE_PERF_FIXED_CTR_CTRL
, MSR_CORE_PERF_GLOBAL_STATUS
,
1473 MSR_CORE_PERF_GLOBAL_CTRL
, MSR_CORE_PERF_GLOBAL_OVF_CTRL
,
1474 MSR_IA32_PEBS_ENABLE
, MSR_IA32_DS_AREA
, MSR_PEBS_DATA_CFG
,
1476 /* This part of MSRs should match KVM_INTEL_PMC_MAX_GENERIC. */
1477 MSR_ARCH_PERFMON_PERFCTR0
, MSR_ARCH_PERFMON_PERFCTR1
,
1478 MSR_ARCH_PERFMON_PERFCTR0
+ 2, MSR_ARCH_PERFMON_PERFCTR0
+ 3,
1479 MSR_ARCH_PERFMON_PERFCTR0
+ 4, MSR_ARCH_PERFMON_PERFCTR0
+ 5,
1480 MSR_ARCH_PERFMON_PERFCTR0
+ 6, MSR_ARCH_PERFMON_PERFCTR0
+ 7,
1481 MSR_ARCH_PERFMON_EVENTSEL0
, MSR_ARCH_PERFMON_EVENTSEL1
,
1482 MSR_ARCH_PERFMON_EVENTSEL0
+ 2, MSR_ARCH_PERFMON_EVENTSEL0
+ 3,
1483 MSR_ARCH_PERFMON_EVENTSEL0
+ 4, MSR_ARCH_PERFMON_EVENTSEL0
+ 5,
1484 MSR_ARCH_PERFMON_EVENTSEL0
+ 6, MSR_ARCH_PERFMON_EVENTSEL0
+ 7,
1486 MSR_K7_EVNTSEL0
, MSR_K7_EVNTSEL1
, MSR_K7_EVNTSEL2
, MSR_K7_EVNTSEL3
,
1487 MSR_K7_PERFCTR0
, MSR_K7_PERFCTR1
, MSR_K7_PERFCTR2
, MSR_K7_PERFCTR3
,
1489 /* This part of MSRs should match KVM_AMD_PMC_MAX_GENERIC. */
1490 MSR_F15H_PERF_CTL0
, MSR_F15H_PERF_CTL1
, MSR_F15H_PERF_CTL2
,
1491 MSR_F15H_PERF_CTL3
, MSR_F15H_PERF_CTL4
, MSR_F15H_PERF_CTL5
,
1492 MSR_F15H_PERF_CTR0
, MSR_F15H_PERF_CTR1
, MSR_F15H_PERF_CTR2
,
1493 MSR_F15H_PERF_CTR3
, MSR_F15H_PERF_CTR4
, MSR_F15H_PERF_CTR5
,
1495 MSR_AMD64_PERF_CNTR_GLOBAL_CTL
,
1496 MSR_AMD64_PERF_CNTR_GLOBAL_STATUS
,
1497 MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR
,
1500 static u32 msrs_to_save
[ARRAY_SIZE(msrs_to_save_base
) +
1501 ARRAY_SIZE(msrs_to_save_pmu
)];
1502 static unsigned num_msrs_to_save
;
1504 static const u32 emulated_msrs_all
[] = {
1505 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1506 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1508 #ifdef CONFIG_KVM_HYPERV
1509 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1510 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1511 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1512 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1513 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1515 HV_X64_MSR_VP_INDEX
,
1516 HV_X64_MSR_VP_RUNTIME
,
1517 HV_X64_MSR_SCONTROL
,
1518 HV_X64_MSR_STIMER0_CONFIG
,
1519 HV_X64_MSR_VP_ASSIST_PAGE
,
1520 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1521 HV_X64_MSR_TSC_EMULATION_STATUS
, HV_X64_MSR_TSC_INVARIANT_CONTROL
,
1522 HV_X64_MSR_SYNDBG_OPTIONS
,
1523 HV_X64_MSR_SYNDBG_CONTROL
, HV_X64_MSR_SYNDBG_STATUS
,
1524 HV_X64_MSR_SYNDBG_SEND_BUFFER
, HV_X64_MSR_SYNDBG_RECV_BUFFER
,
1525 HV_X64_MSR_SYNDBG_PENDING_BUFFER
,
1528 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1529 MSR_KVM_PV_EOI_EN
, MSR_KVM_ASYNC_PF_INT
, MSR_KVM_ASYNC_PF_ACK
,
1531 MSR_IA32_TSC_ADJUST
,
1532 MSR_IA32_TSC_DEADLINE
,
1533 MSR_IA32_ARCH_CAPABILITIES
,
1534 MSR_IA32_PERF_CAPABILITIES
,
1535 MSR_IA32_MISC_ENABLE
,
1536 MSR_IA32_MCG_STATUS
,
1538 MSR_IA32_MCG_EXT_CTL
,
1542 MSR_MISC_FEATURES_ENABLES
,
1543 MSR_AMD64_VIRT_SPEC_CTRL
,
1544 MSR_AMD64_TSC_RATIO
,
1549 * KVM always supports the "true" VMX control MSRs, even if the host
1550 * does not. The VMX MSRs as a whole are considered "emulated" as KVM
1551 * doesn't strictly require them to exist in the host (ignoring that
1552 * KVM would refuse to load in the first place if the core set of MSRs
1553 * aren't supported).
1556 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1557 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1558 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1559 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1561 MSR_IA32_VMX_CR0_FIXED0
,
1562 MSR_IA32_VMX_CR4_FIXED0
,
1563 MSR_IA32_VMX_VMCS_ENUM
,
1564 MSR_IA32_VMX_PROCBASED_CTLS2
,
1565 MSR_IA32_VMX_EPT_VPID_CAP
,
1566 MSR_IA32_VMX_VMFUNC
,
1569 MSR_KVM_POLL_CONTROL
,
1572 static u32 emulated_msrs
[ARRAY_SIZE(emulated_msrs_all
)];
1573 static unsigned num_emulated_msrs
;
1576 * List of MSRs that control the existence of MSR-based features, i.e. MSRs
1577 * that are effectively CPUID leafs. VMX MSRs are also included in the set of
1578 * feature MSRs, but are handled separately to allow expedited lookups.
1580 static const u32 msr_based_features_all_except_vmx
[] = {
1583 MSR_IA32_ARCH_CAPABILITIES
,
1584 MSR_IA32_PERF_CAPABILITIES
,
1587 static u32 msr_based_features
[ARRAY_SIZE(msr_based_features_all_except_vmx
) +
1588 (KVM_LAST_EMULATED_VMX_MSR
- KVM_FIRST_EMULATED_VMX_MSR
+ 1)];
1589 static unsigned int num_msr_based_features
;
1592 * All feature MSRs except uCode revID, which tracks the currently loaded uCode
1593 * patch, are immutable once the vCPU model is defined.
1595 static bool kvm_is_immutable_feature_msr(u32 msr
)
1599 if (msr
>= KVM_FIRST_EMULATED_VMX_MSR
&& msr
<= KVM_LAST_EMULATED_VMX_MSR
)
1602 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all_except_vmx
); i
++) {
1603 if (msr
== msr_based_features_all_except_vmx
[i
])
1604 return msr
!= MSR_IA32_UCODE_REV
;
1611 * Some IA32_ARCH_CAPABILITIES bits have dependencies on MSRs that KVM
1612 * does not yet virtualize. These include:
1613 * 10 - MISC_PACKAGE_CTRLS
1614 * 11 - ENERGY_FILTERING_CTL
1616 * 18 - FB_CLEAR_CTRL
1617 * 21 - XAPIC_DISABLE_STATUS
1618 * 23 - OVERCLOCKING_STATUS
1621 #define KVM_SUPPORTED_ARCH_CAP \
1622 (ARCH_CAP_RDCL_NO | ARCH_CAP_IBRS_ALL | ARCH_CAP_RSBA | \
1623 ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
1624 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
1625 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
1626 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO | ARCH_CAP_GDS_NO)
1628 static u64
kvm_get_arch_capabilities(void)
1630 u64 data
= host_arch_capabilities
& KVM_SUPPORTED_ARCH_CAP
;
1633 * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1634 * the nested hypervisor runs with NX huge pages. If it is not,
1635 * L1 is anyway vulnerable to ITLB_MULTIHIT exploits from other
1636 * L1 guests, so it need not worry about its own (L2) guests.
1638 data
|= ARCH_CAP_PSCHANGE_MC_NO
;
1641 * If we're doing cache flushes (either "always" or "cond")
1642 * we will do one whenever the guest does a vmlaunch/vmresume.
1643 * If an outer hypervisor is doing the cache flush for us
1644 * (ARCH_CAP_SKIP_VMENTRY_L1DFLUSH), we can safely pass that
1645 * capability to the guest too, and if EPT is disabled we're not
1646 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1647 * require a nested hypervisor to do a flush of its own.
1649 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1650 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1652 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
1653 data
|= ARCH_CAP_RDCL_NO
;
1654 if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS
))
1655 data
|= ARCH_CAP_SSB_NO
;
1656 if (!boot_cpu_has_bug(X86_BUG_MDS
))
1657 data
|= ARCH_CAP_MDS_NO
;
1659 if (!boot_cpu_has(X86_FEATURE_RTM
)) {
1661 * If RTM=0 because the kernel has disabled TSX, the host might
1662 * have TAA_NO or TSX_CTRL. Clear TAA_NO (the guest sees RTM=0
1663 * and therefore knows that there cannot be TAA) but keep
1664 * TSX_CTRL: some buggy userspaces leave it set on tsx=on hosts,
1665 * and we want to allow migrating those guests to tsx=off hosts.
1667 data
&= ~ARCH_CAP_TAA_NO
;
1668 } else if (!boot_cpu_has_bug(X86_BUG_TAA
)) {
1669 data
|= ARCH_CAP_TAA_NO
;
1672 * Nothing to do here; we emulate TSX_CTRL if present on the
1673 * host so the guest can choose between disabling TSX or
1674 * using VERW to clear CPU buffers.
1678 if (!boot_cpu_has_bug(X86_BUG_GDS
) || gds_ucode_mitigated())
1679 data
|= ARCH_CAP_GDS_NO
;
1684 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1686 switch (msr
->index
) {
1687 case MSR_IA32_ARCH_CAPABILITIES
:
1688 msr
->data
= kvm_get_arch_capabilities();
1690 case MSR_IA32_PERF_CAPABILITIES
:
1691 msr
->data
= kvm_caps
.supported_perf_cap
;
1693 case MSR_IA32_UCODE_REV
:
1694 rdmsrl_safe(msr
->index
, &msr
->data
);
1697 return static_call(kvm_x86_get_msr_feature
)(msr
);
1702 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1704 struct kvm_msr_entry msr
;
1708 r
= kvm_get_msr_feature(&msr
);
1710 if (r
== KVM_MSR_RET_INVALID
) {
1711 /* Unconditionally clear the output for simplicity */
1713 if (kvm_msr_ignored_check(index
, 0, false))
1725 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1727 if (efer
& EFER_AUTOIBRS
&& !guest_cpuid_has(vcpu
, X86_FEATURE_AUTOIBRS
))
1730 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1733 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1736 if (efer
& (EFER_LME
| EFER_LMA
) &&
1737 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1740 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1746 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1748 if (efer
& efer_reserved_bits
)
1751 return __kvm_valid_efer(vcpu
, efer
);
1753 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1755 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1757 u64 old_efer
= vcpu
->arch
.efer
;
1758 u64 efer
= msr_info
->data
;
1761 if (efer
& efer_reserved_bits
)
1764 if (!msr_info
->host_initiated
) {
1765 if (!__kvm_valid_efer(vcpu
, efer
))
1768 if (is_paging(vcpu
) &&
1769 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1774 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1776 r
= static_call(kvm_x86_set_efer
)(vcpu
, efer
);
1782 if ((efer
^ old_efer
) & KVM_MMU_EFER_ROLE_BITS
)
1783 kvm_mmu_reset_context(vcpu
);
1788 void kvm_enable_efer_bits(u64 mask
)
1790 efer_reserved_bits
&= ~mask
;
1792 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1794 bool kvm_msr_allowed(struct kvm_vcpu
*vcpu
, u32 index
, u32 type
)
1796 struct kvm_x86_msr_filter
*msr_filter
;
1797 struct msr_bitmap_range
*ranges
;
1798 struct kvm
*kvm
= vcpu
->kvm
;
1803 /* x2APIC MSRs do not support filtering. */
1804 if (index
>= 0x800 && index
<= 0x8ff)
1807 idx
= srcu_read_lock(&kvm
->srcu
);
1809 msr_filter
= srcu_dereference(kvm
->arch
.msr_filter
, &kvm
->srcu
);
1815 allowed
= msr_filter
->default_allow
;
1816 ranges
= msr_filter
->ranges
;
1818 for (i
= 0; i
< msr_filter
->count
; i
++) {
1819 u32 start
= ranges
[i
].base
;
1820 u32 end
= start
+ ranges
[i
].nmsrs
;
1821 u32 flags
= ranges
[i
].flags
;
1822 unsigned long *bitmap
= ranges
[i
].bitmap
;
1824 if ((index
>= start
) && (index
< end
) && (flags
& type
)) {
1825 allowed
= test_bit(index
- start
, bitmap
);
1831 srcu_read_unlock(&kvm
->srcu
, idx
);
1835 EXPORT_SYMBOL_GPL(kvm_msr_allowed
);
1838 * Write @data into the MSR specified by @index. Select MSR specific fault
1839 * checks are bypassed if @host_initiated is %true.
1840 * Returns 0 on success, non-0 otherwise.
1841 * Assumes vcpu_load() was already called.
1843 static int __kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
,
1844 bool host_initiated
)
1846 struct msr_data msr
;
1851 case MSR_KERNEL_GS_BASE
:
1854 if (is_noncanonical_address(data
, vcpu
))
1857 case MSR_IA32_SYSENTER_EIP
:
1858 case MSR_IA32_SYSENTER_ESP
:
1860 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1861 * non-canonical address is written on Intel but not on
1862 * AMD (which ignores the top 32-bits, because it does
1863 * not implement 64-bit SYSENTER).
1865 * 64-bit code should hence be able to write a non-canonical
1866 * value on AMD. Making the address canonical ensures that
1867 * vmentry does not fail on Intel after writing a non-canonical
1868 * value, and that something deterministic happens if the guest
1869 * invokes 64-bit SYSENTER.
1871 data
= __canonical_address(data
, vcpu_virt_addr_bits(vcpu
));
1874 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1877 if (!host_initiated
&&
1878 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1879 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1883 * Per Intel's SDM, bits 63:32 are reserved, but AMD's APM has
1884 * incomplete and conflicting architectural behavior. Current
1885 * AMD CPUs completely ignore bits 63:32, i.e. they aren't
1886 * reserved and always read as zeros. Enforce Intel's reserved
1887 * bits check if and only if the guest CPU is Intel, and clear
1888 * the bits in all other cases. This ensures cross-vendor
1889 * migration will provide consistent behavior for the guest.
1891 if (guest_cpuid_is_intel(vcpu
) && (data
>> 32) != 0)
1900 msr
.host_initiated
= host_initiated
;
1902 return static_call(kvm_x86_set_msr
)(vcpu
, &msr
);
1905 static int kvm_set_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1906 u32 index
, u64 data
, bool host_initiated
)
1908 int ret
= __kvm_set_msr(vcpu
, index
, data
, host_initiated
);
1910 if (ret
== KVM_MSR_RET_INVALID
)
1911 if (kvm_msr_ignored_check(index
, data
, true))
1918 * Read the MSR specified by @index into @data. Select MSR specific fault
1919 * checks are bypassed if @host_initiated is %true.
1920 * Returns 0 on success, non-0 otherwise.
1921 * Assumes vcpu_load() was already called.
1923 int __kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
,
1924 bool host_initiated
)
1926 struct msr_data msr
;
1931 if (!kvm_is_supported_user_return_msr(MSR_TSC_AUX
))
1934 if (!host_initiated
&&
1935 !guest_cpuid_has(vcpu
, X86_FEATURE_RDTSCP
) &&
1936 !guest_cpuid_has(vcpu
, X86_FEATURE_RDPID
))
1942 msr
.host_initiated
= host_initiated
;
1944 ret
= static_call(kvm_x86_get_msr
)(vcpu
, &msr
);
1950 static int kvm_get_msr_ignored_check(struct kvm_vcpu
*vcpu
,
1951 u32 index
, u64
*data
, bool host_initiated
)
1953 int ret
= __kvm_get_msr(vcpu
, index
, data
, host_initiated
);
1955 if (ret
== KVM_MSR_RET_INVALID
) {
1956 /* Unconditionally clear *data for simplicity */
1958 if (kvm_msr_ignored_check(index
, 0, false))
1965 static int kvm_get_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1967 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_READ
))
1968 return KVM_MSR_RET_FILTERED
;
1969 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1972 static int kvm_set_msr_with_filter(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1974 if (!kvm_msr_allowed(vcpu
, index
, KVM_MSR_FILTER_WRITE
))
1975 return KVM_MSR_RET_FILTERED
;
1976 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1979 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64
*data
)
1981 return kvm_get_msr_ignored_check(vcpu
, index
, data
, false);
1983 EXPORT_SYMBOL_GPL(kvm_get_msr
);
1985 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 index
, u64 data
)
1987 return kvm_set_msr_ignored_check(vcpu
, index
, data
, false);
1989 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1991 static void complete_userspace_rdmsr(struct kvm_vcpu
*vcpu
)
1993 if (!vcpu
->run
->msr
.error
) {
1994 kvm_rax_write(vcpu
, (u32
)vcpu
->run
->msr
.data
);
1995 kvm_rdx_write(vcpu
, vcpu
->run
->msr
.data
>> 32);
1999 static int complete_emulated_msr_access(struct kvm_vcpu
*vcpu
)
2001 return complete_emulated_insn_gp(vcpu
, vcpu
->run
->msr
.error
);
2004 static int complete_emulated_rdmsr(struct kvm_vcpu
*vcpu
)
2006 complete_userspace_rdmsr(vcpu
);
2007 return complete_emulated_msr_access(vcpu
);
2010 static int complete_fast_msr_access(struct kvm_vcpu
*vcpu
)
2012 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, vcpu
->run
->msr
.error
);
2015 static int complete_fast_rdmsr(struct kvm_vcpu
*vcpu
)
2017 complete_userspace_rdmsr(vcpu
);
2018 return complete_fast_msr_access(vcpu
);
2021 static u64
kvm_msr_reason(int r
)
2024 case KVM_MSR_RET_INVALID
:
2025 return KVM_MSR_EXIT_REASON_UNKNOWN
;
2026 case KVM_MSR_RET_FILTERED
:
2027 return KVM_MSR_EXIT_REASON_FILTER
;
2029 return KVM_MSR_EXIT_REASON_INVAL
;
2033 static int kvm_msr_user_space(struct kvm_vcpu
*vcpu
, u32 index
,
2034 u32 exit_reason
, u64 data
,
2035 int (*completion
)(struct kvm_vcpu
*vcpu
),
2038 u64 msr_reason
= kvm_msr_reason(r
);
2040 /* Check if the user wanted to know about this MSR fault */
2041 if (!(vcpu
->kvm
->arch
.user_space_msr_mask
& msr_reason
))
2044 vcpu
->run
->exit_reason
= exit_reason
;
2045 vcpu
->run
->msr
.error
= 0;
2046 memset(vcpu
->run
->msr
.pad
, 0, sizeof(vcpu
->run
->msr
.pad
));
2047 vcpu
->run
->msr
.reason
= msr_reason
;
2048 vcpu
->run
->msr
.index
= index
;
2049 vcpu
->run
->msr
.data
= data
;
2050 vcpu
->arch
.complete_userspace_io
= completion
;
2055 int kvm_emulate_rdmsr(struct kvm_vcpu
*vcpu
)
2057 u32 ecx
= kvm_rcx_read(vcpu
);
2061 r
= kvm_get_msr_with_filter(vcpu
, ecx
, &data
);
2064 trace_kvm_msr_read(ecx
, data
);
2066 kvm_rax_write(vcpu
, data
& -1u);
2067 kvm_rdx_write(vcpu
, (data
>> 32) & -1u);
2069 /* MSR read failed? See if we should ask user space */
2070 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_RDMSR
, 0,
2071 complete_fast_rdmsr
, r
))
2073 trace_kvm_msr_read_ex(ecx
);
2076 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2078 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr
);
2080 int kvm_emulate_wrmsr(struct kvm_vcpu
*vcpu
)
2082 u32 ecx
= kvm_rcx_read(vcpu
);
2083 u64 data
= kvm_read_edx_eax(vcpu
);
2086 r
= kvm_set_msr_with_filter(vcpu
, ecx
, data
);
2089 trace_kvm_msr_write(ecx
, data
);
2091 /* MSR write failed? See if we should ask user space */
2092 if (kvm_msr_user_space(vcpu
, ecx
, KVM_EXIT_X86_WRMSR
, data
,
2093 complete_fast_msr_access
, r
))
2095 /* Signal all other negative errors to userspace */
2098 trace_kvm_msr_write_ex(ecx
, data
);
2101 return static_call(kvm_x86_complete_emulated_msr
)(vcpu
, r
);
2103 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr
);
2105 int kvm_emulate_as_nop(struct kvm_vcpu
*vcpu
)
2107 return kvm_skip_emulated_instruction(vcpu
);
2110 int kvm_emulate_invd(struct kvm_vcpu
*vcpu
)
2112 /* Treat an INVD instruction as a NOP and just skip it. */
2113 return kvm_emulate_as_nop(vcpu
);
2115 EXPORT_SYMBOL_GPL(kvm_emulate_invd
);
2117 int kvm_handle_invalid_op(struct kvm_vcpu
*vcpu
)
2119 kvm_queue_exception(vcpu
, UD_VECTOR
);
2122 EXPORT_SYMBOL_GPL(kvm_handle_invalid_op
);
2125 static int kvm_emulate_monitor_mwait(struct kvm_vcpu
*vcpu
, const char *insn
)
2127 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS
) &&
2128 !guest_cpuid_has(vcpu
, X86_FEATURE_MWAIT
))
2129 return kvm_handle_invalid_op(vcpu
);
2131 pr_warn_once("%s instruction emulated as NOP!\n", insn
);
2132 return kvm_emulate_as_nop(vcpu
);
2134 int kvm_emulate_mwait(struct kvm_vcpu
*vcpu
)
2136 return kvm_emulate_monitor_mwait(vcpu
, "MWAIT");
2138 EXPORT_SYMBOL_GPL(kvm_emulate_mwait
);
2140 int kvm_emulate_monitor(struct kvm_vcpu
*vcpu
)
2142 return kvm_emulate_monitor_mwait(vcpu
, "MONITOR");
2144 EXPORT_SYMBOL_GPL(kvm_emulate_monitor
);
2146 static inline bool kvm_vcpu_exit_request(struct kvm_vcpu
*vcpu
)
2148 xfer_to_guest_mode_prepare();
2149 return vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
) ||
2150 xfer_to_guest_mode_work_pending();
2154 * The fast path for frequent and performance sensitive wrmsr emulation,
2155 * i.e. the sending of IPI, sending IPI early in the VM-Exit flow reduces
2156 * the latency of virtual IPI by avoiding the expensive bits of transitioning
2157 * from guest to host, e.g. reacquiring KVM's SRCU lock. In contrast to the
2158 * other cases which must be called after interrupts are enabled on the host.
2160 static int handle_fastpath_set_x2apic_icr_irqoff(struct kvm_vcpu
*vcpu
, u64 data
)
2162 if (!lapic_in_kernel(vcpu
) || !apic_x2apic_mode(vcpu
->arch
.apic
))
2165 if (((data
& APIC_SHORT_MASK
) == APIC_DEST_NOSHORT
) &&
2166 ((data
& APIC_DEST_MASK
) == APIC_DEST_PHYSICAL
) &&
2167 ((data
& APIC_MODE_MASK
) == APIC_DM_FIXED
) &&
2168 ((u32
)(data
>> 32) != X2APIC_BROADCAST
))
2169 return kvm_x2apic_icr_write(vcpu
->arch
.apic
, data
);
2174 static int handle_fastpath_set_tscdeadline(struct kvm_vcpu
*vcpu
, u64 data
)
2176 if (!kvm_can_use_hv_timer(vcpu
))
2179 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2183 fastpath_t
handle_fastpath_set_msr_irqoff(struct kvm_vcpu
*vcpu
)
2185 u32 msr
= kvm_rcx_read(vcpu
);
2187 fastpath_t ret
= EXIT_FASTPATH_NONE
;
2189 kvm_vcpu_srcu_read_lock(vcpu
);
2192 case APIC_BASE_MSR
+ (APIC_ICR
>> 4):
2193 data
= kvm_read_edx_eax(vcpu
);
2194 if (!handle_fastpath_set_x2apic_icr_irqoff(vcpu
, data
)) {
2195 kvm_skip_emulated_instruction(vcpu
);
2196 ret
= EXIT_FASTPATH_EXIT_HANDLED
;
2199 case MSR_IA32_TSC_DEADLINE
:
2200 data
= kvm_read_edx_eax(vcpu
);
2201 if (!handle_fastpath_set_tscdeadline(vcpu
, data
)) {
2202 kvm_skip_emulated_instruction(vcpu
);
2203 ret
= EXIT_FASTPATH_REENTER_GUEST
;
2210 if (ret
!= EXIT_FASTPATH_NONE
)
2211 trace_kvm_msr_write(msr
, data
);
2213 kvm_vcpu_srcu_read_unlock(vcpu
);
2217 EXPORT_SYMBOL_GPL(handle_fastpath_set_msr_irqoff
);
2220 * Adapt set_msr() to msr_io()'s calling convention
2222 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2224 return kvm_get_msr_ignored_check(vcpu
, index
, data
, true);
2227 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
2232 * Disallow writes to immutable feature MSRs after KVM_RUN. KVM does
2233 * not support modifying the guest vCPU model on the fly, e.g. changing
2234 * the nVMX capabilities while L2 is running is nonsensical. Ignore
2235 * writes of the same value, e.g. to allow userspace to blindly stuff
2236 * all MSRs when emulating RESET.
2238 if (kvm_vcpu_has_run(vcpu
) && kvm_is_immutable_feature_msr(index
)) {
2239 if (do_get_msr(vcpu
, index
, &val
) || *data
!= val
)
2245 return kvm_set_msr_ignored_check(vcpu
, index
, *data
, true);
2248 #ifdef CONFIG_X86_64
2249 struct pvclock_clock
{
2259 struct pvclock_gtod_data
{
2262 struct pvclock_clock clock
; /* extract of a clocksource struct */
2263 struct pvclock_clock raw_clock
; /* extract of a clocksource struct */
2269 static struct pvclock_gtod_data pvclock_gtod_data
;
2271 static void update_pvclock_gtod(struct timekeeper
*tk
)
2273 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
2275 write_seqcount_begin(&vdata
->seq
);
2277 /* copy pvclock gtod data */
2278 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->vdso_clock_mode
;
2279 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
2280 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
2281 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
2282 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
2283 vdata
->clock
.base_cycles
= tk
->tkr_mono
.xtime_nsec
;
2284 vdata
->clock
.offset
= tk
->tkr_mono
.base
;
2286 vdata
->raw_clock
.vclock_mode
= tk
->tkr_raw
.clock
->vdso_clock_mode
;
2287 vdata
->raw_clock
.cycle_last
= tk
->tkr_raw
.cycle_last
;
2288 vdata
->raw_clock
.mask
= tk
->tkr_raw
.mask
;
2289 vdata
->raw_clock
.mult
= tk
->tkr_raw
.mult
;
2290 vdata
->raw_clock
.shift
= tk
->tkr_raw
.shift
;
2291 vdata
->raw_clock
.base_cycles
= tk
->tkr_raw
.xtime_nsec
;
2292 vdata
->raw_clock
.offset
= tk
->tkr_raw
.base
;
2294 vdata
->wall_time_sec
= tk
->xtime_sec
;
2296 vdata
->offs_boot
= tk
->offs_boot
;
2298 write_seqcount_end(&vdata
->seq
);
2301 static s64
get_kvmclock_base_ns(void)
2303 /* Count up from boot time, but with the frequency of the raw clock. */
2304 return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data
.offs_boot
));
2307 static s64
get_kvmclock_base_ns(void)
2309 /* Master clock not used, so we can just use CLOCK_BOOTTIME. */
2310 return ktime_get_boottime_ns();
2314 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
, int sec_hi_ofs
)
2318 struct pvclock_wall_clock wc
;
2325 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2330 ++version
; /* first time write, random junk */
2334 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
2337 wall_nsec
= kvm_get_wall_clock_epoch(kvm
);
2339 wc
.nsec
= do_div(wall_nsec
, NSEC_PER_SEC
);
2340 wc
.sec
= (u32
)wall_nsec
; /* overflow in 2106 guest time */
2341 wc
.version
= version
;
2343 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
2346 wc_sec_hi
= wall_nsec
>> 32;
2347 kvm_write_guest(kvm
, wall_clock
+ sec_hi_ofs
,
2348 &wc_sec_hi
, sizeof(wc_sec_hi
));
2352 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
2355 static void kvm_write_system_time(struct kvm_vcpu
*vcpu
, gpa_t system_time
,
2356 bool old_msr
, bool host_initiated
)
2358 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2360 if (vcpu
->vcpu_id
== 0 && !host_initiated
) {
2361 if (ka
->boot_vcpu_runs_old_kvmclock
!= old_msr
)
2362 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2364 ka
->boot_vcpu_runs_old_kvmclock
= old_msr
;
2367 vcpu
->arch
.time
= system_time
;
2368 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2370 /* we verify if the enable bit is set... */
2371 if (system_time
& 1)
2372 kvm_gpc_activate(&vcpu
->arch
.pv_time
, system_time
& ~1ULL,
2373 sizeof(struct pvclock_vcpu_time_info
));
2375 kvm_gpc_deactivate(&vcpu
->arch
.pv_time
);
2380 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
2382 do_shl32_div32(dividend
, divisor
);
2386 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
2387 s8
*pshift
, u32
*pmultiplier
)
2395 scaled64
= scaled_hz
;
2396 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
2401 tps32
= (uint32_t)tps64
;
2402 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
2403 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
2411 *pmultiplier
= div_frac(scaled64
, tps32
);
2414 #ifdef CONFIG_X86_64
2415 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
2418 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
2419 static unsigned long max_tsc_khz
;
2421 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
2423 u64 v
= (u64
)khz
* (1000000 + ppm
);
2428 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
);
2430 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
2434 /* Guest TSC same frequency as host TSC? */
2436 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_caps
.default_tsc_scaling_ratio
);
2440 /* TSC scaling supported? */
2441 if (!kvm_caps
.has_tsc_control
) {
2442 if (user_tsc_khz
> tsc_khz
) {
2443 vcpu
->arch
.tsc_catchup
= 1;
2444 vcpu
->arch
.tsc_always_catchup
= 1;
2447 pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
2452 /* TSC scaling required - calculate ratio */
2453 ratio
= mul_u64_u32_div(1ULL << kvm_caps
.tsc_scaling_ratio_frac_bits
,
2454 user_tsc_khz
, tsc_khz
);
2456 if (ratio
== 0 || ratio
>= kvm_caps
.max_tsc_scaling_ratio
) {
2457 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
2462 kvm_vcpu_write_tsc_multiplier(vcpu
, ratio
);
2466 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
2468 u32 thresh_lo
, thresh_hi
;
2469 int use_scaling
= 0;
2471 /* tsc_khz can be zero if TSC calibration fails */
2472 if (user_tsc_khz
== 0) {
2473 /* set tsc_scaling_ratio to a safe value */
2474 kvm_vcpu_write_tsc_multiplier(vcpu
, kvm_caps
.default_tsc_scaling_ratio
);
2478 /* Compute a scale to convert nanoseconds in TSC cycles */
2479 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
2480 &vcpu
->arch
.virtual_tsc_shift
,
2481 &vcpu
->arch
.virtual_tsc_mult
);
2482 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
2485 * Compute the variation in TSC rate which is acceptable
2486 * within the range of tolerance and decide if the
2487 * rate being applied is within that bounds of the hardware
2488 * rate. If so, no scaling or compensation need be done.
2490 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
2491 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
2492 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
2493 pr_debug("requested TSC rate %u falls outside tolerance [%u,%u]\n",
2494 user_tsc_khz
, thresh_lo
, thresh_hi
);
2497 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
2500 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
2502 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
2503 vcpu
->arch
.virtual_tsc_mult
,
2504 vcpu
->arch
.virtual_tsc_shift
);
2505 tsc
+= vcpu
->arch
.this_tsc_write
;
2509 #ifdef CONFIG_X86_64
2510 static inline int gtod_is_based_on_tsc(int mode
)
2512 return mode
== VDSO_CLOCKMODE_TSC
|| mode
== VDSO_CLOCKMODE_HVCLOCK
;
2516 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
, bool new_generation
)
2518 #ifdef CONFIG_X86_64
2519 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2520 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2523 * To use the masterclock, the host clocksource must be based on TSC
2524 * and all vCPUs must have matching TSCs. Note, the count for matching
2525 * vCPUs doesn't include the reference vCPU, hence "+1".
2527 bool use_master_clock
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2528 atomic_read(&vcpu
->kvm
->online_vcpus
)) &&
2529 gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
);
2532 * Request a masterclock update if the masterclock needs to be toggled
2533 * on/off, or when starting a new generation and the masterclock is
2534 * enabled (compute_guest_tsc() requires the masterclock snapshot to be
2535 * taken _after_ the new generation is created).
2537 if ((ka
->use_master_clock
&& new_generation
) ||
2538 (ka
->use_master_clock
!= use_master_clock
))
2539 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2541 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
2542 atomic_read(&vcpu
->kvm
->online_vcpus
),
2543 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
2548 * Multiply tsc by a fixed point number represented by ratio.
2550 * The most significant 64-N bits (mult) of ratio represent the
2551 * integral part of the fixed point number; the remaining N bits
2552 * (frac) represent the fractional part, ie. ratio represents a fixed
2553 * point number (mult + frac * 2^(-N)).
2555 * N equals to kvm_caps.tsc_scaling_ratio_frac_bits.
2557 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
2559 return mul_u64_u64_shr(tsc
, ratio
, kvm_caps
.tsc_scaling_ratio_frac_bits
);
2562 u64
kvm_scale_tsc(u64 tsc
, u64 ratio
)
2566 if (ratio
!= kvm_caps
.default_tsc_scaling_ratio
)
2567 _tsc
= __scale_tsc(ratio
, tsc
);
2572 static u64
kvm_compute_l1_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
2576 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
);
2578 return target_tsc
- tsc
;
2581 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
2583 return vcpu
->arch
.l1_tsc_offset
+
2584 kvm_scale_tsc(host_tsc
, vcpu
->arch
.l1_tsc_scaling_ratio
);
2586 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
2588 u64
kvm_calc_nested_tsc_offset(u64 l1_offset
, u64 l2_offset
, u64 l2_multiplier
)
2592 if (l2_multiplier
== kvm_caps
.default_tsc_scaling_ratio
)
2593 nested_offset
= l1_offset
;
2595 nested_offset
= mul_s64_u64_shr((s64
) l1_offset
, l2_multiplier
,
2596 kvm_caps
.tsc_scaling_ratio_frac_bits
);
2598 nested_offset
+= l2_offset
;
2599 return nested_offset
;
2601 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_offset
);
2603 u64
kvm_calc_nested_tsc_multiplier(u64 l1_multiplier
, u64 l2_multiplier
)
2605 if (l2_multiplier
!= kvm_caps
.default_tsc_scaling_ratio
)
2606 return mul_u64_u64_shr(l1_multiplier
, l2_multiplier
,
2607 kvm_caps
.tsc_scaling_ratio_frac_bits
);
2609 return l1_multiplier
;
2611 EXPORT_SYMBOL_GPL(kvm_calc_nested_tsc_multiplier
);
2613 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 l1_offset
)
2615 trace_kvm_write_tsc_offset(vcpu
->vcpu_id
,
2616 vcpu
->arch
.l1_tsc_offset
,
2619 vcpu
->arch
.l1_tsc_offset
= l1_offset
;
2622 * If we are here because L1 chose not to trap WRMSR to TSC then
2623 * according to the spec this should set L1's TSC (as opposed to
2624 * setting L1's offset for L2).
2626 if (is_guest_mode(vcpu
))
2627 vcpu
->arch
.tsc_offset
= kvm_calc_nested_tsc_offset(
2629 static_call(kvm_x86_get_l2_tsc_offset
)(vcpu
),
2630 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2632 vcpu
->arch
.tsc_offset
= l1_offset
;
2634 static_call(kvm_x86_write_tsc_offset
)(vcpu
);
2637 static void kvm_vcpu_write_tsc_multiplier(struct kvm_vcpu
*vcpu
, u64 l1_multiplier
)
2639 vcpu
->arch
.l1_tsc_scaling_ratio
= l1_multiplier
;
2641 /* Userspace is changing the multiplier while L2 is active */
2642 if (is_guest_mode(vcpu
))
2643 vcpu
->arch
.tsc_scaling_ratio
= kvm_calc_nested_tsc_multiplier(
2645 static_call(kvm_x86_get_l2_tsc_multiplier
)(vcpu
));
2647 vcpu
->arch
.tsc_scaling_ratio
= l1_multiplier
;
2649 if (kvm_caps
.has_tsc_control
)
2650 static_call(kvm_x86_write_tsc_multiplier
)(vcpu
);
2653 static inline bool kvm_check_tsc_unstable(void)
2655 #ifdef CONFIG_X86_64
2657 * TSC is marked unstable when we're running on Hyper-V,
2658 * 'TSC page' clocksource is good.
2660 if (pvclock_gtod_data
.clock
.vclock_mode
== VDSO_CLOCKMODE_HVCLOCK
)
2663 return check_tsc_unstable();
2667 * Infers attempts to synchronize the guest's tsc from host writes. Sets the
2668 * offset for the vcpu and tracks the TSC matching generation that the vcpu
2671 static void __kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64 offset
, u64 tsc
,
2672 u64 ns
, bool matched
)
2674 struct kvm
*kvm
= vcpu
->kvm
;
2676 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2679 * We also track th most recent recorded KHZ, write and time to
2680 * allow the matching interval to be extended at each write.
2682 kvm
->arch
.last_tsc_nsec
= ns
;
2683 kvm
->arch
.last_tsc_write
= tsc
;
2684 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
2685 kvm
->arch
.last_tsc_offset
= offset
;
2687 vcpu
->arch
.last_guest_tsc
= tsc
;
2689 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2693 * We split periods of matched TSC writes into generations.
2694 * For each generation, we track the original measured
2695 * nanosecond time, offset, and write, so if TSCs are in
2696 * sync, we can match exact offset, and if not, we can match
2697 * exact software computation in compute_guest_tsc()
2699 * These values are tracked in kvm->arch.cur_xxx variables.
2701 kvm
->arch
.cur_tsc_generation
++;
2702 kvm
->arch
.cur_tsc_nsec
= ns
;
2703 kvm
->arch
.cur_tsc_write
= tsc
;
2704 kvm
->arch
.cur_tsc_offset
= offset
;
2705 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
2706 } else if (vcpu
->arch
.this_tsc_generation
!= kvm
->arch
.cur_tsc_generation
) {
2707 kvm
->arch
.nr_vcpus_matched_tsc
++;
2710 /* Keep track of which generation this VCPU has synchronized to */
2711 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
2712 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
2713 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
2715 kvm_track_tsc_matching(vcpu
, !matched
);
2718 static void kvm_synchronize_tsc(struct kvm_vcpu
*vcpu
, u64
*user_value
)
2720 u64 data
= user_value
? *user_value
: 0;
2721 struct kvm
*kvm
= vcpu
->kvm
;
2722 u64 offset
, ns
, elapsed
;
2723 unsigned long flags
;
2724 bool matched
= false;
2725 bool synchronizing
= false;
2727 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
2728 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2729 ns
= get_kvmclock_base_ns();
2730 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
2732 if (vcpu
->arch
.virtual_tsc_khz
) {
2735 * Force synchronization when creating a vCPU, or when
2736 * userspace explicitly writes a zero value.
2738 synchronizing
= true;
2739 } else if (kvm
->arch
.user_set_tsc
) {
2740 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
2741 nsec_to_cycles(vcpu
, elapsed
);
2742 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
2744 * Here lies UAPI baggage: when a user-initiated TSC write has
2745 * a small delta (1 second) of virtual cycle time against the
2746 * previously set vCPU, we assume that they were intended to be
2747 * in sync and the delta was only due to the racy nature of the
2750 * This trick falls down when restoring a guest which genuinely
2751 * has been running for less time than the 1 second of imprecision
2752 * which we allow for in the legacy API. In this case, the first
2753 * value written by userspace (on any vCPU) should not be subject
2754 * to this 'correction' to make it sync up with values that only
2755 * come from the kernel's default vCPU creation. Make the 1-second
2756 * slop hack only trigger if the user_set_tsc flag is already set.
2758 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
2759 data
+ tsc_hz
> tsc_exp
;
2764 kvm
->arch
.user_set_tsc
= true;
2767 * For a reliable TSC, we can match TSC offsets, and for an unstable
2768 * TSC, we add elapsed time in this computation. We could let the
2769 * compensation code attempt to catch up if we fall behind, but
2770 * it's better to try to match offsets from the beginning.
2772 if (synchronizing
&&
2773 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
2774 if (!kvm_check_tsc_unstable()) {
2775 offset
= kvm
->arch
.cur_tsc_offset
;
2777 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
2779 offset
= kvm_compute_l1_tsc_offset(vcpu
, data
);
2784 __kvm_synchronize_tsc(vcpu
, offset
, data
, ns
, matched
);
2785 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
2788 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
2791 u64 tsc_offset
= vcpu
->arch
.l1_tsc_offset
;
2792 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
2795 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
2797 if (vcpu
->arch
.l1_tsc_scaling_ratio
!= kvm_caps
.default_tsc_scaling_ratio
)
2798 WARN_ON(adjustment
< 0);
2799 adjustment
= kvm_scale_tsc((u64
) adjustment
,
2800 vcpu
->arch
.l1_tsc_scaling_ratio
);
2801 adjust_tsc_offset_guest(vcpu
, adjustment
);
2804 #ifdef CONFIG_X86_64
2806 static u64
read_tsc(void)
2808 u64 ret
= (u64
)rdtsc_ordered();
2809 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
2811 if (likely(ret
>= last
))
2815 * GCC likes to generate cmov here, but this branch is extremely
2816 * predictable (it's just a function of time and the likely is
2817 * very likely) and there's a data dependence, so force GCC
2818 * to generate a branch instead. I don't barrier() because
2819 * we don't actually need a barrier, and if this function
2820 * ever gets inlined it will generate worse code.
2826 static inline u64
vgettsc(struct pvclock_clock
*clock
, u64
*tsc_timestamp
,
2832 switch (clock
->vclock_mode
) {
2833 case VDSO_CLOCKMODE_HVCLOCK
:
2834 if (hv_read_tsc_page_tsc(hv_get_tsc_page(),
2835 tsc_timestamp
, &tsc_pg_val
)) {
2836 /* TSC page valid */
2837 *mode
= VDSO_CLOCKMODE_HVCLOCK
;
2838 v
= (tsc_pg_val
- clock
->cycle_last
) &
2841 /* TSC page invalid */
2842 *mode
= VDSO_CLOCKMODE_NONE
;
2845 case VDSO_CLOCKMODE_TSC
:
2846 *mode
= VDSO_CLOCKMODE_TSC
;
2847 *tsc_timestamp
= read_tsc();
2848 v
= (*tsc_timestamp
- clock
->cycle_last
) &
2852 *mode
= VDSO_CLOCKMODE_NONE
;
2855 if (*mode
== VDSO_CLOCKMODE_NONE
)
2856 *tsc_timestamp
= v
= 0;
2858 return v
* clock
->mult
;
2861 static int do_monotonic_raw(s64
*t
, u64
*tsc_timestamp
)
2863 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2869 seq
= read_seqcount_begin(>od
->seq
);
2870 ns
= gtod
->raw_clock
.base_cycles
;
2871 ns
+= vgettsc(>od
->raw_clock
, tsc_timestamp
, &mode
);
2872 ns
>>= gtod
->raw_clock
.shift
;
2873 ns
+= ktime_to_ns(ktime_add(gtod
->raw_clock
.offset
, gtod
->offs_boot
));
2874 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2880 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
2882 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
2888 seq
= read_seqcount_begin(>od
->seq
);
2889 ts
->tv_sec
= gtod
->wall_time_sec
;
2890 ns
= gtod
->clock
.base_cycles
;
2891 ns
+= vgettsc(>od
->clock
, tsc_timestamp
, &mode
);
2892 ns
>>= gtod
->clock
.shift
;
2893 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
2895 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
2901 /* returns true if host is using TSC based clocksource */
2902 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
2904 /* checked again under seqlock below */
2905 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2908 return gtod_is_based_on_tsc(do_monotonic_raw(kernel_ns
,
2912 /* returns true if host is using TSC based clocksource */
2913 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
2916 /* checked again under seqlock below */
2917 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
2920 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
2926 * Assuming a stable TSC across physical CPUS, and a stable TSC
2927 * across virtual CPUs, the following condition is possible.
2928 * Each numbered line represents an event visible to both
2929 * CPUs at the next numbered event.
2931 * "timespecX" represents host monotonic time. "tscX" represents
2934 * VCPU0 on CPU0 | VCPU1 on CPU1
2936 * 1. read timespec0,tsc0
2937 * 2. | timespec1 = timespec0 + N
2939 * 3. transition to guest | transition to guest
2940 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2941 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
2942 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2944 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2947 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2949 * - 0 < N - M => M < N
2951 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2952 * always the case (the difference between two distinct xtime instances
2953 * might be smaller then the difference between corresponding TSC reads,
2954 * when updating guest vcpus pvclock areas).
2956 * To avoid that problem, do not allow visibility of distinct
2957 * system_timestamp/tsc_timestamp values simultaneously: use a master
2958 * copy of host monotonic time values. Update that master copy
2961 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2965 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2967 #ifdef CONFIG_X86_64
2968 struct kvm_arch
*ka
= &kvm
->arch
;
2970 bool host_tsc_clocksource
, vcpus_matched
;
2972 lockdep_assert_held(&kvm
->arch
.tsc_write_lock
);
2973 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2974 atomic_read(&kvm
->online_vcpus
));
2977 * If the host uses TSC clock, then passthrough TSC as stable
2980 host_tsc_clocksource
= kvm_get_time_and_clockread(
2981 &ka
->master_kernel_ns
,
2982 &ka
->master_cycle_now
);
2984 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2985 && !ka
->backwards_tsc_observed
2986 && !ka
->boot_vcpu_runs_old_kvmclock
;
2988 if (ka
->use_master_clock
)
2989 atomic_set(&kvm_guest_has_master_clock
, 1);
2991 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2992 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2997 static void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2999 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
3002 static void __kvm_start_pvclock_update(struct kvm
*kvm
)
3004 raw_spin_lock_irq(&kvm
->arch
.tsc_write_lock
);
3005 write_seqcount_begin(&kvm
->arch
.pvclock_sc
);
3008 static void kvm_start_pvclock_update(struct kvm
*kvm
)
3010 kvm_make_mclock_inprogress_request(kvm
);
3012 /* no guest entries from this point */
3013 __kvm_start_pvclock_update(kvm
);
3016 static void kvm_end_pvclock_update(struct kvm
*kvm
)
3018 struct kvm_arch
*ka
= &kvm
->arch
;
3019 struct kvm_vcpu
*vcpu
;
3022 write_seqcount_end(&ka
->pvclock_sc
);
3023 raw_spin_unlock_irq(&ka
->tsc_write_lock
);
3024 kvm_for_each_vcpu(i
, vcpu
, kvm
)
3025 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3027 /* guest entries allowed */
3028 kvm_for_each_vcpu(i
, vcpu
, kvm
)
3029 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
3032 static void kvm_update_masterclock(struct kvm
*kvm
)
3034 kvm_hv_request_tsc_page_update(kvm
);
3035 kvm_start_pvclock_update(kvm
);
3036 pvclock_update_vm_gtod_copy(kvm
);
3037 kvm_end_pvclock_update(kvm
);
3041 * Use the kernel's tsc_khz directly if the TSC is constant, otherwise use KVM's
3042 * per-CPU value (which may be zero if a CPU is going offline). Note, tsc_khz
3043 * can change during boot even if the TSC is constant, as it's possible for KVM
3044 * to be loaded before TSC calibration completes. Ideally, KVM would get a
3045 * notification when calibration completes, but practically speaking calibration
3046 * will complete before userspace is alive enough to create VMs.
3048 static unsigned long get_cpu_tsc_khz(void)
3050 if (static_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3053 return __this_cpu_read(cpu_tsc_khz
);
3056 /* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */
3057 static void __get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
3059 struct kvm_arch
*ka
= &kvm
->arch
;
3060 struct pvclock_vcpu_time_info hv_clock
;
3062 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
3066 if (ka
->use_master_clock
&&
3067 (static_cpu_has(X86_FEATURE_CONSTANT_TSC
) || __this_cpu_read(cpu_tsc_khz
))) {
3068 #ifdef CONFIG_X86_64
3069 struct timespec64 ts
;
3071 if (kvm_get_walltime_and_clockread(&ts
, &data
->host_tsc
)) {
3072 data
->realtime
= ts
.tv_nsec
+ NSEC_PER_SEC
* ts
.tv_sec
;
3073 data
->flags
|= KVM_CLOCK_REALTIME
| KVM_CLOCK_HOST_TSC
;
3076 data
->host_tsc
= rdtsc();
3078 data
->flags
|= KVM_CLOCK_TSC_STABLE
;
3079 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
3080 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
3081 kvm_get_time_scale(NSEC_PER_SEC
, get_cpu_tsc_khz() * 1000LL,
3082 &hv_clock
.tsc_shift
,
3083 &hv_clock
.tsc_to_system_mul
);
3084 data
->clock
= __pvclock_read_cycles(&hv_clock
, data
->host_tsc
);
3086 data
->clock
= get_kvmclock_base_ns() + ka
->kvmclock_offset
;
3092 static void get_kvmclock(struct kvm
*kvm
, struct kvm_clock_data
*data
)
3094 struct kvm_arch
*ka
= &kvm
->arch
;
3098 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3099 __get_kvmclock(kvm
, data
);
3100 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3103 u64
get_kvmclock_ns(struct kvm
*kvm
)
3105 struct kvm_clock_data data
;
3107 get_kvmclock(kvm
, &data
);
3111 static void kvm_setup_guest_pvclock(struct kvm_vcpu
*v
,
3112 struct gfn_to_pfn_cache
*gpc
,
3113 unsigned int offset
)
3115 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3116 struct pvclock_vcpu_time_info
*guest_hv_clock
;
3117 unsigned long flags
;
3119 read_lock_irqsave(&gpc
->lock
, flags
);
3120 while (!kvm_gpc_check(gpc
, offset
+ sizeof(*guest_hv_clock
))) {
3121 read_unlock_irqrestore(&gpc
->lock
, flags
);
3123 if (kvm_gpc_refresh(gpc
, offset
+ sizeof(*guest_hv_clock
)))
3126 read_lock_irqsave(&gpc
->lock
, flags
);
3129 guest_hv_clock
= (void *)(gpc
->khva
+ offset
);
3132 * This VCPU is paused, but it's legal for a guest to read another
3133 * VCPU's kvmclock, so we really have to follow the specification where
3134 * it says that version is odd if data is being modified, and even after
3138 guest_hv_clock
->version
= vcpu
->hv_clock
.version
= (guest_hv_clock
->version
+ 1) | 1;
3141 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
3142 vcpu
->hv_clock
.flags
|= (guest_hv_clock
->flags
& PVCLOCK_GUEST_STOPPED
);
3144 if (vcpu
->pvclock_set_guest_stopped_request
) {
3145 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
3146 vcpu
->pvclock_set_guest_stopped_request
= false;
3149 memcpy(guest_hv_clock
, &vcpu
->hv_clock
, sizeof(*guest_hv_clock
));
3152 guest_hv_clock
->version
= ++vcpu
->hv_clock
.version
;
3154 mark_page_dirty_in_slot(v
->kvm
, gpc
->memslot
, gpc
->gpa
>> PAGE_SHIFT
);
3155 read_unlock_irqrestore(&gpc
->lock
, flags
);
3157 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
3160 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
3162 unsigned long flags
, tgt_tsc_khz
;
3164 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
3165 struct kvm_arch
*ka
= &v
->kvm
->arch
;
3167 u64 tsc_timestamp
, host_tsc
;
3169 bool use_master_clock
;
3175 * If the host uses TSC clock, then passthrough TSC as stable
3179 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3180 use_master_clock
= ka
->use_master_clock
;
3181 if (use_master_clock
) {
3182 host_tsc
= ka
->master_cycle_now
;
3183 kernel_ns
= ka
->master_kernel_ns
;
3185 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3187 /* Keep irq disabled to prevent changes to the clock */
3188 local_irq_save(flags
);
3189 tgt_tsc_khz
= get_cpu_tsc_khz();
3190 if (unlikely(tgt_tsc_khz
== 0)) {
3191 local_irq_restore(flags
);
3192 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3195 if (!use_master_clock
) {
3197 kernel_ns
= get_kvmclock_base_ns();
3200 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
3203 * We may have to catch up the TSC to match elapsed wall clock
3204 * time for two reasons, even if kvmclock is used.
3205 * 1) CPU could have been running below the maximum TSC rate
3206 * 2) Broken TSC compensation resets the base at each VCPU
3207 * entry to avoid unknown leaps of TSC even when running
3208 * again on the same CPU. This may cause apparent elapsed
3209 * time to disappear, and the guest to stand still or run
3212 if (vcpu
->tsc_catchup
) {
3213 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
3214 if (tsc
> tsc_timestamp
) {
3215 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
3216 tsc_timestamp
= tsc
;
3220 local_irq_restore(flags
);
3222 /* With all the info we got, fill in the values */
3224 if (kvm_caps
.has_tsc_control
)
3225 tgt_tsc_khz
= kvm_scale_tsc(tgt_tsc_khz
,
3226 v
->arch
.l1_tsc_scaling_ratio
);
3228 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
3229 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
3230 &vcpu
->hv_clock
.tsc_shift
,
3231 &vcpu
->hv_clock
.tsc_to_system_mul
);
3232 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
3233 kvm_xen_update_tsc_info(v
);
3236 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
3237 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
3238 vcpu
->last_guest_tsc
= tsc_timestamp
;
3240 /* If the host uses TSC clocksource, then it is stable */
3242 if (use_master_clock
)
3243 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
3245 vcpu
->hv_clock
.flags
= pvclock_flags
;
3247 if (vcpu
->pv_time
.active
)
3248 kvm_setup_guest_pvclock(v
, &vcpu
->pv_time
, 0);
3249 #ifdef CONFIG_KVM_XEN
3250 if (vcpu
->xen
.vcpu_info_cache
.active
)
3251 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_info_cache
,
3252 offsetof(struct compat_vcpu_info
, time
));
3253 if (vcpu
->xen
.vcpu_time_info_cache
.active
)
3254 kvm_setup_guest_pvclock(v
, &vcpu
->xen
.vcpu_time_info_cache
, 0);
3256 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
3261 * The pvclock_wall_clock ABI tells the guest the wall clock time at
3262 * which it started (i.e. its epoch, when its kvmclock was zero).
3264 * In fact those clocks are subtly different; wall clock frequency is
3265 * adjusted by NTP and has leap seconds, while the kvmclock is a
3266 * simple function of the TSC without any such adjustment.
3268 * Perhaps the ABI should have exposed CLOCK_TAI and a ratio between
3269 * that and kvmclock, but even that would be subject to change over
3272 * Attempt to calculate the epoch at a given moment using the *same*
3273 * TSC reading via kvm_get_walltime_and_clockread() to obtain both
3274 * wallclock and kvmclock times, and subtracting one from the other.
3276 * Fall back to using their values at slightly different moments by
3277 * calling ktime_get_real_ns() and get_kvmclock_ns() separately.
3279 uint64_t kvm_get_wall_clock_epoch(struct kvm
*kvm
)
3281 #ifdef CONFIG_X86_64
3282 struct pvclock_vcpu_time_info hv_clock
;
3283 struct kvm_arch
*ka
= &kvm
->arch
;
3284 unsigned long seq
, local_tsc_khz
;
3285 struct timespec64 ts
;
3289 seq
= read_seqcount_begin(&ka
->pvclock_sc
);
3292 if (!ka
->use_master_clock
)
3296 * The TSC read and the call to get_cpu_tsc_khz() must happen
3301 local_tsc_khz
= get_cpu_tsc_khz();
3303 if (local_tsc_khz
&&
3304 !kvm_get_walltime_and_clockread(&ts
, &host_tsc
))
3305 local_tsc_khz
= 0; /* Fall back to old method */
3310 * These values must be snapshotted within the seqcount loop.
3311 * After that, it's just mathematics which can happen on any
3314 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
3315 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
3317 } while (read_seqcount_retry(&ka
->pvclock_sc
, seq
));
3320 * If the conditions were right, and obtaining the wallclock+TSC was
3321 * successful, calculate the KVM clock at the corresponding time and
3322 * subtract one from the other to get the guest's epoch in nanoseconds
3325 if (local_tsc_khz
) {
3326 kvm_get_time_scale(NSEC_PER_SEC
, local_tsc_khz
* NSEC_PER_USEC
,
3327 &hv_clock
.tsc_shift
,
3328 &hv_clock
.tsc_to_system_mul
);
3329 return ts
.tv_nsec
+ NSEC_PER_SEC
* ts
.tv_sec
-
3330 __pvclock_read_cycles(&hv_clock
, host_tsc
);
3333 return ktime_get_real_ns() - get_kvmclock_ns(kvm
);
3337 * kvmclock updates which are isolated to a given vcpu, such as
3338 * vcpu->cpu migration, should not allow system_timestamp from
3339 * the rest of the vcpus to remain static. Otherwise ntp frequency
3340 * correction applies to one vcpu's system_timestamp but not
3343 * So in those cases, request a kvmclock update for all vcpus.
3344 * We need to rate-limit these requests though, as they can
3345 * considerably slow guests that have a large number of vcpus.
3346 * The time for a remote vcpu to update its kvmclock is bound
3347 * by the delay we use to rate-limit the updates.
3350 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
3352 static void kvmclock_update_fn(struct work_struct
*work
)
3355 struct delayed_work
*dwork
= to_delayed_work(work
);
3356 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3357 kvmclock_update_work
);
3358 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3359 struct kvm_vcpu
*vcpu
;
3361 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3362 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3363 kvm_vcpu_kick(vcpu
);
3367 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
3369 struct kvm
*kvm
= v
->kvm
;
3371 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
3372 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
3373 KVMCLOCK_UPDATE_DELAY
);
3376 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
3378 static void kvmclock_sync_fn(struct work_struct
*work
)
3380 struct delayed_work
*dwork
= to_delayed_work(work
);
3381 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
3382 kvmclock_sync_work
);
3383 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
3385 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
3386 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
3387 KVMCLOCK_SYNC_PERIOD
);
3390 /* These helpers are safe iff @msr is known to be an MCx bank MSR. */
3391 static bool is_mci_control_msr(u32 msr
)
3393 return (msr
& 3) == 0;
3395 static bool is_mci_status_msr(u32 msr
)
3397 return (msr
& 3) == 1;
3401 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
3403 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
3405 /* McStatusWrEn enabled? */
3406 if (guest_cpuid_is_amd_or_hygon(vcpu
))
3407 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
3412 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3414 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3415 unsigned bank_num
= mcg_cap
& 0xff;
3416 u32 msr
= msr_info
->index
;
3417 u64 data
= msr_info
->data
;
3418 u32 offset
, last_msr
;
3421 case MSR_IA32_MCG_STATUS
:
3422 vcpu
->arch
.mcg_status
= data
;
3424 case MSR_IA32_MCG_CTL
:
3425 if (!(mcg_cap
& MCG_CTL_P
) &&
3426 (data
|| !msr_info
->host_initiated
))
3428 if (data
!= 0 && data
!= ~(u64
)0)
3430 vcpu
->arch
.mcg_ctl
= data
;
3432 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
3433 last_msr
= MSR_IA32_MCx_CTL2(bank_num
) - 1;
3437 if (!(mcg_cap
& MCG_CMCI_P
) && (data
|| !msr_info
->host_initiated
))
3439 /* An attempt to write a 1 to a reserved bit raises #GP */
3440 if (data
& ~(MCI_CTL2_CMCI_EN
| MCI_CTL2_CMCI_THRESHOLD_MASK
))
3442 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL2
,
3443 last_msr
+ 1 - MSR_IA32_MC0_CTL2
);
3444 vcpu
->arch
.mci_ctl2_banks
[offset
] = data
;
3446 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
3447 last_msr
= MSR_IA32_MCx_CTL(bank_num
) - 1;
3452 * Only 0 or all 1s can be written to IA32_MCi_CTL, all other
3453 * values are architecturally undefined. But, some Linux
3454 * kernels clear bit 10 in bank 4 to workaround a BIOS/GART TLB
3455 * issue on AMD K8s, allow bit 10 to be clear when setting all
3456 * other bits in order to avoid an uncaught #GP in the guest.
3458 * UNIXWARE clears bit 0 of MC1_CTL to ignore correctable,
3459 * single-bit ECC data errors.
3461 if (is_mci_control_msr(msr
) &&
3462 data
!= 0 && (data
| (1 << 10) | 1) != ~(u64
)0)
3466 * All CPUs allow writing 0 to MCi_STATUS MSRs to clear the MSR.
3467 * AMD-based CPUs allow non-zero values, but if and only if
3468 * HWCR[McStatusWrEn] is set.
3470 if (!msr_info
->host_initiated
&& is_mci_status_msr(msr
) &&
3471 data
!= 0 && !can_set_mci_status(vcpu
))
3474 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL
,
3475 last_msr
+ 1 - MSR_IA32_MC0_CTL
);
3476 vcpu
->arch
.mce_banks
[offset
] = data
;
3484 static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu
*vcpu
)
3486 u64 mask
= KVM_ASYNC_PF_ENABLED
| KVM_ASYNC_PF_DELIVERY_AS_INT
;
3488 return (vcpu
->arch
.apf
.msr_en_val
& mask
) == mask
;
3491 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
3493 gpa_t gpa
= data
& ~0x3f;
3495 /* Bits 4:5 are reserved, Should be zero */
3499 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_VMEXIT
) &&
3500 (data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
))
3503 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
) &&
3504 (data
& KVM_ASYNC_PF_DELIVERY_AS_INT
))
3507 if (!lapic_in_kernel(vcpu
))
3508 return data
? 1 : 0;
3510 vcpu
->arch
.apf
.msr_en_val
= data
;
3512 if (!kvm_pv_async_pf_enabled(vcpu
)) {
3513 kvm_clear_async_pf_completion_queue(vcpu
);
3514 kvm_async_pf_hash_reset(vcpu
);
3518 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
3522 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
3523 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
3525 kvm_async_pf_wakeup_all(vcpu
);
3530 static int kvm_pv_enable_async_pf_int(struct kvm_vcpu
*vcpu
, u64 data
)
3532 /* Bits 8-63 are reserved */
3536 if (!lapic_in_kernel(vcpu
))
3539 vcpu
->arch
.apf
.msr_int_val
= data
;
3541 vcpu
->arch
.apf
.vec
= data
& KVM_ASYNC_PF_VEC_MASK
;
3546 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
3548 kvm_gpc_deactivate(&vcpu
->arch
.pv_time
);
3549 vcpu
->arch
.time
= 0;
3552 static void kvm_vcpu_flush_tlb_all(struct kvm_vcpu
*vcpu
)
3554 ++vcpu
->stat
.tlb_flush
;
3555 static_call(kvm_x86_flush_tlb_all
)(vcpu
);
3557 /* Flushing all ASIDs flushes the current ASID... */
3558 kvm_clear_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
);
3561 static void kvm_vcpu_flush_tlb_guest(struct kvm_vcpu
*vcpu
)
3563 ++vcpu
->stat
.tlb_flush
;
3567 * A TLB flush on behalf of the guest is equivalent to
3568 * INVPCID(all), toggling CR4.PGE, etc., which requires
3569 * a forced sync of the shadow page tables. Ensure all the
3570 * roots are synced and the guest TLB in hardware is clean.
3572 kvm_mmu_sync_roots(vcpu
);
3573 kvm_mmu_sync_prev_roots(vcpu
);
3576 static_call(kvm_x86_flush_tlb_guest
)(vcpu
);
3579 * Flushing all "guest" TLB is always a superset of Hyper-V's fine
3582 kvm_hv_vcpu_purge_flush_tlb(vcpu
);
3586 static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu
*vcpu
)
3588 ++vcpu
->stat
.tlb_flush
;
3589 static_call(kvm_x86_flush_tlb_current
)(vcpu
);
3593 * Service "local" TLB flush requests, which are specific to the current MMU
3594 * context. In addition to the generic event handling in vcpu_enter_guest(),
3595 * TLB flushes that are targeted at an MMU context also need to be serviced
3596 * prior before nested VM-Enter/VM-Exit.
3598 void kvm_service_local_tlb_flush_requests(struct kvm_vcpu
*vcpu
)
3600 if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT
, vcpu
))
3601 kvm_vcpu_flush_tlb_current(vcpu
);
3603 if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
))
3604 kvm_vcpu_flush_tlb_guest(vcpu
);
3606 EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests
);
3608 static void record_steal_time(struct kvm_vcpu
*vcpu
)
3610 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
3611 struct kvm_steal_time __user
*st
;
3612 struct kvm_memslots
*slots
;
3613 gpa_t gpa
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
3617 if (kvm_xen_msr_enabled(vcpu
->kvm
)) {
3618 kvm_xen_runstate_set_running(vcpu
);
3622 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3625 if (WARN_ON_ONCE(current
->mm
!= vcpu
->kvm
->mm
))
3628 slots
= kvm_memslots(vcpu
->kvm
);
3630 if (unlikely(slots
->generation
!= ghc
->generation
||
3632 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)) {
3633 /* We rely on the fact that it fits in a single page. */
3634 BUILD_BUG_ON((sizeof(*st
) - 1) & KVM_STEAL_VALID_BITS
);
3636 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, ghc
, gpa
, sizeof(*st
)) ||
3637 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
)
3641 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
3643 * Doing a TLB flush here, on the guest's behalf, can avoid
3646 if (guest_pv_has(vcpu
, KVM_FEATURE_PV_TLB_FLUSH
)) {
3647 u8 st_preempted
= 0;
3650 if (!user_access_begin(st
, sizeof(*st
)))
3653 asm volatile("1: xchgb %0, %2\n"
3656 _ASM_EXTABLE_UA(1b
, 2b
)
3657 : "+q" (st_preempted
),
3659 "+m" (st
->preempted
));
3665 vcpu
->arch
.st
.preempted
= 0;
3667 trace_kvm_pv_tlb_flush(vcpu
->vcpu_id
,
3668 st_preempted
& KVM_VCPU_FLUSH_TLB
);
3669 if (st_preempted
& KVM_VCPU_FLUSH_TLB
)
3670 kvm_vcpu_flush_tlb_guest(vcpu
);
3672 if (!user_access_begin(st
, sizeof(*st
)))
3675 if (!user_access_begin(st
, sizeof(*st
)))
3678 unsafe_put_user(0, &st
->preempted
, out
);
3679 vcpu
->arch
.st
.preempted
= 0;
3682 unsafe_get_user(version
, &st
->version
, out
);
3684 version
+= 1; /* first time write, random junk */
3687 unsafe_put_user(version
, &st
->version
, out
);
3691 unsafe_get_user(steal
, &st
->steal
, out
);
3692 steal
+= current
->sched_info
.run_delay
-
3693 vcpu
->arch
.st
.last_steal
;
3694 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
3695 unsafe_put_user(steal
, &st
->steal
, out
);
3698 unsafe_put_user(version
, &st
->version
, out
);
3703 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
3706 static bool kvm_is_msr_to_save(u32 msr_index
)
3710 for (i
= 0; i
< num_msrs_to_save
; i
++) {
3711 if (msrs_to_save
[i
] == msr_index
)
3718 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
3720 u32 msr
= msr_info
->index
;
3721 u64 data
= msr_info
->data
;
3723 if (msr
&& msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
)
3724 return kvm_xen_write_hypercall_page(vcpu
, data
);
3727 case MSR_AMD64_NB_CFG
:
3728 case MSR_IA32_UCODE_WRITE
:
3729 case MSR_VM_HSAVE_PA
:
3730 case MSR_AMD64_PATCH_LOADER
:
3731 case MSR_AMD64_BU_CFG2
:
3732 case MSR_AMD64_DC_CFG
:
3733 case MSR_AMD64_TW_CFG
:
3734 case MSR_F15H_EX_CFG
:
3737 case MSR_IA32_UCODE_REV
:
3738 if (msr_info
->host_initiated
)
3739 vcpu
->arch
.microcode_version
= data
;
3741 case MSR_IA32_ARCH_CAPABILITIES
:
3742 if (!msr_info
->host_initiated
)
3744 vcpu
->arch
.arch_capabilities
= data
;
3746 case MSR_IA32_PERF_CAPABILITIES
:
3747 if (!msr_info
->host_initiated
)
3749 if (data
& ~kvm_caps
.supported_perf_cap
)
3753 * Note, this is not just a performance optimization! KVM
3754 * disallows changing feature MSRs after the vCPU has run; PMU
3755 * refresh will bug the VM if called after the vCPU has run.
3757 if (vcpu
->arch
.perf_capabilities
== data
)
3760 vcpu
->arch
.perf_capabilities
= data
;
3761 kvm_pmu_refresh(vcpu
);
3763 case MSR_IA32_PRED_CMD
: {
3764 u64 reserved_bits
= ~(PRED_CMD_IBPB
| PRED_CMD_SBPB
);
3766 if (!msr_info
->host_initiated
) {
3767 if ((!guest_has_pred_cmd_msr(vcpu
)))
3770 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SPEC_CTRL
) &&
3771 !guest_cpuid_has(vcpu
, X86_FEATURE_AMD_IBPB
))
3772 reserved_bits
|= PRED_CMD_IBPB
;
3774 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SBPB
))
3775 reserved_bits
|= PRED_CMD_SBPB
;
3778 if (!boot_cpu_has(X86_FEATURE_IBPB
))
3779 reserved_bits
|= PRED_CMD_IBPB
;
3781 if (!boot_cpu_has(X86_FEATURE_SBPB
))
3782 reserved_bits
|= PRED_CMD_SBPB
;
3784 if (data
& reserved_bits
)
3790 wrmsrl(MSR_IA32_PRED_CMD
, data
);
3793 case MSR_IA32_FLUSH_CMD
:
3794 if (!msr_info
->host_initiated
&&
3795 !guest_cpuid_has(vcpu
, X86_FEATURE_FLUSH_L1D
))
3798 if (!boot_cpu_has(X86_FEATURE_FLUSH_L1D
) || (data
& ~L1D_FLUSH
))
3803 wrmsrl(MSR_IA32_FLUSH_CMD
, L1D_FLUSH
);
3806 return set_efer(vcpu
, msr_info
);
3808 data
&= ~(u64
)0x40; /* ignore flush filter disable */
3809 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
3810 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
3813 * Allow McStatusWrEn and TscFreqSel. (Linux guests from v3.2
3814 * through at least v6.6 whine if TscFreqSel is clear,
3815 * depending on F/M/S.
3817 if (data
& ~(BIT_ULL(18) | BIT_ULL(24))) {
3818 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3821 vcpu
->arch
.msr_hwcr
= data
;
3823 case MSR_FAM10H_MMIO_CONF_BASE
:
3825 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
3829 case MSR_IA32_CR_PAT
:
3830 if (!kvm_pat_valid(data
))
3833 vcpu
->arch
.pat
= data
;
3835 case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000
:
3836 case MSR_MTRRdefType
:
3837 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
3838 case MSR_IA32_APICBASE
:
3839 return kvm_set_apic_base(vcpu
, msr_info
);
3840 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
3841 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
3842 case MSR_IA32_TSC_DEADLINE
:
3843 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
3845 case MSR_IA32_TSC_ADJUST
:
3846 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
3847 if (!msr_info
->host_initiated
) {
3848 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
3849 adjust_tsc_offset_guest(vcpu
, adj
);
3850 /* Before back to guest, tsc_timestamp must be adjusted
3851 * as well, otherwise guest's percpu pvclock time could jump.
3853 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3855 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
3858 case MSR_IA32_MISC_ENABLE
: {
3859 u64 old_val
= vcpu
->arch
.ia32_misc_enable_msr
;
3861 if (!msr_info
->host_initiated
) {
3863 if ((old_val
^ data
) & MSR_IA32_MISC_ENABLE_PMU_RO_MASK
)
3866 /* R bits, i.e. writes are ignored, but don't fault. */
3867 data
= data
& ~MSR_IA32_MISC_ENABLE_EMON
;
3868 data
|= old_val
& MSR_IA32_MISC_ENABLE_EMON
;
3871 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT
) &&
3872 ((old_val
^ data
) & MSR_IA32_MISC_ENABLE_MWAIT
)) {
3873 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XMM3
))
3875 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3876 kvm_update_cpuid_runtime(vcpu
);
3878 vcpu
->arch
.ia32_misc_enable_msr
= data
;
3882 case MSR_IA32_SMBASE
:
3883 if (!IS_ENABLED(CONFIG_KVM_SMM
) || !msr_info
->host_initiated
)
3885 vcpu
->arch
.smbase
= data
;
3887 case MSR_IA32_POWER_CTL
:
3888 vcpu
->arch
.msr_ia32_power_ctl
= data
;
3891 if (msr_info
->host_initiated
) {
3892 kvm_synchronize_tsc(vcpu
, &data
);
3894 u64 adj
= kvm_compute_l1_tsc_offset(vcpu
, data
) - vcpu
->arch
.l1_tsc_offset
;
3895 adjust_tsc_offset_guest(vcpu
, adj
);
3896 vcpu
->arch
.ia32_tsc_adjust_msr
+= adj
;
3900 if (!msr_info
->host_initiated
&&
3901 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
3904 * KVM supports exposing PT to the guest, but does not support
3905 * IA32_XSS[bit 8]. Guests have to use RDMSR/WRMSR rather than
3906 * XSAVES/XRSTORS to save/restore PT MSRs.
3908 if (data
& ~kvm_caps
.supported_xss
)
3910 vcpu
->arch
.ia32_xss
= data
;
3911 kvm_update_cpuid_runtime(vcpu
);
3914 if (!msr_info
->host_initiated
)
3916 vcpu
->arch
.smi_count
= data
;
3918 case MSR_KVM_WALL_CLOCK_NEW
:
3919 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3922 vcpu
->kvm
->arch
.wall_clock
= data
;
3923 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3925 case MSR_KVM_WALL_CLOCK
:
3926 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3929 vcpu
->kvm
->arch
.wall_clock
= data
;
3930 kvm_write_wall_clock(vcpu
->kvm
, data
, 0);
3932 case MSR_KVM_SYSTEM_TIME_NEW
:
3933 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
3936 kvm_write_system_time(vcpu
, data
, false, msr_info
->host_initiated
);
3938 case MSR_KVM_SYSTEM_TIME
:
3939 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
3942 kvm_write_system_time(vcpu
, data
, true, msr_info
->host_initiated
);
3944 case MSR_KVM_ASYNC_PF_EN
:
3945 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
3948 if (kvm_pv_enable_async_pf(vcpu
, data
))
3951 case MSR_KVM_ASYNC_PF_INT
:
3952 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3955 if (kvm_pv_enable_async_pf_int(vcpu
, data
))
3958 case MSR_KVM_ASYNC_PF_ACK
:
3959 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
3962 vcpu
->arch
.apf
.pageready_pending
= false;
3963 kvm_check_async_pf_completion(vcpu
);
3966 case MSR_KVM_STEAL_TIME
:
3967 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
3970 if (unlikely(!sched_info_on()))
3973 if (data
& KVM_STEAL_RESERVED_MASK
)
3976 vcpu
->arch
.st
.msr_val
= data
;
3978 if (!(data
& KVM_MSR_ENABLED
))
3981 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3984 case MSR_KVM_PV_EOI_EN
:
3985 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
3988 if (kvm_lapic_set_pv_eoi(vcpu
, data
, sizeof(u8
)))
3992 case MSR_KVM_POLL_CONTROL
:
3993 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
3996 /* only enable bit supported */
3997 if (data
& (-1ULL << 1))
4000 vcpu
->arch
.msr_kvm_poll_control
= data
;
4003 case MSR_IA32_MCG_CTL
:
4004 case MSR_IA32_MCG_STATUS
:
4005 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4006 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4007 return set_msr_mce(vcpu
, msr_info
);
4009 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
4010 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
4011 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
4012 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
4013 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
4014 return kvm_pmu_set_msr(vcpu
, msr_info
);
4017 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
4019 case MSR_K7_CLK_CTL
:
4021 * Ignore all writes to this no longer documented MSR.
4022 * Writes are only relevant for old K7 processors,
4023 * all pre-dating SVM, but a recommended workaround from
4024 * AMD for these chips. It is possible to specify the
4025 * affected processor models on the command line, hence
4026 * the need to ignore the workaround.
4029 #ifdef CONFIG_KVM_HYPERV
4030 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
4031 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
4032 case HV_X64_MSR_SYNDBG_OPTIONS
:
4033 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
4034 case HV_X64_MSR_CRASH_CTL
:
4035 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
4036 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
4037 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
4038 case HV_X64_MSR_TSC_EMULATION_STATUS
:
4039 case HV_X64_MSR_TSC_INVARIANT_CONTROL
:
4040 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
4041 msr_info
->host_initiated
);
4043 case MSR_IA32_BBL_CR_CTL3
:
4044 /* Drop writes to this legacy MSR -- see rdmsr
4045 * counterpart for further detail.
4047 kvm_pr_unimpl_wrmsr(vcpu
, msr
, data
);
4049 case MSR_AMD64_OSVW_ID_LENGTH
:
4050 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4052 vcpu
->arch
.osvw
.length
= data
;
4054 case MSR_AMD64_OSVW_STATUS
:
4055 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4057 vcpu
->arch
.osvw
.status
= data
;
4059 case MSR_PLATFORM_INFO
:
4060 if (!msr_info
->host_initiated
||
4061 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
4062 cpuid_fault_enabled(vcpu
)))
4064 vcpu
->arch
.msr_platform_info
= data
;
4066 case MSR_MISC_FEATURES_ENABLES
:
4067 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
4068 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
4069 !supports_cpuid_fault(vcpu
)))
4071 vcpu
->arch
.msr_misc_features_enables
= data
;
4073 #ifdef CONFIG_X86_64
4075 if (!msr_info
->host_initiated
&&
4076 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4079 if (data
& ~kvm_guest_supported_xfd(vcpu
))
4082 fpu_update_guest_xfd(&vcpu
->arch
.guest_fpu
, data
);
4084 case MSR_IA32_XFD_ERR
:
4085 if (!msr_info
->host_initiated
&&
4086 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4089 if (data
& ~kvm_guest_supported_xfd(vcpu
))
4092 vcpu
->arch
.guest_fpu
.xfd_err
= data
;
4096 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
4097 return kvm_pmu_set_msr(vcpu
, msr_info
);
4100 * Userspace is allowed to write '0' to MSRs that KVM reports
4101 * as to-be-saved, even if an MSRs isn't fully supported.
4103 if (msr_info
->host_initiated
&& !data
&&
4104 kvm_is_msr_to_save(msr
))
4107 return KVM_MSR_RET_INVALID
;
4111 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
4113 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
4116 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
4117 unsigned bank_num
= mcg_cap
& 0xff;
4118 u32 offset
, last_msr
;
4121 case MSR_IA32_P5_MC_ADDR
:
4122 case MSR_IA32_P5_MC_TYPE
:
4125 case MSR_IA32_MCG_CAP
:
4126 data
= vcpu
->arch
.mcg_cap
;
4128 case MSR_IA32_MCG_CTL
:
4129 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
4131 data
= vcpu
->arch
.mcg_ctl
;
4133 case MSR_IA32_MCG_STATUS
:
4134 data
= vcpu
->arch
.mcg_status
;
4136 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4137 last_msr
= MSR_IA32_MCx_CTL2(bank_num
) - 1;
4141 if (!(mcg_cap
& MCG_CMCI_P
) && !host
)
4143 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL2
,
4144 last_msr
+ 1 - MSR_IA32_MC0_CTL2
);
4145 data
= vcpu
->arch
.mci_ctl2_banks
[offset
];
4147 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4148 last_msr
= MSR_IA32_MCx_CTL(bank_num
) - 1;
4152 offset
= array_index_nospec(msr
- MSR_IA32_MC0_CTL
,
4153 last_msr
+ 1 - MSR_IA32_MC0_CTL
);
4154 data
= vcpu
->arch
.mce_banks
[offset
];
4163 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
4165 switch (msr_info
->index
) {
4166 case MSR_IA32_PLATFORM_ID
:
4167 case MSR_IA32_EBL_CR_POWERON
:
4168 case MSR_IA32_LASTBRANCHFROMIP
:
4169 case MSR_IA32_LASTBRANCHTOIP
:
4170 case MSR_IA32_LASTINTFROMIP
:
4171 case MSR_IA32_LASTINTTOIP
:
4172 case MSR_AMD64_SYSCFG
:
4173 case MSR_K8_TSEG_ADDR
:
4174 case MSR_K8_TSEG_MASK
:
4175 case MSR_VM_HSAVE_PA
:
4176 case MSR_K8_INT_PENDING_MSG
:
4177 case MSR_AMD64_NB_CFG
:
4178 case MSR_FAM10H_MMIO_CONF_BASE
:
4179 case MSR_AMD64_BU_CFG2
:
4180 case MSR_IA32_PERF_CTL
:
4181 case MSR_AMD64_DC_CFG
:
4182 case MSR_AMD64_TW_CFG
:
4183 case MSR_F15H_EX_CFG
:
4185 * Intel Sandy Bridge CPUs must support the RAPL (running average power
4186 * limit) MSRs. Just return 0, as we do not want to expose the host
4187 * data here. Do not conditionalize this on CPUID, as KVM does not do
4188 * so for existing CPU-specific MSRs.
4190 case MSR_RAPL_POWER_UNIT
:
4191 case MSR_PP0_ENERGY_STATUS
: /* Power plane 0 (core) */
4192 case MSR_PP1_ENERGY_STATUS
: /* Power plane 1 (graphics uncore) */
4193 case MSR_PKG_ENERGY_STATUS
: /* Total package */
4194 case MSR_DRAM_ENERGY_STATUS
: /* DRAM controller */
4197 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
4198 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
4199 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
4200 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
4201 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
4202 return kvm_pmu_get_msr(vcpu
, msr_info
);
4205 case MSR_IA32_UCODE_REV
:
4206 msr_info
->data
= vcpu
->arch
.microcode_version
;
4208 case MSR_IA32_ARCH_CAPABILITIES
:
4209 if (!msr_info
->host_initiated
&&
4210 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
4212 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
4214 case MSR_IA32_PERF_CAPABILITIES
:
4215 if (!msr_info
->host_initiated
&&
4216 !guest_cpuid_has(vcpu
, X86_FEATURE_PDCM
))
4218 msr_info
->data
= vcpu
->arch
.perf_capabilities
;
4220 case MSR_IA32_POWER_CTL
:
4221 msr_info
->data
= vcpu
->arch
.msr_ia32_power_ctl
;
4223 case MSR_IA32_TSC
: {
4225 * Intel SDM states that MSR_IA32_TSC read adds the TSC offset
4226 * even when not intercepted. AMD manual doesn't explicitly
4227 * state this but appears to behave the same.
4229 * On userspace reads and writes, however, we unconditionally
4230 * return L1's TSC value to ensure backwards-compatible
4231 * behavior for migration.
4235 if (msr_info
->host_initiated
) {
4236 offset
= vcpu
->arch
.l1_tsc_offset
;
4237 ratio
= vcpu
->arch
.l1_tsc_scaling_ratio
;
4239 offset
= vcpu
->arch
.tsc_offset
;
4240 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
4243 msr_info
->data
= kvm_scale_tsc(rdtsc(), ratio
) + offset
;
4246 case MSR_IA32_CR_PAT
:
4247 msr_info
->data
= vcpu
->arch
.pat
;
4250 case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000
:
4251 case MSR_MTRRdefType
:
4252 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
4253 case 0xcd: /* fsb frequency */
4257 * MSR_EBC_FREQUENCY_ID
4258 * Conservative value valid for even the basic CPU models.
4259 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
4260 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
4261 * and 266MHz for model 3, or 4. Set Core Clock
4262 * Frequency to System Bus Frequency Ratio to 1 (bits
4263 * 31:24) even though these are only valid for CPU
4264 * models > 2, however guests may end up dividing or
4265 * multiplying by zero otherwise.
4267 case MSR_EBC_FREQUENCY_ID
:
4268 msr_info
->data
= 1 << 24;
4270 case MSR_IA32_APICBASE
:
4271 msr_info
->data
= kvm_get_apic_base(vcpu
);
4273 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0xff:
4274 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
4275 case MSR_IA32_TSC_DEADLINE
:
4276 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
4278 case MSR_IA32_TSC_ADJUST
:
4279 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
4281 case MSR_IA32_MISC_ENABLE
:
4282 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
4284 case MSR_IA32_SMBASE
:
4285 if (!IS_ENABLED(CONFIG_KVM_SMM
) || !msr_info
->host_initiated
)
4287 msr_info
->data
= vcpu
->arch
.smbase
;
4290 msr_info
->data
= vcpu
->arch
.smi_count
;
4292 case MSR_IA32_PERF_STATUS
:
4293 /* TSC increment by tick */
4294 msr_info
->data
= 1000ULL;
4295 /* CPU multiplier */
4296 msr_info
->data
|= (((uint64_t)4ULL) << 40);
4299 msr_info
->data
= vcpu
->arch
.efer
;
4301 case MSR_KVM_WALL_CLOCK
:
4302 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
4305 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
4307 case MSR_KVM_WALL_CLOCK_NEW
:
4308 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
4311 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
4313 case MSR_KVM_SYSTEM_TIME
:
4314 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE
))
4317 msr_info
->data
= vcpu
->arch
.time
;
4319 case MSR_KVM_SYSTEM_TIME_NEW
:
4320 if (!guest_pv_has(vcpu
, KVM_FEATURE_CLOCKSOURCE2
))
4323 msr_info
->data
= vcpu
->arch
.time
;
4325 case MSR_KVM_ASYNC_PF_EN
:
4326 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF
))
4329 msr_info
->data
= vcpu
->arch
.apf
.msr_en_val
;
4331 case MSR_KVM_ASYNC_PF_INT
:
4332 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4335 msr_info
->data
= vcpu
->arch
.apf
.msr_int_val
;
4337 case MSR_KVM_ASYNC_PF_ACK
:
4338 if (!guest_pv_has(vcpu
, KVM_FEATURE_ASYNC_PF_INT
))
4343 case MSR_KVM_STEAL_TIME
:
4344 if (!guest_pv_has(vcpu
, KVM_FEATURE_STEAL_TIME
))
4347 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
4349 case MSR_KVM_PV_EOI_EN
:
4350 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_EOI
))
4353 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
4355 case MSR_KVM_POLL_CONTROL
:
4356 if (!guest_pv_has(vcpu
, KVM_FEATURE_POLL_CONTROL
))
4359 msr_info
->data
= vcpu
->arch
.msr_kvm_poll_control
;
4361 case MSR_IA32_P5_MC_ADDR
:
4362 case MSR_IA32_P5_MC_TYPE
:
4363 case MSR_IA32_MCG_CAP
:
4364 case MSR_IA32_MCG_CTL
:
4365 case MSR_IA32_MCG_STATUS
:
4366 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
4367 case MSR_IA32_MC0_CTL2
... MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS
) - 1:
4368 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
4369 msr_info
->host_initiated
);
4371 if (!msr_info
->host_initiated
&&
4372 !guest_cpuid_has(vcpu
, X86_FEATURE_XSAVES
))
4374 msr_info
->data
= vcpu
->arch
.ia32_xss
;
4376 case MSR_K7_CLK_CTL
:
4378 * Provide expected ramp-up count for K7. All other
4379 * are set to zero, indicating minimum divisors for
4382 * This prevents guest kernels on AMD host with CPU
4383 * type 6, model 8 and higher from exploding due to
4384 * the rdmsr failing.
4386 msr_info
->data
= 0x20000000;
4388 #ifdef CONFIG_KVM_HYPERV
4389 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
4390 case HV_X64_MSR_SYNDBG_CONTROL
... HV_X64_MSR_SYNDBG_PENDING_BUFFER
:
4391 case HV_X64_MSR_SYNDBG_OPTIONS
:
4392 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
4393 case HV_X64_MSR_CRASH_CTL
:
4394 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
4395 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
4396 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
4397 case HV_X64_MSR_TSC_EMULATION_STATUS
:
4398 case HV_X64_MSR_TSC_INVARIANT_CONTROL
:
4399 return kvm_hv_get_msr_common(vcpu
,
4400 msr_info
->index
, &msr_info
->data
,
4401 msr_info
->host_initiated
);
4403 case MSR_IA32_BBL_CR_CTL3
:
4404 /* This legacy MSR exists but isn't fully documented in current
4405 * silicon. It is however accessed by winxp in very narrow
4406 * scenarios where it sets bit #19, itself documented as
4407 * a "reserved" bit. Best effort attempt to source coherent
4408 * read data here should the balance of the register be
4409 * interpreted by the guest:
4411 * L2 cache control register 3: 64GB range, 256KB size,
4412 * enabled, latency 0x1, configured
4414 msr_info
->data
= 0xbe702111;
4416 case MSR_AMD64_OSVW_ID_LENGTH
:
4417 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4419 msr_info
->data
= vcpu
->arch
.osvw
.length
;
4421 case MSR_AMD64_OSVW_STATUS
:
4422 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
4424 msr_info
->data
= vcpu
->arch
.osvw
.status
;
4426 case MSR_PLATFORM_INFO
:
4427 if (!msr_info
->host_initiated
&&
4428 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
4430 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
4432 case MSR_MISC_FEATURES_ENABLES
:
4433 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
4436 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
4438 #ifdef CONFIG_X86_64
4440 if (!msr_info
->host_initiated
&&
4441 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4444 msr_info
->data
= vcpu
->arch
.guest_fpu
.fpstate
->xfd
;
4446 case MSR_IA32_XFD_ERR
:
4447 if (!msr_info
->host_initiated
&&
4448 !guest_cpuid_has(vcpu
, X86_FEATURE_XFD
))
4451 msr_info
->data
= vcpu
->arch
.guest_fpu
.xfd_err
;
4455 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
4456 return kvm_pmu_get_msr(vcpu
, msr_info
);
4459 * Userspace is allowed to read MSRs that KVM reports as
4460 * to-be-saved, even if an MSR isn't fully supported.
4462 if (msr_info
->host_initiated
&&
4463 kvm_is_msr_to_save(msr_info
->index
)) {
4468 return KVM_MSR_RET_INVALID
;
4472 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
4475 * Read or write a bunch of msrs. All parameters are kernel addresses.
4477 * @return number of msrs set successfully.
4479 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
4480 struct kvm_msr_entry
*entries
,
4481 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4482 unsigned index
, u64
*data
))
4486 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
4487 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
4494 * Read or write a bunch of msrs. Parameters are user addresses.
4496 * @return number of msrs set successfully.
4498 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
4499 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
4500 unsigned index
, u64
*data
),
4503 struct kvm_msrs msrs
;
4504 struct kvm_msr_entry
*entries
;
4509 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
4513 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
4516 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
4517 entries
= memdup_user(user_msrs
->entries
, size
);
4518 if (IS_ERR(entries
)) {
4519 r
= PTR_ERR(entries
);
4523 r
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
4525 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
4533 static inline bool kvm_can_mwait_in_guest(void)
4535 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
4536 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
4537 boot_cpu_has(X86_FEATURE_ARAT
);
4540 #ifdef CONFIG_KVM_HYPERV
4541 static int kvm_ioctl_get_supported_hv_cpuid(struct kvm_vcpu
*vcpu
,
4542 struct kvm_cpuid2 __user
*cpuid_arg
)
4544 struct kvm_cpuid2 cpuid
;
4548 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4551 r
= kvm_get_hv_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
4556 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4563 static bool kvm_is_vm_type_supported(unsigned long type
)
4565 return type
== KVM_X86_DEFAULT_VM
||
4566 (type
== KVM_X86_SW_PROTECTED_VM
&&
4567 IS_ENABLED(CONFIG_KVM_SW_PROTECTED_VM
) && tdp_enabled
);
4570 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
4575 case KVM_CAP_IRQCHIP
:
4577 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
4578 case KVM_CAP_SET_TSS_ADDR
:
4579 case KVM_CAP_EXT_CPUID
:
4580 case KVM_CAP_EXT_EMUL_CPUID
:
4581 case KVM_CAP_CLOCKSOURCE
:
4583 case KVM_CAP_NOP_IO_DELAY
:
4584 case KVM_CAP_MP_STATE
:
4585 case KVM_CAP_SYNC_MMU
:
4586 case KVM_CAP_USER_NMI
:
4587 case KVM_CAP_REINJECT_CONTROL
:
4588 case KVM_CAP_IRQ_INJECT_STATUS
:
4589 case KVM_CAP_IOEVENTFD
:
4590 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
4592 case KVM_CAP_PIT_STATE2
:
4593 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
4594 case KVM_CAP_VCPU_EVENTS
:
4595 #ifdef CONFIG_KVM_HYPERV
4596 case KVM_CAP_HYPERV
:
4597 case KVM_CAP_HYPERV_VAPIC
:
4598 case KVM_CAP_HYPERV_SPIN
:
4599 case KVM_CAP_HYPERV_TIME
:
4600 case KVM_CAP_HYPERV_SYNIC
:
4601 case KVM_CAP_HYPERV_SYNIC2
:
4602 case KVM_CAP_HYPERV_VP_INDEX
:
4603 case KVM_CAP_HYPERV_EVENTFD
:
4604 case KVM_CAP_HYPERV_TLBFLUSH
:
4605 case KVM_CAP_HYPERV_SEND_IPI
:
4606 case KVM_CAP_HYPERV_CPUID
:
4607 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
4608 case KVM_CAP_SYS_HYPERV_CPUID
:
4610 case KVM_CAP_PCI_SEGMENT
:
4611 case KVM_CAP_DEBUGREGS
:
4612 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
4614 case KVM_CAP_ASYNC_PF
:
4615 case KVM_CAP_ASYNC_PF_INT
:
4616 case KVM_CAP_GET_TSC_KHZ
:
4617 case KVM_CAP_KVMCLOCK_CTRL
:
4618 case KVM_CAP_READONLY_MEM
:
4619 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
4620 case KVM_CAP_TSC_DEADLINE_TIMER
:
4621 case KVM_CAP_DISABLE_QUIRKS
:
4622 case KVM_CAP_SET_BOOT_CPU_ID
:
4623 case KVM_CAP_SPLIT_IRQCHIP
:
4624 case KVM_CAP_IMMEDIATE_EXIT
:
4625 case KVM_CAP_PMU_EVENT_FILTER
:
4626 case KVM_CAP_PMU_EVENT_MASKED_EVENTS
:
4627 case KVM_CAP_GET_MSR_FEATURES
:
4628 case KVM_CAP_MSR_PLATFORM_INFO
:
4629 case KVM_CAP_EXCEPTION_PAYLOAD
:
4630 case KVM_CAP_X86_TRIPLE_FAULT_EVENT
:
4631 case KVM_CAP_SET_GUEST_DEBUG
:
4632 case KVM_CAP_LAST_CPU
:
4633 case KVM_CAP_X86_USER_SPACE_MSR
:
4634 case KVM_CAP_X86_MSR_FILTER
:
4635 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
4636 #ifdef CONFIG_X86_SGX_KVM
4637 case KVM_CAP_SGX_ATTRIBUTE
:
4639 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
4640 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
4641 case KVM_CAP_SREGS2
:
4642 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
4643 case KVM_CAP_VCPU_ATTRIBUTES
:
4644 case KVM_CAP_SYS_ATTRIBUTES
:
4646 case KVM_CAP_ENABLE_CAP
:
4647 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES
:
4648 case KVM_CAP_IRQFD_RESAMPLE
:
4649 case KVM_CAP_MEMORY_FAULT_INFO
:
4652 case KVM_CAP_EXIT_HYPERCALL
:
4653 r
= KVM_EXIT_HYPERCALL_VALID_MASK
;
4655 case KVM_CAP_SET_GUEST_DEBUG2
:
4656 return KVM_GUESTDBG_VALID_MASK
;
4657 #ifdef CONFIG_KVM_XEN
4658 case KVM_CAP_XEN_HVM
:
4659 r
= KVM_XEN_HVM_CONFIG_HYPERCALL_MSR
|
4660 KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL
|
4661 KVM_XEN_HVM_CONFIG_SHARED_INFO
|
4662 KVM_XEN_HVM_CONFIG_EVTCHN_2LEVEL
|
4663 KVM_XEN_HVM_CONFIG_EVTCHN_SEND
;
4664 if (sched_info_on())
4665 r
|= KVM_XEN_HVM_CONFIG_RUNSTATE
|
4666 KVM_XEN_HVM_CONFIG_RUNSTATE_UPDATE_FLAG
;
4669 case KVM_CAP_SYNC_REGS
:
4670 r
= KVM_SYNC_X86_VALID_FIELDS
;
4672 case KVM_CAP_ADJUST_CLOCK
:
4673 r
= KVM_CLOCK_VALID_FLAGS
;
4675 case KVM_CAP_X86_DISABLE_EXITS
:
4676 r
= KVM_X86_DISABLE_EXITS_PAUSE
;
4678 if (!mitigate_smt_rsb
) {
4679 r
|= KVM_X86_DISABLE_EXITS_HLT
|
4680 KVM_X86_DISABLE_EXITS_CSTATE
;
4682 if (kvm_can_mwait_in_guest())
4683 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
4686 case KVM_CAP_X86_SMM
:
4687 if (!IS_ENABLED(CONFIG_KVM_SMM
))
4690 /* SMBASE is usually relocated above 1M on modern chipsets,
4691 * and SMM handlers might indeed rely on 4G segment limits,
4692 * so do not report SMM to be available if real mode is
4693 * emulated via vm86 mode. Still, do not go to great lengths
4694 * to avoid userspace's usage of the feature, because it is a
4695 * fringe case that is not enabled except via specific settings
4696 * of the module parameters.
4698 r
= static_call(kvm_x86_has_emulated_msr
)(kvm
, MSR_IA32_SMBASE
);
4700 case KVM_CAP_NR_VCPUS
:
4701 r
= min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS
);
4703 case KVM_CAP_MAX_VCPUS
:
4706 case KVM_CAP_MAX_VCPU_ID
:
4707 r
= KVM_MAX_VCPU_IDS
;
4709 case KVM_CAP_PV_MMU
: /* obsolete */
4713 r
= KVM_MAX_MCE_BANKS
;
4716 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
4718 case KVM_CAP_TSC_CONTROL
:
4719 case KVM_CAP_VM_TSC_CONTROL
:
4720 r
= kvm_caps
.has_tsc_control
;
4722 case KVM_CAP_X2APIC_API
:
4723 r
= KVM_X2APIC_API_VALID_FLAGS
;
4725 case KVM_CAP_NESTED_STATE
:
4726 r
= kvm_x86_ops
.nested_ops
->get_state
?
4727 kvm_x86_ops
.nested_ops
->get_state(NULL
, NULL
, 0) : 0;
4729 #ifdef CONFIG_KVM_HYPERV
4730 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
4731 r
= kvm_x86_ops
.enable_l2_tlb_flush
!= NULL
;
4733 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
4734 r
= kvm_x86_ops
.nested_ops
->enable_evmcs
!= NULL
;
4737 case KVM_CAP_SMALLER_MAXPHYADDR
:
4738 r
= (int) allow_smaller_maxphyaddr
;
4740 case KVM_CAP_STEAL_TIME
:
4741 r
= sched_info_on();
4743 case KVM_CAP_X86_BUS_LOCK_EXIT
:
4744 if (kvm_caps
.has_bus_lock_exit
)
4745 r
= KVM_BUS_LOCK_DETECTION_OFF
|
4746 KVM_BUS_LOCK_DETECTION_EXIT
;
4750 case KVM_CAP_XSAVE2
: {
4751 r
= xstate_required_size(kvm_get_filtered_xcr0(), false);
4752 if (r
< sizeof(struct kvm_xsave
))
4753 r
= sizeof(struct kvm_xsave
);
4756 case KVM_CAP_PMU_CAPABILITY
:
4757 r
= enable_pmu
? KVM_CAP_PMU_VALID_MASK
: 0;
4759 case KVM_CAP_DISABLE_QUIRKS2
:
4760 r
= KVM_X86_VALID_QUIRKS
;
4762 case KVM_CAP_X86_NOTIFY_VMEXIT
:
4763 r
= kvm_caps
.has_notify_vmexit
;
4765 case KVM_CAP_VM_TYPES
:
4766 r
= BIT(KVM_X86_DEFAULT_VM
);
4767 if (kvm_is_vm_type_supported(KVM_X86_SW_PROTECTED_VM
))
4768 r
|= BIT(KVM_X86_SW_PROTECTED_VM
);
4776 static inline void __user
*kvm_get_attr_addr(struct kvm_device_attr
*attr
)
4778 void __user
*uaddr
= (void __user
*)(unsigned long)attr
->addr
;
4780 if ((u64
)(unsigned long)uaddr
!= attr
->addr
)
4781 return ERR_PTR_USR(-EFAULT
);
4785 static int kvm_x86_dev_get_attr(struct kvm_device_attr
*attr
)
4787 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
4793 return PTR_ERR(uaddr
);
4795 switch (attr
->attr
) {
4796 case KVM_X86_XCOMP_GUEST_SUPP
:
4797 if (put_user(kvm_caps
.supported_xcr0
, uaddr
))
4805 static int kvm_x86_dev_has_attr(struct kvm_device_attr
*attr
)
4810 switch (attr
->attr
) {
4811 case KVM_X86_XCOMP_GUEST_SUPP
:
4818 long kvm_arch_dev_ioctl(struct file
*filp
,
4819 unsigned int ioctl
, unsigned long arg
)
4821 void __user
*argp
= (void __user
*)arg
;
4825 case KVM_GET_MSR_INDEX_LIST
: {
4826 struct kvm_msr_list __user
*user_msr_list
= argp
;
4827 struct kvm_msr_list msr_list
;
4831 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4834 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
4835 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4838 if (n
< msr_list
.nmsrs
)
4841 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
4842 num_msrs_to_save
* sizeof(u32
)))
4844 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
4846 num_emulated_msrs
* sizeof(u32
)))
4851 case KVM_GET_SUPPORTED_CPUID
:
4852 case KVM_GET_EMULATED_CPUID
: {
4853 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4854 struct kvm_cpuid2 cpuid
;
4857 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4860 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
4866 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4871 case KVM_X86_GET_MCE_CAP_SUPPORTED
:
4873 if (copy_to_user(argp
, &kvm_caps
.supported_mce_cap
,
4874 sizeof(kvm_caps
.supported_mce_cap
)))
4878 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
4879 struct kvm_msr_list __user
*user_msr_list
= argp
;
4880 struct kvm_msr_list msr_list
;
4884 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
4887 msr_list
.nmsrs
= num_msr_based_features
;
4888 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
4891 if (n
< msr_list
.nmsrs
)
4894 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
4895 num_msr_based_features
* sizeof(u32
)))
4901 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
4903 #ifdef CONFIG_KVM_HYPERV
4904 case KVM_GET_SUPPORTED_HV_CPUID
:
4905 r
= kvm_ioctl_get_supported_hv_cpuid(NULL
, argp
);
4908 case KVM_GET_DEVICE_ATTR
: {
4909 struct kvm_device_attr attr
;
4911 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4913 r
= kvm_x86_dev_get_attr(&attr
);
4916 case KVM_HAS_DEVICE_ATTR
: {
4917 struct kvm_device_attr attr
;
4919 if (copy_from_user(&attr
, (void __user
*)arg
, sizeof(attr
)))
4921 r
= kvm_x86_dev_has_attr(&attr
);
4932 static void wbinvd_ipi(void *garbage
)
4937 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4939 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
4942 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
4944 /* Address WBINVD may be executed by guest */
4945 if (need_emulate_wbinvd(vcpu
)) {
4946 if (static_call(kvm_x86_has_wbinvd_exit
)())
4947 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4948 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
4949 smp_call_function_single(vcpu
->cpu
,
4950 wbinvd_ipi
, NULL
, 1);
4953 static_call(kvm_x86_vcpu_load
)(vcpu
, cpu
);
4955 /* Save host pkru register if supported */
4956 vcpu
->arch
.host_pkru
= read_pkru();
4958 /* Apply any externally detected TSC adjustments (due to suspend) */
4959 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
4960 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
4961 vcpu
->arch
.tsc_offset_adjustment
= 0;
4962 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
4965 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
4966 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
4967 rdtsc() - vcpu
->arch
.last_host_tsc
;
4969 mark_tsc_unstable("KVM discovered backwards TSC");
4971 if (kvm_check_tsc_unstable()) {
4972 u64 offset
= kvm_compute_l1_tsc_offset(vcpu
,
4973 vcpu
->arch
.last_guest_tsc
);
4974 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
4975 vcpu
->arch
.tsc_catchup
= 1;
4978 if (kvm_lapic_hv_timer_in_use(vcpu
))
4979 kvm_lapic_restart_hv_timer(vcpu
);
4982 * On a host with synchronized TSC, there is no need to update
4983 * kvmclock on vcpu->cpu migration
4985 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
4986 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
4987 if (vcpu
->cpu
!= cpu
)
4988 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
4992 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
4995 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
4997 struct gfn_to_hva_cache
*ghc
= &vcpu
->arch
.st
.cache
;
4998 struct kvm_steal_time __user
*st
;
4999 struct kvm_memslots
*slots
;
5000 static const u8 preempted
= KVM_VCPU_PREEMPTED
;
5001 gpa_t gpa
= vcpu
->arch
.st
.msr_val
& KVM_STEAL_VALID_BITS
;
5004 * The vCPU can be marked preempted if and only if the VM-Exit was on
5005 * an instruction boundary and will not trigger guest emulation of any
5006 * kind (see vcpu_run). Vendor specific code controls (conservatively)
5007 * when this is true, for example allowing the vCPU to be marked
5008 * preempted if and only if the VM-Exit was due to a host interrupt.
5010 if (!vcpu
->arch
.at_instruction_boundary
) {
5011 vcpu
->stat
.preemption_other
++;
5015 vcpu
->stat
.preemption_reported
++;
5016 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
5019 if (vcpu
->arch
.st
.preempted
)
5022 /* This happens on process exit */
5023 if (unlikely(current
->mm
!= vcpu
->kvm
->mm
))
5026 slots
= kvm_memslots(vcpu
->kvm
);
5028 if (unlikely(slots
->generation
!= ghc
->generation
||
5030 kvm_is_error_hva(ghc
->hva
) || !ghc
->memslot
))
5033 st
= (struct kvm_steal_time __user
*)ghc
->hva
;
5034 BUILD_BUG_ON(sizeof(st
->preempted
) != sizeof(preempted
));
5036 if (!copy_to_user_nofault(&st
->preempted
, &preempted
, sizeof(preempted
)))
5037 vcpu
->arch
.st
.preempted
= KVM_VCPU_PREEMPTED
;
5039 mark_page_dirty_in_slot(vcpu
->kvm
, ghc
->memslot
, gpa_to_gfn(ghc
->gpa
));
5042 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
5046 if (vcpu
->preempted
) {
5047 if (!vcpu
->arch
.guest_state_protected
)
5048 vcpu
->arch
.preempted_in_kernel
= !static_call(kvm_x86_get_cpl
)(vcpu
);
5051 * Take the srcu lock as memslots will be accessed to check the gfn
5052 * cache generation against the memslots generation.
5054 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5055 if (kvm_xen_msr_enabled(vcpu
->kvm
))
5056 kvm_xen_runstate_set_preempted(vcpu
);
5058 kvm_steal_time_set_preempted(vcpu
);
5059 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5062 static_call(kvm_x86_vcpu_put
)(vcpu
);
5063 vcpu
->arch
.last_host_tsc
= rdtsc();
5066 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
5067 struct kvm_lapic_state
*s
)
5069 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
5071 return kvm_apic_get_state(vcpu
, s
);
5074 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
5075 struct kvm_lapic_state
*s
)
5079 r
= kvm_apic_set_state(vcpu
, s
);
5082 update_cr8_intercept(vcpu
);
5087 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
5090 * We can accept userspace's request for interrupt injection
5091 * as long as we have a place to store the interrupt number.
5092 * The actual injection will happen when the CPU is able to
5093 * deliver the interrupt.
5095 if (kvm_cpu_has_extint(vcpu
))
5098 /* Acknowledging ExtINT does not happen if LINT0 is masked. */
5099 return (!lapic_in_kernel(vcpu
) ||
5100 kvm_apic_accept_pic_intr(vcpu
));
5103 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
5106 * Do not cause an interrupt window exit if an exception
5107 * is pending or an event needs reinjection; userspace
5108 * might want to inject the interrupt manually using KVM_SET_REGS
5109 * or KVM_SET_SREGS. For that to work, we must be at an
5110 * instruction boundary and with no events half-injected.
5112 return (kvm_arch_interrupt_allowed(vcpu
) &&
5113 kvm_cpu_accept_dm_intr(vcpu
) &&
5114 !kvm_event_needs_reinjection(vcpu
) &&
5115 !kvm_is_exception_pending(vcpu
));
5118 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
5119 struct kvm_interrupt
*irq
)
5121 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
5124 if (!irqchip_in_kernel(vcpu
->kvm
)) {
5125 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
5126 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5131 * With in-kernel LAPIC, we only use this to inject EXTINT, so
5132 * fail for in-kernel 8259.
5134 if (pic_in_kernel(vcpu
->kvm
))
5137 if (vcpu
->arch
.pending_external_vector
!= -1)
5140 vcpu
->arch
.pending_external_vector
= irq
->irq
;
5141 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5145 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
5147 kvm_inject_nmi(vcpu
);
5152 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
5153 struct kvm_tpr_access_ctl
*tac
)
5157 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
5161 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
5165 unsigned bank_num
= mcg_cap
& 0xff, bank
;
5168 if (!bank_num
|| bank_num
> KVM_MAX_MCE_BANKS
)
5170 if (mcg_cap
& ~(kvm_caps
.supported_mce_cap
| 0xff | 0xff0000))
5173 vcpu
->arch
.mcg_cap
= mcg_cap
;
5174 /* Init IA32_MCG_CTL to all 1s */
5175 if (mcg_cap
& MCG_CTL_P
)
5176 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
5177 /* Init IA32_MCi_CTL to all 1s, IA32_MCi_CTL2 to all 0s */
5178 for (bank
= 0; bank
< bank_num
; bank
++) {
5179 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
5180 if (mcg_cap
& MCG_CMCI_P
)
5181 vcpu
->arch
.mci_ctl2_banks
[bank
] = 0;
5184 kvm_apic_after_set_mcg_cap(vcpu
);
5186 static_call(kvm_x86_setup_mce
)(vcpu
);
5192 * Validate this is an UCNA (uncorrectable no action) error by checking the
5193 * MCG_STATUS and MCi_STATUS registers:
5194 * - none of the bits for Machine Check Exceptions are set
5195 * - both the VAL (valid) and UC (uncorrectable) bits are set
5196 * MCI_STATUS_PCC - Processor Context Corrupted
5197 * MCI_STATUS_S - Signaled as a Machine Check Exception
5198 * MCI_STATUS_AR - Software recoverable Action Required
5200 static bool is_ucna(struct kvm_x86_mce
*mce
)
5202 return !mce
->mcg_status
&&
5203 !(mce
->status
& (MCI_STATUS_PCC
| MCI_STATUS_S
| MCI_STATUS_AR
)) &&
5204 (mce
->status
& MCI_STATUS_VAL
) &&
5205 (mce
->status
& MCI_STATUS_UC
);
5208 static int kvm_vcpu_x86_set_ucna(struct kvm_vcpu
*vcpu
, struct kvm_x86_mce
*mce
, u64
* banks
)
5210 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
5212 banks
[1] = mce
->status
;
5213 banks
[2] = mce
->addr
;
5214 banks
[3] = mce
->misc
;
5215 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
5217 if (!(mcg_cap
& MCG_CMCI_P
) ||
5218 !(vcpu
->arch
.mci_ctl2_banks
[mce
->bank
] & MCI_CTL2_CMCI_EN
))
5221 if (lapic_in_kernel(vcpu
))
5222 kvm_apic_local_deliver(vcpu
->arch
.apic
, APIC_LVTCMCI
);
5227 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
5228 struct kvm_x86_mce
*mce
)
5230 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
5231 unsigned bank_num
= mcg_cap
& 0xff;
5232 u64
*banks
= vcpu
->arch
.mce_banks
;
5234 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
5237 banks
+= array_index_nospec(4 * mce
->bank
, 4 * bank_num
);
5240 return kvm_vcpu_x86_set_ucna(vcpu
, mce
, banks
);
5243 * if IA32_MCG_CTL is not all 1s, the uncorrected error
5244 * reporting is disabled
5246 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
5247 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
5250 * if IA32_MCi_CTL is not all 1s, the uncorrected error
5251 * reporting is disabled for the bank
5253 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
5255 if (mce
->status
& MCI_STATUS_UC
) {
5256 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
5257 !kvm_is_cr4_bit_set(vcpu
, X86_CR4_MCE
)) {
5258 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5261 if (banks
[1] & MCI_STATUS_VAL
)
5262 mce
->status
|= MCI_STATUS_OVER
;
5263 banks
[2] = mce
->addr
;
5264 banks
[3] = mce
->misc
;
5265 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
5266 banks
[1] = mce
->status
;
5267 kvm_queue_exception(vcpu
, MC_VECTOR
);
5268 } else if (!(banks
[1] & MCI_STATUS_VAL
)
5269 || !(banks
[1] & MCI_STATUS_UC
)) {
5270 if (banks
[1] & MCI_STATUS_VAL
)
5271 mce
->status
|= MCI_STATUS_OVER
;
5272 banks
[2] = mce
->addr
;
5273 banks
[3] = mce
->misc
;
5274 banks
[1] = mce
->status
;
5276 banks
[1] |= MCI_STATUS_OVER
;
5280 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
5281 struct kvm_vcpu_events
*events
)
5283 struct kvm_queued_exception
*ex
;
5287 #ifdef CONFIG_KVM_SMM
5288 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
5293 * KVM's ABI only allows for one exception to be migrated. Luckily,
5294 * the only time there can be two queued exceptions is if there's a
5295 * non-exiting _injected_ exception, and a pending exiting exception.
5296 * In that case, ignore the VM-Exiting exception as it's an extension
5297 * of the injected exception.
5299 if (vcpu
->arch
.exception_vmexit
.pending
&&
5300 !vcpu
->arch
.exception
.pending
&&
5301 !vcpu
->arch
.exception
.injected
)
5302 ex
= &vcpu
->arch
.exception_vmexit
;
5304 ex
= &vcpu
->arch
.exception
;
5307 * In guest mode, payload delivery should be deferred if the exception
5308 * will be intercepted by L1, e.g. KVM should not modifying CR2 if L1
5309 * intercepts #PF, ditto for DR6 and #DBs. If the per-VM capability,
5310 * KVM_CAP_EXCEPTION_PAYLOAD, is not set, userspace may or may not
5311 * propagate the payload and so it cannot be safely deferred. Deliver
5312 * the payload if the capability hasn't been requested.
5314 if (!vcpu
->kvm
->arch
.exception_payload_enabled
&&
5315 ex
->pending
&& ex
->has_payload
)
5316 kvm_deliver_exception_payload(vcpu
, ex
);
5318 memset(events
, 0, sizeof(*events
));
5321 * The API doesn't provide the instruction length for software
5322 * exceptions, so don't report them. As long as the guest RIP
5323 * isn't advanced, we should expect to encounter the exception
5326 if (!kvm_exception_is_soft(ex
->vector
)) {
5327 events
->exception
.injected
= ex
->injected
;
5328 events
->exception
.pending
= ex
->pending
;
5330 * For ABI compatibility, deliberately conflate
5331 * pending and injected exceptions when
5332 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
5334 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
5335 events
->exception
.injected
|= ex
->pending
;
5337 events
->exception
.nr
= ex
->vector
;
5338 events
->exception
.has_error_code
= ex
->has_error_code
;
5339 events
->exception
.error_code
= ex
->error_code
;
5340 events
->exception_has_payload
= ex
->has_payload
;
5341 events
->exception_payload
= ex
->payload
;
5343 events
->interrupt
.injected
=
5344 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
5345 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
5346 events
->interrupt
.shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
5348 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
5349 events
->nmi
.pending
= kvm_get_nr_pending_nmis(vcpu
);
5350 events
->nmi
.masked
= static_call(kvm_x86_get_nmi_mask
)(vcpu
);
5352 /* events->sipi_vector is never valid when reporting to user space */
5354 #ifdef CONFIG_KVM_SMM
5355 events
->smi
.smm
= is_smm(vcpu
);
5356 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
5357 events
->smi
.smm_inside_nmi
=
5358 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
5360 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
5362 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
5363 | KVM_VCPUEVENT_VALID_SHADOW
5364 | KVM_VCPUEVENT_VALID_SMM
);
5365 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
5366 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
5367 if (vcpu
->kvm
->arch
.triple_fault_event
) {
5368 events
->triple_fault
.pending
= kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5369 events
->flags
|= KVM_VCPUEVENT_VALID_TRIPLE_FAULT
;
5373 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
5374 struct kvm_vcpu_events
*events
)
5376 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
5377 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
5378 | KVM_VCPUEVENT_VALID_SHADOW
5379 | KVM_VCPUEVENT_VALID_SMM
5380 | KVM_VCPUEVENT_VALID_PAYLOAD
5381 | KVM_VCPUEVENT_VALID_TRIPLE_FAULT
))
5384 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
5385 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
5387 if (events
->exception
.pending
)
5388 events
->exception
.injected
= 0;
5390 events
->exception_has_payload
= 0;
5392 events
->exception
.pending
= 0;
5393 events
->exception_has_payload
= 0;
5396 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
5397 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
5400 /* INITs are latched while in SMM */
5401 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
5402 (events
->smi
.smm
|| events
->smi
.pending
) &&
5403 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
5409 * Flag that userspace is stuffing an exception, the next KVM_RUN will
5410 * morph the exception to a VM-Exit if appropriate. Do this only for
5411 * pending exceptions, already-injected exceptions are not subject to
5412 * intercpetion. Note, userspace that conflates pending and injected
5413 * is hosed, and will incorrectly convert an injected exception into a
5414 * pending exception, which in turn may cause a spurious VM-Exit.
5416 vcpu
->arch
.exception_from_userspace
= events
->exception
.pending
;
5418 vcpu
->arch
.exception_vmexit
.pending
= false;
5420 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
5421 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
5422 vcpu
->arch
.exception
.vector
= events
->exception
.nr
;
5423 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
5424 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
5425 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
5426 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
5428 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
5429 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
5430 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
5431 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
5432 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
,
5433 events
->interrupt
.shadow
);
5435 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
5436 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
) {
5437 vcpu
->arch
.nmi_pending
= 0;
5438 atomic_set(&vcpu
->arch
.nmi_queued
, events
->nmi
.pending
);
5439 kvm_make_request(KVM_REQ_NMI
, vcpu
);
5441 static_call(kvm_x86_set_nmi_mask
)(vcpu
, events
->nmi
.masked
);
5443 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
5444 lapic_in_kernel(vcpu
))
5445 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
5447 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
5448 #ifdef CONFIG_KVM_SMM
5449 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
5450 kvm_leave_nested(vcpu
);
5451 kvm_smm_changed(vcpu
, events
->smi
.smm
);
5454 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
5456 if (events
->smi
.smm
) {
5457 if (events
->smi
.smm_inside_nmi
)
5458 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
5460 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
5464 if (events
->smi
.smm
|| events
->smi
.pending
||
5465 events
->smi
.smm_inside_nmi
)
5469 if (lapic_in_kernel(vcpu
)) {
5470 if (events
->smi
.latched_init
)
5471 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5473 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
5477 if (events
->flags
& KVM_VCPUEVENT_VALID_TRIPLE_FAULT
) {
5478 if (!vcpu
->kvm
->arch
.triple_fault_event
)
5480 if (events
->triple_fault
.pending
)
5481 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5483 kvm_clear_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
5486 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5491 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
5492 struct kvm_debugregs
*dbgregs
)
5496 memset(dbgregs
, 0, sizeof(*dbgregs
));
5497 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
5498 kvm_get_dr(vcpu
, 6, &val
);
5500 dbgregs
->dr7
= vcpu
->arch
.dr7
;
5503 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
5504 struct kvm_debugregs
*dbgregs
)
5509 if (!kvm_dr6_valid(dbgregs
->dr6
))
5511 if (!kvm_dr7_valid(dbgregs
->dr7
))
5514 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
5515 kvm_update_dr0123(vcpu
);
5516 vcpu
->arch
.dr6
= dbgregs
->dr6
;
5517 vcpu
->arch
.dr7
= dbgregs
->dr7
;
5518 kvm_update_dr7(vcpu
);
5524 static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu
*vcpu
,
5525 u8
*state
, unsigned int size
)
5528 * Only copy state for features that are enabled for the guest. The
5529 * state itself isn't problematic, but setting bits in the header for
5530 * features that are supported in *this* host but not exposed to the
5531 * guest can result in KVM_SET_XSAVE failing when live migrating to a
5532 * compatible host without the features that are NOT exposed to the
5535 * FP+SSE can always be saved/restored via KVM_{G,S}ET_XSAVE, even if
5536 * XSAVE/XCRO are not exposed to the guest, and even if XSAVE isn't
5537 * supported by the host.
5539 u64 supported_xcr0
= vcpu
->arch
.guest_supported_xcr0
|
5540 XFEATURE_MASK_FPSSE
;
5542 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5545 fpu_copy_guest_fpstate_to_uabi(&vcpu
->arch
.guest_fpu
, state
, size
,
5546 supported_xcr0
, vcpu
->arch
.pkru
);
5549 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
5550 struct kvm_xsave
*guest_xsave
)
5552 kvm_vcpu_ioctl_x86_get_xsave2(vcpu
, (void *)guest_xsave
->region
,
5553 sizeof(guest_xsave
->region
));
5556 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
5557 struct kvm_xsave
*guest_xsave
)
5559 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
5562 return fpu_copy_uabi_to_guest_fpstate(&vcpu
->arch
.guest_fpu
,
5563 guest_xsave
->region
,
5564 kvm_caps
.supported_xcr0
,
5568 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
5569 struct kvm_xcrs
*guest_xcrs
)
5571 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
5572 guest_xcrs
->nr_xcrs
= 0;
5576 guest_xcrs
->nr_xcrs
= 1;
5577 guest_xcrs
->flags
= 0;
5578 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
5579 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
5582 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
5583 struct kvm_xcrs
*guest_xcrs
)
5587 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
5590 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
5593 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
5594 /* Only support XCR0 currently */
5595 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
5596 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
5597 guest_xcrs
->xcrs
[i
].value
);
5606 * kvm_set_guest_paused() indicates to the guest kernel that it has been
5607 * stopped by the hypervisor. This function will be called from the host only.
5608 * EINVAL is returned when the host attempts to set the flag for a guest that
5609 * does not support pv clocks.
5611 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
5613 if (!vcpu
->arch
.pv_time
.active
)
5615 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
5616 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5620 static int kvm_arch_tsc_has_attr(struct kvm_vcpu
*vcpu
,
5621 struct kvm_device_attr
*attr
)
5625 switch (attr
->attr
) {
5626 case KVM_VCPU_TSC_OFFSET
:
5636 static int kvm_arch_tsc_get_attr(struct kvm_vcpu
*vcpu
,
5637 struct kvm_device_attr
*attr
)
5639 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5643 return PTR_ERR(uaddr
);
5645 switch (attr
->attr
) {
5646 case KVM_VCPU_TSC_OFFSET
:
5648 if (put_user(vcpu
->arch
.l1_tsc_offset
, uaddr
))
5659 static int kvm_arch_tsc_set_attr(struct kvm_vcpu
*vcpu
,
5660 struct kvm_device_attr
*attr
)
5662 u64 __user
*uaddr
= kvm_get_attr_addr(attr
);
5663 struct kvm
*kvm
= vcpu
->kvm
;
5667 return PTR_ERR(uaddr
);
5669 switch (attr
->attr
) {
5670 case KVM_VCPU_TSC_OFFSET
: {
5671 u64 offset
, tsc
, ns
;
5672 unsigned long flags
;
5676 if (get_user(offset
, uaddr
))
5679 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
5681 matched
= (vcpu
->arch
.virtual_tsc_khz
&&
5682 kvm
->arch
.last_tsc_khz
== vcpu
->arch
.virtual_tsc_khz
&&
5683 kvm
->arch
.last_tsc_offset
== offset
);
5685 tsc
= kvm_scale_tsc(rdtsc(), vcpu
->arch
.l1_tsc_scaling_ratio
) + offset
;
5686 ns
= get_kvmclock_base_ns();
5688 kvm
->arch
.user_set_tsc
= true;
5689 __kvm_synchronize_tsc(vcpu
, offset
, tsc
, ns
, matched
);
5690 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
5702 static int kvm_vcpu_ioctl_device_attr(struct kvm_vcpu
*vcpu
,
5706 struct kvm_device_attr attr
;
5709 if (copy_from_user(&attr
, argp
, sizeof(attr
)))
5712 if (attr
.group
!= KVM_VCPU_TSC_CTRL
)
5716 case KVM_HAS_DEVICE_ATTR
:
5717 r
= kvm_arch_tsc_has_attr(vcpu
, &attr
);
5719 case KVM_GET_DEVICE_ATTR
:
5720 r
= kvm_arch_tsc_get_attr(vcpu
, &attr
);
5722 case KVM_SET_DEVICE_ATTR
:
5723 r
= kvm_arch_tsc_set_attr(vcpu
, &attr
);
5730 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
5731 struct kvm_enable_cap
*cap
)
5737 #ifdef CONFIG_KVM_HYPERV
5738 case KVM_CAP_HYPERV_SYNIC2
:
5743 case KVM_CAP_HYPERV_SYNIC
:
5744 if (!irqchip_in_kernel(vcpu
->kvm
))
5746 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
5747 KVM_CAP_HYPERV_SYNIC2
);
5748 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
5751 uint16_t vmcs_version
;
5752 void __user
*user_ptr
;
5754 if (!kvm_x86_ops
.nested_ops
->enable_evmcs
)
5756 r
= kvm_x86_ops
.nested_ops
->enable_evmcs(vcpu
, &vmcs_version
);
5758 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
5759 if (copy_to_user(user_ptr
, &vmcs_version
,
5760 sizeof(vmcs_version
)))
5765 case KVM_CAP_HYPERV_DIRECT_TLBFLUSH
:
5766 if (!kvm_x86_ops
.enable_l2_tlb_flush
)
5769 return static_call(kvm_x86_enable_l2_tlb_flush
)(vcpu
);
5771 case KVM_CAP_HYPERV_ENFORCE_CPUID
:
5772 return kvm_hv_set_enforce_cpuid(vcpu
, cap
->args
[0]);
5775 case KVM_CAP_ENFORCE_PV_FEATURE_CPUID
:
5776 vcpu
->arch
.pv_cpuid
.enforce
= cap
->args
[0];
5777 if (vcpu
->arch
.pv_cpuid
.enforce
)
5778 kvm_update_pv_runtime(vcpu
);
5786 long kvm_arch_vcpu_ioctl(struct file
*filp
,
5787 unsigned int ioctl
, unsigned long arg
)
5789 struct kvm_vcpu
*vcpu
= filp
->private_data
;
5790 void __user
*argp
= (void __user
*)arg
;
5793 struct kvm_sregs2
*sregs2
;
5794 struct kvm_lapic_state
*lapic
;
5795 struct kvm_xsave
*xsave
;
5796 struct kvm_xcrs
*xcrs
;
5804 case KVM_GET_LAPIC
: {
5806 if (!lapic_in_kernel(vcpu
))
5808 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
5809 GFP_KERNEL_ACCOUNT
);
5814 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
5818 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
5823 case KVM_SET_LAPIC
: {
5825 if (!lapic_in_kernel(vcpu
))
5827 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
5828 if (IS_ERR(u
.lapic
)) {
5829 r
= PTR_ERR(u
.lapic
);
5833 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
5836 case KVM_INTERRUPT
: {
5837 struct kvm_interrupt irq
;
5840 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
5842 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
5846 r
= kvm_vcpu_ioctl_nmi(vcpu
);
5850 r
= kvm_inject_smi(vcpu
);
5853 case KVM_SET_CPUID
: {
5854 struct kvm_cpuid __user
*cpuid_arg
= argp
;
5855 struct kvm_cpuid cpuid
;
5858 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5860 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
5863 case KVM_SET_CPUID2
: {
5864 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5865 struct kvm_cpuid2 cpuid
;
5868 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5870 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
5871 cpuid_arg
->entries
);
5874 case KVM_GET_CPUID2
: {
5875 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
5876 struct kvm_cpuid2 cpuid
;
5879 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
5881 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
5882 cpuid_arg
->entries
);
5886 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
5891 case KVM_GET_MSRS
: {
5892 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5893 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
5894 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5897 case KVM_SET_MSRS
: {
5898 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5899 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
5900 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5903 case KVM_TPR_ACCESS_REPORTING
: {
5904 struct kvm_tpr_access_ctl tac
;
5907 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
5909 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
5913 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
5918 case KVM_SET_VAPIC_ADDR
: {
5919 struct kvm_vapic_addr va
;
5923 if (!lapic_in_kernel(vcpu
))
5926 if (copy_from_user(&va
, argp
, sizeof(va
)))
5928 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
5929 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
5930 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
5933 case KVM_X86_SETUP_MCE
: {
5937 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
5939 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
5942 case KVM_X86_SET_MCE
: {
5943 struct kvm_x86_mce mce
;
5946 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
5948 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
5951 case KVM_GET_VCPU_EVENTS
: {
5952 struct kvm_vcpu_events events
;
5954 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
5957 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
5962 case KVM_SET_VCPU_EVENTS
: {
5963 struct kvm_vcpu_events events
;
5966 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
5969 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
5972 case KVM_GET_DEBUGREGS
: {
5973 struct kvm_debugregs dbgregs
;
5975 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
5978 if (copy_to_user(argp
, &dbgregs
,
5979 sizeof(struct kvm_debugregs
)))
5984 case KVM_SET_DEBUGREGS
: {
5985 struct kvm_debugregs dbgregs
;
5988 if (copy_from_user(&dbgregs
, argp
,
5989 sizeof(struct kvm_debugregs
)))
5992 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
5995 case KVM_GET_XSAVE
: {
5997 if (vcpu
->arch
.guest_fpu
.uabi_size
> sizeof(struct kvm_xsave
))
6000 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
6005 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
6008 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
6013 case KVM_SET_XSAVE
: {
6014 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
6016 u
.xsave
= memdup_user(argp
, size
);
6017 if (IS_ERR(u
.xsave
)) {
6018 r
= PTR_ERR(u
.xsave
);
6022 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
6026 case KVM_GET_XSAVE2
: {
6027 int size
= vcpu
->arch
.guest_fpu
.uabi_size
;
6029 u
.xsave
= kzalloc(size
, GFP_KERNEL_ACCOUNT
);
6034 kvm_vcpu_ioctl_x86_get_xsave2(vcpu
, u
.buffer
, size
);
6037 if (copy_to_user(argp
, u
.xsave
, size
))
6044 case KVM_GET_XCRS
: {
6045 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
6050 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
6053 if (copy_to_user(argp
, u
.xcrs
,
6054 sizeof(struct kvm_xcrs
)))
6059 case KVM_SET_XCRS
: {
6060 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
6061 if (IS_ERR(u
.xcrs
)) {
6062 r
= PTR_ERR(u
.xcrs
);
6066 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
6069 case KVM_SET_TSC_KHZ
: {
6073 user_tsc_khz
= (u32
)arg
;
6075 if (kvm_caps
.has_tsc_control
&&
6076 user_tsc_khz
>= kvm_caps
.max_guest_tsc_khz
)
6079 if (user_tsc_khz
== 0)
6080 user_tsc_khz
= tsc_khz
;
6082 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
6087 case KVM_GET_TSC_KHZ
: {
6088 r
= vcpu
->arch
.virtual_tsc_khz
;
6091 case KVM_KVMCLOCK_CTRL
: {
6092 r
= kvm_set_guest_paused(vcpu
);
6095 case KVM_ENABLE_CAP
: {
6096 struct kvm_enable_cap cap
;
6099 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
6101 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
6104 case KVM_GET_NESTED_STATE
: {
6105 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
6109 if (!kvm_x86_ops
.nested_ops
->get_state
)
6112 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
6114 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
6117 r
= kvm_x86_ops
.nested_ops
->get_state(vcpu
, user_kvm_nested_state
,
6122 if (r
> user_data_size
) {
6123 if (put_user(r
, &user_kvm_nested_state
->size
))
6133 case KVM_SET_NESTED_STATE
: {
6134 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
6135 struct kvm_nested_state kvm_state
;
6139 if (!kvm_x86_ops
.nested_ops
->set_state
)
6143 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
6147 if (kvm_state
.size
< sizeof(kvm_state
))
6150 if (kvm_state
.flags
&
6151 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
6152 | KVM_STATE_NESTED_EVMCS
| KVM_STATE_NESTED_MTF_PENDING
6153 | KVM_STATE_NESTED_GIF_SET
))
6156 /* nested_run_pending implies guest_mode. */
6157 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
6158 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
6161 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6162 r
= kvm_x86_ops
.nested_ops
->set_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
6163 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
6166 #ifdef CONFIG_KVM_HYPERV
6167 case KVM_GET_SUPPORTED_HV_CPUID
:
6168 r
= kvm_ioctl_get_supported_hv_cpuid(vcpu
, argp
);
6171 #ifdef CONFIG_KVM_XEN
6172 case KVM_XEN_VCPU_GET_ATTR
: {
6173 struct kvm_xen_vcpu_attr xva
;
6176 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
6178 r
= kvm_xen_vcpu_get_attr(vcpu
, &xva
);
6179 if (!r
&& copy_to_user(argp
, &xva
, sizeof(xva
)))
6183 case KVM_XEN_VCPU_SET_ATTR
: {
6184 struct kvm_xen_vcpu_attr xva
;
6187 if (copy_from_user(&xva
, argp
, sizeof(xva
)))
6189 r
= kvm_xen_vcpu_set_attr(vcpu
, &xva
);
6193 case KVM_GET_SREGS2
: {
6194 u
.sregs2
= kzalloc(sizeof(struct kvm_sregs2
), GFP_KERNEL
);
6198 __get_sregs2(vcpu
, u
.sregs2
);
6200 if (copy_to_user(argp
, u
.sregs2
, sizeof(struct kvm_sregs2
)))
6205 case KVM_SET_SREGS2
: {
6206 u
.sregs2
= memdup_user(argp
, sizeof(struct kvm_sregs2
));
6207 if (IS_ERR(u
.sregs2
)) {
6208 r
= PTR_ERR(u
.sregs2
);
6212 r
= __set_sregs2(vcpu
, u
.sregs2
);
6215 case KVM_HAS_DEVICE_ATTR
:
6216 case KVM_GET_DEVICE_ATTR
:
6217 case KVM_SET_DEVICE_ATTR
:
6218 r
= kvm_vcpu_ioctl_device_attr(vcpu
, ioctl
, argp
);
6230 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
6232 return VM_FAULT_SIGBUS
;
6235 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
6239 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
6241 ret
= static_call(kvm_x86_set_tss_addr
)(kvm
, addr
);
6245 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
6248 return static_call(kvm_x86_set_identity_map_addr
)(kvm
, ident_addr
);
6251 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
6252 unsigned long kvm_nr_mmu_pages
)
6254 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
6257 mutex_lock(&kvm
->slots_lock
);
6259 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
6260 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
6262 mutex_unlock(&kvm
->slots_lock
);
6266 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
6268 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
6272 switch (chip
->chip_id
) {
6273 case KVM_IRQCHIP_PIC_MASTER
:
6274 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
6275 sizeof(struct kvm_pic_state
));
6277 case KVM_IRQCHIP_PIC_SLAVE
:
6278 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
6279 sizeof(struct kvm_pic_state
));
6281 case KVM_IRQCHIP_IOAPIC
:
6282 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
6291 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
6293 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
6297 switch (chip
->chip_id
) {
6298 case KVM_IRQCHIP_PIC_MASTER
:
6299 spin_lock(&pic
->lock
);
6300 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
6301 sizeof(struct kvm_pic_state
));
6302 spin_unlock(&pic
->lock
);
6304 case KVM_IRQCHIP_PIC_SLAVE
:
6305 spin_lock(&pic
->lock
);
6306 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
6307 sizeof(struct kvm_pic_state
));
6308 spin_unlock(&pic
->lock
);
6310 case KVM_IRQCHIP_IOAPIC
:
6311 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
6317 kvm_pic_update_irq(pic
);
6321 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
6323 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
6325 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
6327 mutex_lock(&kps
->lock
);
6328 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
6329 mutex_unlock(&kps
->lock
);
6333 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
6336 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6338 mutex_lock(&pit
->pit_state
.lock
);
6339 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
6340 for (i
= 0; i
< 3; i
++)
6341 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
6342 mutex_unlock(&pit
->pit_state
.lock
);
6346 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
6348 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
6349 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
6350 sizeof(ps
->channels
));
6351 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
6352 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
6353 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
6357 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
6361 u32 prev_legacy
, cur_legacy
;
6362 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6364 mutex_lock(&pit
->pit_state
.lock
);
6365 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
6366 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
6367 if (!prev_legacy
&& cur_legacy
)
6369 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
6370 sizeof(pit
->pit_state
.channels
));
6371 pit
->pit_state
.flags
= ps
->flags
;
6372 for (i
= 0; i
< 3; i
++)
6373 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
6375 mutex_unlock(&pit
->pit_state
.lock
);
6379 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
6380 struct kvm_reinject_control
*control
)
6382 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
6384 /* pit->pit_state.lock was overloaded to prevent userspace from getting
6385 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
6386 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
6388 mutex_lock(&pit
->pit_state
.lock
);
6389 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
6390 mutex_unlock(&pit
->pit_state
.lock
);
6395 void kvm_arch_sync_dirty_log(struct kvm
*kvm
, struct kvm_memory_slot
*memslot
)
6399 * Flush all CPUs' dirty log buffers to the dirty_bitmap. Called
6400 * before reporting dirty_bitmap to userspace. KVM flushes the buffers
6401 * on all VM-Exits, thus we only need to kick running vCPUs to force a
6404 struct kvm_vcpu
*vcpu
;
6407 if (!kvm_x86_ops
.cpu_dirty_log_size
)
6410 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6411 kvm_vcpu_kick(vcpu
);
6414 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
6417 if (!irqchip_in_kernel(kvm
))
6420 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
6421 irq_event
->irq
, irq_event
->level
,
6426 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
6427 struct kvm_enable_cap
*cap
)
6435 case KVM_CAP_DISABLE_QUIRKS2
:
6437 if (cap
->args
[0] & ~KVM_X86_VALID_QUIRKS
)
6440 case KVM_CAP_DISABLE_QUIRKS
:
6441 kvm
->arch
.disabled_quirks
= cap
->args
[0];
6444 case KVM_CAP_SPLIT_IRQCHIP
: {
6445 mutex_lock(&kvm
->lock
);
6447 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
6448 goto split_irqchip_unlock
;
6450 if (irqchip_in_kernel(kvm
))
6451 goto split_irqchip_unlock
;
6452 if (kvm
->created_vcpus
)
6453 goto split_irqchip_unlock
;
6454 r
= kvm_setup_empty_irq_routing(kvm
);
6456 goto split_irqchip_unlock
;
6457 /* Pairs with irqchip_in_kernel. */
6459 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
6460 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
6461 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
6463 split_irqchip_unlock
:
6464 mutex_unlock(&kvm
->lock
);
6467 case KVM_CAP_X2APIC_API
:
6469 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
6472 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
6473 kvm
->arch
.x2apic_format
= true;
6474 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
6475 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
6479 case KVM_CAP_X86_DISABLE_EXITS
:
6481 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
6484 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
6485 kvm
->arch
.pause_in_guest
= true;
6487 #define SMT_RSB_MSG "This processor is affected by the Cross-Thread Return Predictions vulnerability. " \
6488 "KVM_CAP_X86_DISABLE_EXITS should only be used with SMT disabled or trusted guests."
6490 if (!mitigate_smt_rsb
) {
6491 if (boot_cpu_has_bug(X86_BUG_SMT_RSB
) && cpu_smt_possible() &&
6492 (cap
->args
[0] & ~KVM_X86_DISABLE_EXITS_PAUSE
))
6493 pr_warn_once(SMT_RSB_MSG
);
6495 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
6496 kvm_can_mwait_in_guest())
6497 kvm
->arch
.mwait_in_guest
= true;
6498 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
6499 kvm
->arch
.hlt_in_guest
= true;
6500 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_CSTATE
)
6501 kvm
->arch
.cstate_in_guest
= true;
6506 case KVM_CAP_MSR_PLATFORM_INFO
:
6507 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
6510 case KVM_CAP_EXCEPTION_PAYLOAD
:
6511 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
6514 case KVM_CAP_X86_TRIPLE_FAULT_EVENT
:
6515 kvm
->arch
.triple_fault_event
= cap
->args
[0];
6518 case KVM_CAP_X86_USER_SPACE_MSR
:
6520 if (cap
->args
[0] & ~KVM_MSR_EXIT_REASON_VALID_MASK
)
6522 kvm
->arch
.user_space_msr_mask
= cap
->args
[0];
6525 case KVM_CAP_X86_BUS_LOCK_EXIT
:
6527 if (cap
->args
[0] & ~KVM_BUS_LOCK_DETECTION_VALID_MODE
)
6530 if ((cap
->args
[0] & KVM_BUS_LOCK_DETECTION_OFF
) &&
6531 (cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
))
6534 if (kvm_caps
.has_bus_lock_exit
&&
6535 cap
->args
[0] & KVM_BUS_LOCK_DETECTION_EXIT
)
6536 kvm
->arch
.bus_lock_detection_enabled
= true;
6539 #ifdef CONFIG_X86_SGX_KVM
6540 case KVM_CAP_SGX_ATTRIBUTE
: {
6541 unsigned long allowed_attributes
= 0;
6543 r
= sgx_set_attribute(&allowed_attributes
, cap
->args
[0]);
6547 /* KVM only supports the PROVISIONKEY privileged attribute. */
6548 if ((allowed_attributes
& SGX_ATTR_PROVISIONKEY
) &&
6549 !(allowed_attributes
& ~SGX_ATTR_PROVISIONKEY
))
6550 kvm
->arch
.sgx_provisioning_allowed
= true;
6556 case KVM_CAP_VM_COPY_ENC_CONTEXT_FROM
:
6558 if (!kvm_x86_ops
.vm_copy_enc_context_from
)
6561 r
= static_call(kvm_x86_vm_copy_enc_context_from
)(kvm
, cap
->args
[0]);
6563 case KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM
:
6565 if (!kvm_x86_ops
.vm_move_enc_context_from
)
6568 r
= static_call(kvm_x86_vm_move_enc_context_from
)(kvm
, cap
->args
[0]);
6570 case KVM_CAP_EXIT_HYPERCALL
:
6571 if (cap
->args
[0] & ~KVM_EXIT_HYPERCALL_VALID_MASK
) {
6575 kvm
->arch
.hypercall_exit_enabled
= cap
->args
[0];
6578 case KVM_CAP_EXIT_ON_EMULATION_FAILURE
:
6580 if (cap
->args
[0] & ~1)
6582 kvm
->arch
.exit_on_emulation_error
= cap
->args
[0];
6585 case KVM_CAP_PMU_CAPABILITY
:
6587 if (!enable_pmu
|| (cap
->args
[0] & ~KVM_CAP_PMU_VALID_MASK
))
6590 mutex_lock(&kvm
->lock
);
6591 if (!kvm
->created_vcpus
) {
6592 kvm
->arch
.enable_pmu
= !(cap
->args
[0] & KVM_PMU_CAP_DISABLE
);
6595 mutex_unlock(&kvm
->lock
);
6597 case KVM_CAP_MAX_VCPU_ID
:
6599 if (cap
->args
[0] > KVM_MAX_VCPU_IDS
)
6602 mutex_lock(&kvm
->lock
);
6603 if (kvm
->arch
.max_vcpu_ids
== cap
->args
[0]) {
6605 } else if (!kvm
->arch
.max_vcpu_ids
) {
6606 kvm
->arch
.max_vcpu_ids
= cap
->args
[0];
6609 mutex_unlock(&kvm
->lock
);
6611 case KVM_CAP_X86_NOTIFY_VMEXIT
:
6613 if ((u32
)cap
->args
[0] & ~KVM_X86_NOTIFY_VMEXIT_VALID_BITS
)
6615 if (!kvm_caps
.has_notify_vmexit
)
6617 if (!((u32
)cap
->args
[0] & KVM_X86_NOTIFY_VMEXIT_ENABLED
))
6619 mutex_lock(&kvm
->lock
);
6620 if (!kvm
->created_vcpus
) {
6621 kvm
->arch
.notify_window
= cap
->args
[0] >> 32;
6622 kvm
->arch
.notify_vmexit_flags
= (u32
)cap
->args
[0];
6625 mutex_unlock(&kvm
->lock
);
6627 case KVM_CAP_VM_DISABLE_NX_HUGE_PAGES
:
6631 * Since the risk of disabling NX hugepages is a guest crashing
6632 * the system, ensure the userspace process has permission to
6633 * reboot the system.
6635 * Note that unlike the reboot() syscall, the process must have
6636 * this capability in the root namespace because exposing
6637 * /dev/kvm into a container does not limit the scope of the
6638 * iTLB multihit bug to that container. In other words,
6639 * this must use capable(), not ns_capable().
6641 if (!capable(CAP_SYS_BOOT
)) {
6649 mutex_lock(&kvm
->lock
);
6650 if (!kvm
->created_vcpus
) {
6651 kvm
->arch
.disable_nx_huge_pages
= true;
6654 mutex_unlock(&kvm
->lock
);
6663 static struct kvm_x86_msr_filter
*kvm_alloc_msr_filter(bool default_allow
)
6665 struct kvm_x86_msr_filter
*msr_filter
;
6667 msr_filter
= kzalloc(sizeof(*msr_filter
), GFP_KERNEL_ACCOUNT
);
6671 msr_filter
->default_allow
= default_allow
;
6675 static void kvm_free_msr_filter(struct kvm_x86_msr_filter
*msr_filter
)
6682 for (i
= 0; i
< msr_filter
->count
; i
++)
6683 kfree(msr_filter
->ranges
[i
].bitmap
);
6688 static int kvm_add_msr_filter(struct kvm_x86_msr_filter
*msr_filter
,
6689 struct kvm_msr_filter_range
*user_range
)
6691 unsigned long *bitmap
;
6694 if (!user_range
->nmsrs
)
6697 if (user_range
->flags
& ~KVM_MSR_FILTER_RANGE_VALID_MASK
)
6700 if (!user_range
->flags
)
6703 bitmap_size
= BITS_TO_LONGS(user_range
->nmsrs
) * sizeof(long);
6704 if (!bitmap_size
|| bitmap_size
> KVM_MSR_FILTER_MAX_BITMAP_SIZE
)
6707 bitmap
= memdup_user((__user u8
*)user_range
->bitmap
, bitmap_size
);
6709 return PTR_ERR(bitmap
);
6711 msr_filter
->ranges
[msr_filter
->count
] = (struct msr_bitmap_range
) {
6712 .flags
= user_range
->flags
,
6713 .base
= user_range
->base
,
6714 .nmsrs
= user_range
->nmsrs
,
6718 msr_filter
->count
++;
6722 static int kvm_vm_ioctl_set_msr_filter(struct kvm
*kvm
,
6723 struct kvm_msr_filter
*filter
)
6725 struct kvm_x86_msr_filter
*new_filter
, *old_filter
;
6731 if (filter
->flags
& ~KVM_MSR_FILTER_VALID_MASK
)
6734 for (i
= 0; i
< ARRAY_SIZE(filter
->ranges
); i
++)
6735 empty
&= !filter
->ranges
[i
].nmsrs
;
6737 default_allow
= !(filter
->flags
& KVM_MSR_FILTER_DEFAULT_DENY
);
6738 if (empty
&& !default_allow
)
6741 new_filter
= kvm_alloc_msr_filter(default_allow
);
6745 for (i
= 0; i
< ARRAY_SIZE(filter
->ranges
); i
++) {
6746 r
= kvm_add_msr_filter(new_filter
, &filter
->ranges
[i
]);
6748 kvm_free_msr_filter(new_filter
);
6753 mutex_lock(&kvm
->lock
);
6754 old_filter
= rcu_replace_pointer(kvm
->arch
.msr_filter
, new_filter
,
6755 mutex_is_locked(&kvm
->lock
));
6756 mutex_unlock(&kvm
->lock
);
6757 synchronize_srcu(&kvm
->srcu
);
6759 kvm_free_msr_filter(old_filter
);
6761 kvm_make_all_cpus_request(kvm
, KVM_REQ_MSR_FILTER_CHANGED
);
6766 #ifdef CONFIG_KVM_COMPAT
6767 /* for KVM_X86_SET_MSR_FILTER */
6768 struct kvm_msr_filter_range_compat
{
6775 struct kvm_msr_filter_compat
{
6777 struct kvm_msr_filter_range_compat ranges
[KVM_MSR_FILTER_MAX_RANGES
];
6780 #define KVM_X86_SET_MSR_FILTER_COMPAT _IOW(KVMIO, 0xc6, struct kvm_msr_filter_compat)
6782 long kvm_arch_vm_compat_ioctl(struct file
*filp
, unsigned int ioctl
,
6785 void __user
*argp
= (void __user
*)arg
;
6786 struct kvm
*kvm
= filp
->private_data
;
6790 case KVM_X86_SET_MSR_FILTER_COMPAT
: {
6791 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
6792 struct kvm_msr_filter_compat filter_compat
;
6793 struct kvm_msr_filter filter
;
6796 if (copy_from_user(&filter_compat
, user_msr_filter
,
6797 sizeof(filter_compat
)))
6800 filter
.flags
= filter_compat
.flags
;
6801 for (i
= 0; i
< ARRAY_SIZE(filter
.ranges
); i
++) {
6802 struct kvm_msr_filter_range_compat
*cr
;
6804 cr
= &filter_compat
.ranges
[i
];
6805 filter
.ranges
[i
] = (struct kvm_msr_filter_range
) {
6809 .bitmap
= (__u8
*)(ulong
)cr
->bitmap
,
6813 r
= kvm_vm_ioctl_set_msr_filter(kvm
, &filter
);
6822 #ifdef CONFIG_HAVE_KVM_PM_NOTIFIER
6823 static int kvm_arch_suspend_notifier(struct kvm
*kvm
)
6825 struct kvm_vcpu
*vcpu
;
6829 mutex_lock(&kvm
->lock
);
6830 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6831 if (!vcpu
->arch
.pv_time
.active
)
6834 ret
= kvm_set_guest_paused(vcpu
);
6836 kvm_err("Failed to pause guest VCPU%d: %d\n",
6837 vcpu
->vcpu_id
, ret
);
6841 mutex_unlock(&kvm
->lock
);
6843 return ret
? NOTIFY_BAD
: NOTIFY_DONE
;
6846 int kvm_arch_pm_notifier(struct kvm
*kvm
, unsigned long state
)
6849 case PM_HIBERNATION_PREPARE
:
6850 case PM_SUSPEND_PREPARE
:
6851 return kvm_arch_suspend_notifier(kvm
);
6856 #endif /* CONFIG_HAVE_KVM_PM_NOTIFIER */
6858 static int kvm_vm_ioctl_get_clock(struct kvm
*kvm
, void __user
*argp
)
6860 struct kvm_clock_data data
= { 0 };
6862 get_kvmclock(kvm
, &data
);
6863 if (copy_to_user(argp
, &data
, sizeof(data
)))
6869 static int kvm_vm_ioctl_set_clock(struct kvm
*kvm
, void __user
*argp
)
6871 struct kvm_arch
*ka
= &kvm
->arch
;
6872 struct kvm_clock_data data
;
6875 if (copy_from_user(&data
, argp
, sizeof(data
)))
6879 * Only KVM_CLOCK_REALTIME is used, but allow passing the
6880 * result of KVM_GET_CLOCK back to KVM_SET_CLOCK.
6882 if (data
.flags
& ~KVM_CLOCK_VALID_FLAGS
)
6885 kvm_hv_request_tsc_page_update(kvm
);
6886 kvm_start_pvclock_update(kvm
);
6887 pvclock_update_vm_gtod_copy(kvm
);
6890 * This pairs with kvm_guest_time_update(): when masterclock is
6891 * in use, we use master_kernel_ns + kvmclock_offset to set
6892 * unsigned 'system_time' so if we use get_kvmclock_ns() (which
6893 * is slightly ahead) here we risk going negative on unsigned
6894 * 'system_time' when 'data.clock' is very small.
6896 if (data
.flags
& KVM_CLOCK_REALTIME
) {
6897 u64 now_real_ns
= ktime_get_real_ns();
6900 * Avoid stepping the kvmclock backwards.
6902 if (now_real_ns
> data
.realtime
)
6903 data
.clock
+= now_real_ns
- data
.realtime
;
6906 if (ka
->use_master_clock
)
6907 now_raw_ns
= ka
->master_kernel_ns
;
6909 now_raw_ns
= get_kvmclock_base_ns();
6910 ka
->kvmclock_offset
= data
.clock
- now_raw_ns
;
6911 kvm_end_pvclock_update(kvm
);
6915 int kvm_arch_vm_ioctl(struct file
*filp
, unsigned int ioctl
, unsigned long arg
)
6917 struct kvm
*kvm
= filp
->private_data
;
6918 void __user
*argp
= (void __user
*)arg
;
6921 * This union makes it completely explicit to gcc-3.x
6922 * that these two variables' stack usage should be
6923 * combined, not added together.
6926 struct kvm_pit_state ps
;
6927 struct kvm_pit_state2 ps2
;
6928 struct kvm_pit_config pit_config
;
6932 case KVM_SET_TSS_ADDR
:
6933 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
6935 case KVM_SET_IDENTITY_MAP_ADDR
: {
6938 mutex_lock(&kvm
->lock
);
6940 if (kvm
->created_vcpus
)
6941 goto set_identity_unlock
;
6943 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
6944 goto set_identity_unlock
;
6945 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
6946 set_identity_unlock
:
6947 mutex_unlock(&kvm
->lock
);
6950 case KVM_SET_NR_MMU_PAGES
:
6951 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
6953 case KVM_CREATE_IRQCHIP
: {
6954 mutex_lock(&kvm
->lock
);
6957 if (irqchip_in_kernel(kvm
))
6958 goto create_irqchip_unlock
;
6961 if (kvm
->created_vcpus
)
6962 goto create_irqchip_unlock
;
6964 r
= kvm_pic_init(kvm
);
6966 goto create_irqchip_unlock
;
6968 r
= kvm_ioapic_init(kvm
);
6970 kvm_pic_destroy(kvm
);
6971 goto create_irqchip_unlock
;
6974 r
= kvm_setup_default_irq_routing(kvm
);
6976 kvm_ioapic_destroy(kvm
);
6977 kvm_pic_destroy(kvm
);
6978 goto create_irqchip_unlock
;
6980 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
6982 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
6983 kvm_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_ABSENT
);
6984 create_irqchip_unlock
:
6985 mutex_unlock(&kvm
->lock
);
6988 case KVM_CREATE_PIT
:
6989 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
6991 case KVM_CREATE_PIT2
:
6993 if (copy_from_user(&u
.pit_config
, argp
,
6994 sizeof(struct kvm_pit_config
)))
6997 mutex_lock(&kvm
->lock
);
7000 goto create_pit_unlock
;
7002 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
7006 mutex_unlock(&kvm
->lock
);
7008 case KVM_GET_IRQCHIP
: {
7009 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
7010 struct kvm_irqchip
*chip
;
7012 chip
= memdup_user(argp
, sizeof(*chip
));
7019 if (!irqchip_kernel(kvm
))
7020 goto get_irqchip_out
;
7021 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
7023 goto get_irqchip_out
;
7025 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
7026 goto get_irqchip_out
;
7032 case KVM_SET_IRQCHIP
: {
7033 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
7034 struct kvm_irqchip
*chip
;
7036 chip
= memdup_user(argp
, sizeof(*chip
));
7043 if (!irqchip_kernel(kvm
))
7044 goto set_irqchip_out
;
7045 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
7052 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
7055 if (!kvm
->arch
.vpit
)
7057 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
7061 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
7068 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
7070 mutex_lock(&kvm
->lock
);
7072 if (!kvm
->arch
.vpit
)
7074 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
7076 mutex_unlock(&kvm
->lock
);
7079 case KVM_GET_PIT2
: {
7081 if (!kvm
->arch
.vpit
)
7083 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
7087 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
7092 case KVM_SET_PIT2
: {
7094 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
7096 mutex_lock(&kvm
->lock
);
7098 if (!kvm
->arch
.vpit
)
7100 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
7102 mutex_unlock(&kvm
->lock
);
7105 case KVM_REINJECT_CONTROL
: {
7106 struct kvm_reinject_control control
;
7108 if (copy_from_user(&control
, argp
, sizeof(control
)))
7111 if (!kvm
->arch
.vpit
)
7113 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
7116 case KVM_SET_BOOT_CPU_ID
:
7118 mutex_lock(&kvm
->lock
);
7119 if (kvm
->created_vcpus
)
7122 kvm
->arch
.bsp_vcpu_id
= arg
;
7123 mutex_unlock(&kvm
->lock
);
7125 #ifdef CONFIG_KVM_XEN
7126 case KVM_XEN_HVM_CONFIG
: {
7127 struct kvm_xen_hvm_config xhc
;
7129 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
7131 r
= kvm_xen_hvm_config(kvm
, &xhc
);
7134 case KVM_XEN_HVM_GET_ATTR
: {
7135 struct kvm_xen_hvm_attr xha
;
7138 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
7140 r
= kvm_xen_hvm_get_attr(kvm
, &xha
);
7141 if (!r
&& copy_to_user(argp
, &xha
, sizeof(xha
)))
7145 case KVM_XEN_HVM_SET_ATTR
: {
7146 struct kvm_xen_hvm_attr xha
;
7149 if (copy_from_user(&xha
, argp
, sizeof(xha
)))
7151 r
= kvm_xen_hvm_set_attr(kvm
, &xha
);
7154 case KVM_XEN_HVM_EVTCHN_SEND
: {
7155 struct kvm_irq_routing_xen_evtchn uxe
;
7158 if (copy_from_user(&uxe
, argp
, sizeof(uxe
)))
7160 r
= kvm_xen_hvm_evtchn_send(kvm
, &uxe
);
7165 r
= kvm_vm_ioctl_set_clock(kvm
, argp
);
7168 r
= kvm_vm_ioctl_get_clock(kvm
, argp
);
7170 case KVM_SET_TSC_KHZ
: {
7174 user_tsc_khz
= (u32
)arg
;
7176 if (kvm_caps
.has_tsc_control
&&
7177 user_tsc_khz
>= kvm_caps
.max_guest_tsc_khz
)
7180 if (user_tsc_khz
== 0)
7181 user_tsc_khz
= tsc_khz
;
7183 WRITE_ONCE(kvm
->arch
.default_tsc_khz
, user_tsc_khz
);
7188 case KVM_GET_TSC_KHZ
: {
7189 r
= READ_ONCE(kvm
->arch
.default_tsc_khz
);
7192 case KVM_MEMORY_ENCRYPT_OP
: {
7194 if (!kvm_x86_ops
.mem_enc_ioctl
)
7197 r
= static_call(kvm_x86_mem_enc_ioctl
)(kvm
, argp
);
7200 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
7201 struct kvm_enc_region region
;
7204 if (copy_from_user(®ion
, argp
, sizeof(region
)))
7208 if (!kvm_x86_ops
.mem_enc_register_region
)
7211 r
= static_call(kvm_x86_mem_enc_register_region
)(kvm
, ®ion
);
7214 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
7215 struct kvm_enc_region region
;
7218 if (copy_from_user(®ion
, argp
, sizeof(region
)))
7222 if (!kvm_x86_ops
.mem_enc_unregister_region
)
7225 r
= static_call(kvm_x86_mem_enc_unregister_region
)(kvm
, ®ion
);
7228 #ifdef CONFIG_KVM_HYPERV
7229 case KVM_HYPERV_EVENTFD
: {
7230 struct kvm_hyperv_eventfd hvevfd
;
7233 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
7235 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
7239 case KVM_SET_PMU_EVENT_FILTER
:
7240 r
= kvm_vm_ioctl_set_pmu_event_filter(kvm
, argp
);
7242 case KVM_X86_SET_MSR_FILTER
: {
7243 struct kvm_msr_filter __user
*user_msr_filter
= argp
;
7244 struct kvm_msr_filter filter
;
7246 if (copy_from_user(&filter
, user_msr_filter
, sizeof(filter
)))
7249 r
= kvm_vm_ioctl_set_msr_filter(kvm
, &filter
);
7259 static void kvm_probe_feature_msr(u32 msr_index
)
7261 struct kvm_msr_entry msr
= {
7265 if (kvm_get_msr_feature(&msr
))
7268 msr_based_features
[num_msr_based_features
++] = msr_index
;
7271 static void kvm_probe_msr_to_save(u32 msr_index
)
7275 if (rdmsr_safe(msr_index
, &dummy
[0], &dummy
[1]))
7279 * Even MSRs that are valid in the host may not be exposed to guests in
7282 switch (msr_index
) {
7283 case MSR_IA32_BNDCFGS
:
7284 if (!kvm_mpx_supported())
7288 if (!kvm_cpu_cap_has(X86_FEATURE_RDTSCP
) &&
7289 !kvm_cpu_cap_has(X86_FEATURE_RDPID
))
7292 case MSR_IA32_UMWAIT_CONTROL
:
7293 if (!kvm_cpu_cap_has(X86_FEATURE_WAITPKG
))
7296 case MSR_IA32_RTIT_CTL
:
7297 case MSR_IA32_RTIT_STATUS
:
7298 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
))
7301 case MSR_IA32_RTIT_CR3_MATCH
:
7302 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7303 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
7306 case MSR_IA32_RTIT_OUTPUT_BASE
:
7307 case MSR_IA32_RTIT_OUTPUT_MASK
:
7308 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7309 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
7310 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
7313 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
:
7314 if (!kvm_cpu_cap_has(X86_FEATURE_INTEL_PT
) ||
7315 (msr_index
- MSR_IA32_RTIT_ADDR0_A
>=
7316 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2))
7319 case MSR_ARCH_PERFMON_PERFCTR0
... MSR_ARCH_PERFMON_PERFCTR_MAX
:
7320 if (msr_index
- MSR_ARCH_PERFMON_PERFCTR0
>=
7321 kvm_pmu_cap
.num_counters_gp
)
7324 case MSR_ARCH_PERFMON_EVENTSEL0
... MSR_ARCH_PERFMON_EVENTSEL_MAX
:
7325 if (msr_index
- MSR_ARCH_PERFMON_EVENTSEL0
>=
7326 kvm_pmu_cap
.num_counters_gp
)
7329 case MSR_ARCH_PERFMON_FIXED_CTR0
... MSR_ARCH_PERFMON_FIXED_CTR_MAX
:
7330 if (msr_index
- MSR_ARCH_PERFMON_FIXED_CTR0
>=
7331 kvm_pmu_cap
.num_counters_fixed
)
7334 case MSR_AMD64_PERF_CNTR_GLOBAL_CTL
:
7335 case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS
:
7336 case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR
:
7337 if (!kvm_cpu_cap_has(X86_FEATURE_PERFMON_V2
))
7341 case MSR_IA32_XFD_ERR
:
7342 if (!kvm_cpu_cap_has(X86_FEATURE_XFD
))
7345 case MSR_IA32_TSX_CTRL
:
7346 if (!(kvm_get_arch_capabilities() & ARCH_CAP_TSX_CTRL_MSR
))
7353 msrs_to_save
[num_msrs_to_save
++] = msr_index
;
7356 static void kvm_init_msr_lists(void)
7360 BUILD_BUG_ON_MSG(KVM_PMC_MAX_FIXED
!= 3,
7361 "Please update the fixed PMCs in msrs_to_save_pmu[]");
7363 num_msrs_to_save
= 0;
7364 num_emulated_msrs
= 0;
7365 num_msr_based_features
= 0;
7367 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_base
); i
++)
7368 kvm_probe_msr_to_save(msrs_to_save_base
[i
]);
7371 for (i
= 0; i
< ARRAY_SIZE(msrs_to_save_pmu
); i
++)
7372 kvm_probe_msr_to_save(msrs_to_save_pmu
[i
]);
7375 for (i
= 0; i
< ARRAY_SIZE(emulated_msrs_all
); i
++) {
7376 if (!static_call(kvm_x86_has_emulated_msr
)(NULL
, emulated_msrs_all
[i
]))
7379 emulated_msrs
[num_emulated_msrs
++] = emulated_msrs_all
[i
];
7382 for (i
= KVM_FIRST_EMULATED_VMX_MSR
; i
<= KVM_LAST_EMULATED_VMX_MSR
; i
++)
7383 kvm_probe_feature_msr(i
);
7385 for (i
= 0; i
< ARRAY_SIZE(msr_based_features_all_except_vmx
); i
++)
7386 kvm_probe_feature_msr(msr_based_features_all_except_vmx
[i
]);
7389 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
7397 if (!(lapic_in_kernel(vcpu
) &&
7398 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
7399 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
7410 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
7417 if (!(lapic_in_kernel(vcpu
) &&
7418 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
7420 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
7422 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
7432 void kvm_set_segment(struct kvm_vcpu
*vcpu
,
7433 struct kvm_segment
*var
, int seg
)
7435 static_call(kvm_x86_set_segment
)(vcpu
, var
, seg
);
7438 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
7439 struct kvm_segment
*var
, int seg
)
7441 static_call(kvm_x86_get_segment
)(vcpu
, var
, seg
);
7444 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u64 access
,
7445 struct x86_exception
*exception
)
7447 struct kvm_mmu
*mmu
= vcpu
->arch
.mmu
;
7450 BUG_ON(!mmu_is_nested(vcpu
));
7452 /* NPT walks are always user-walks */
7453 access
|= PFERR_USER_MASK
;
7454 t_gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gpa
, access
, exception
);
7459 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
7460 struct x86_exception
*exception
)
7462 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7464 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7465 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7467 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_read
);
7469 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
7470 struct x86_exception
*exception
)
7472 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7474 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7475 access
|= PFERR_WRITE_MASK
;
7476 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7478 EXPORT_SYMBOL_GPL(kvm_mmu_gva_to_gpa_write
);
7480 /* uses this to access any guest's mapped memory without checking CPL */
7481 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
7482 struct x86_exception
*exception
)
7484 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7486 return mmu
->gva_to_gpa(vcpu
, mmu
, gva
, 0, exception
);
7489 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
7490 struct kvm_vcpu
*vcpu
, u64 access
,
7491 struct x86_exception
*exception
)
7493 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7495 int r
= X86EMUL_CONTINUE
;
7498 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
7499 unsigned offset
= addr
& (PAGE_SIZE
-1);
7500 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
7503 if (gpa
== INVALID_GPA
)
7504 return X86EMUL_PROPAGATE_FAULT
;
7505 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
7508 r
= X86EMUL_IO_NEEDED
;
7520 /* used for instruction fetching */
7521 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
7522 gva_t addr
, void *val
, unsigned int bytes
,
7523 struct x86_exception
*exception
)
7525 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7526 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7527 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7531 /* Inline kvm_read_guest_virt_helper for speed. */
7532 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
|PFERR_FETCH_MASK
,
7534 if (unlikely(gpa
== INVALID_GPA
))
7535 return X86EMUL_PROPAGATE_FAULT
;
7537 offset
= addr
& (PAGE_SIZE
-1);
7538 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
7539 bytes
= (unsigned)PAGE_SIZE
- offset
;
7540 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
7542 if (unlikely(ret
< 0))
7543 return X86EMUL_IO_NEEDED
;
7545 return X86EMUL_CONTINUE
;
7548 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
7549 gva_t addr
, void *val
, unsigned int bytes
,
7550 struct x86_exception
*exception
)
7552 u64 access
= (static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
7555 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
7556 * is returned, but our callers are not ready for that and they blindly
7557 * call kvm_inject_page_fault. Ensure that they at least do not leak
7558 * uninitialized kernel stack memory into cr2 and error code.
7560 memset(exception
, 0, sizeof(*exception
));
7561 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
7564 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
7566 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
7567 gva_t addr
, void *val
, unsigned int bytes
,
7568 struct x86_exception
*exception
, bool system
)
7570 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7574 access
|= PFERR_IMPLICIT_ACCESS
;
7575 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
7576 access
|= PFERR_USER_MASK
;
7578 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
7581 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
7582 struct kvm_vcpu
*vcpu
, u64 access
,
7583 struct x86_exception
*exception
)
7585 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7587 int r
= X86EMUL_CONTINUE
;
7590 gpa_t gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, addr
, access
, exception
);
7591 unsigned offset
= addr
& (PAGE_SIZE
-1);
7592 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
7595 if (gpa
== INVALID_GPA
)
7596 return X86EMUL_PROPAGATE_FAULT
;
7597 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
7599 r
= X86EMUL_IO_NEEDED
;
7611 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
7612 unsigned int bytes
, struct x86_exception
*exception
,
7615 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7616 u64 access
= PFERR_WRITE_MASK
;
7619 access
|= PFERR_IMPLICIT_ACCESS
;
7620 else if (static_call(kvm_x86_get_cpl
)(vcpu
) == 3)
7621 access
|= PFERR_USER_MASK
;
7623 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7627 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
7628 unsigned int bytes
, struct x86_exception
*exception
)
7630 /* kvm_write_guest_virt_system can pull in tons of pages. */
7631 vcpu
->arch
.l1tf_flush_l1d
= true;
7633 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
7634 PFERR_WRITE_MASK
, exception
);
7636 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
7638 static int kvm_check_emulate_insn(struct kvm_vcpu
*vcpu
, int emul_type
,
7639 void *insn
, int insn_len
)
7641 return static_call(kvm_x86_check_emulate_instruction
)(vcpu
, emul_type
,
7645 int handle_ud(struct kvm_vcpu
*vcpu
)
7647 static const char kvm_emulate_prefix
[] = { __KVM_EMULATE_PREFIX
};
7648 int fep_flags
= READ_ONCE(force_emulation_prefix
);
7649 int emul_type
= EMULTYPE_TRAP_UD
;
7650 char sig
[5]; /* ud2; .ascii "kvm" */
7651 struct x86_exception e
;
7654 r
= kvm_check_emulate_insn(vcpu
, emul_type
, NULL
, 0);
7655 if (r
!= X86EMUL_CONTINUE
)
7659 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
7660 sig
, sizeof(sig
), &e
) == 0 &&
7661 memcmp(sig
, kvm_emulate_prefix
, sizeof(sig
)) == 0) {
7662 if (fep_flags
& KVM_FEP_CLEAR_RFLAGS_RF
)
7663 kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) & ~X86_EFLAGS_RF
);
7664 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
7665 emul_type
= EMULTYPE_TRAP_UD_FORCED
;
7668 return kvm_emulate_instruction(vcpu
, emul_type
);
7670 EXPORT_SYMBOL_GPL(handle_ud
);
7672 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7673 gpa_t gpa
, bool write
)
7675 /* For APIC access vmexit */
7676 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7679 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
7680 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
7687 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
7688 gpa_t
*gpa
, struct x86_exception
*exception
,
7691 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
7692 u64 access
= ((static_call(kvm_x86_get_cpl
)(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
7693 | (write
? PFERR_WRITE_MASK
: 0);
7696 * currently PKRU is only applied to ept enabled guest so
7697 * there is no pkey in EPT page table for L1 guest or EPT
7698 * shadow page table for L2 guest.
7700 if (vcpu_match_mmio_gva(vcpu
, gva
) && (!is_paging(vcpu
) ||
7701 !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
7702 vcpu
->arch
.mmio_access
, 0, access
))) {
7703 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
7704 (gva
& (PAGE_SIZE
- 1));
7705 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
7709 *gpa
= mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, exception
);
7711 if (*gpa
== INVALID_GPA
)
7714 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
7717 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7718 const void *val
, int bytes
)
7722 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
7725 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
7729 struct read_write_emulator_ops
{
7730 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
7732 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7733 void *val
, int bytes
);
7734 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7735 int bytes
, void *val
);
7736 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7737 void *val
, int bytes
);
7741 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
7743 if (vcpu
->mmio_read_completed
) {
7744 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
7745 vcpu
->mmio_fragments
[0].gpa
, val
);
7746 vcpu
->mmio_read_completed
= 0;
7753 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7754 void *val
, int bytes
)
7756 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
7759 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7760 void *val
, int bytes
)
7762 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
7765 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
7767 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
7768 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
7771 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7772 void *val
, int bytes
)
7774 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
7775 return X86EMUL_IO_NEEDED
;
7778 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
7779 void *val
, int bytes
)
7781 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
7783 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7784 return X86EMUL_CONTINUE
;
7787 static const struct read_write_emulator_ops read_emultor
= {
7788 .read_write_prepare
= read_prepare
,
7789 .read_write_emulate
= read_emulate
,
7790 .read_write_mmio
= vcpu_mmio_read
,
7791 .read_write_exit_mmio
= read_exit_mmio
,
7794 static const struct read_write_emulator_ops write_emultor
= {
7795 .read_write_emulate
= write_emulate
,
7796 .read_write_mmio
= write_mmio
,
7797 .read_write_exit_mmio
= write_exit_mmio
,
7801 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
7803 struct x86_exception
*exception
,
7804 struct kvm_vcpu
*vcpu
,
7805 const struct read_write_emulator_ops
*ops
)
7809 bool write
= ops
->write
;
7810 struct kvm_mmio_fragment
*frag
;
7811 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
7814 * If the exit was due to a NPF we may already have a GPA.
7815 * If the GPA is present, use it to avoid the GVA to GPA table walk.
7816 * Note, this cannot be used on string operations since string
7817 * operation using rep will only have the initial GPA from the NPF
7820 if (ctxt
->gpa_available
&& emulator_can_use_gpa(ctxt
) &&
7821 (addr
& ~PAGE_MASK
) == (ctxt
->gpa_val
& ~PAGE_MASK
)) {
7822 gpa
= ctxt
->gpa_val
;
7823 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
7825 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
7827 return X86EMUL_PROPAGATE_FAULT
;
7830 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
7831 return X86EMUL_CONTINUE
;
7834 * Is this MMIO handled locally?
7836 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
7837 if (handled
== bytes
)
7838 return X86EMUL_CONTINUE
;
7844 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
7845 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
7849 return X86EMUL_CONTINUE
;
7852 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
7854 void *val
, unsigned int bytes
,
7855 struct x86_exception
*exception
,
7856 const struct read_write_emulator_ops
*ops
)
7858 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7862 if (ops
->read_write_prepare
&&
7863 ops
->read_write_prepare(vcpu
, val
, bytes
))
7864 return X86EMUL_CONTINUE
;
7866 vcpu
->mmio_nr_fragments
= 0;
7868 /* Crossing a page boundary? */
7869 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
7872 now
= -addr
& ~PAGE_MASK
;
7873 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
7876 if (rc
!= X86EMUL_CONTINUE
)
7879 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
7885 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
7887 if (rc
!= X86EMUL_CONTINUE
)
7890 if (!vcpu
->mmio_nr_fragments
)
7893 gpa
= vcpu
->mmio_fragments
[0].gpa
;
7895 vcpu
->mmio_needed
= 1;
7896 vcpu
->mmio_cur_fragment
= 0;
7898 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
7899 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
7900 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
7901 vcpu
->run
->mmio
.phys_addr
= gpa
;
7903 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
7906 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
7910 struct x86_exception
*exception
)
7912 return emulator_read_write(ctxt
, addr
, val
, bytes
,
7913 exception
, &read_emultor
);
7916 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
7920 struct x86_exception
*exception
)
7922 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
7923 exception
, &write_emultor
);
7926 #define emulator_try_cmpxchg_user(t, ptr, old, new) \
7927 (__try_cmpxchg_user((t __user *)(ptr), (t *)(old), *(t *)(new), efault ## t))
7929 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
7934 struct x86_exception
*exception
)
7936 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7942 /* guests cmpxchg8b have to be emulated atomically */
7943 if (bytes
> 8 || (bytes
& (bytes
- 1)))
7946 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
7948 if (gpa
== INVALID_GPA
||
7949 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
7953 * Emulate the atomic as a straight write to avoid #AC if SLD is
7954 * enabled in the host and the access splits a cache line.
7956 if (boot_cpu_has(X86_FEATURE_SPLIT_LOCK_DETECT
))
7957 page_line_mask
= ~(cache_line_size() - 1);
7959 page_line_mask
= PAGE_MASK
;
7961 if (((gpa
+ bytes
- 1) & page_line_mask
) != (gpa
& page_line_mask
))
7964 hva
= kvm_vcpu_gfn_to_hva(vcpu
, gpa_to_gfn(gpa
));
7965 if (kvm_is_error_hva(hva
))
7968 hva
+= offset_in_page(gpa
);
7972 r
= emulator_try_cmpxchg_user(u8
, hva
, old
, new);
7975 r
= emulator_try_cmpxchg_user(u16
, hva
, old
, new);
7978 r
= emulator_try_cmpxchg_user(u32
, hva
, old
, new);
7981 r
= emulator_try_cmpxchg_user(u64
, hva
, old
, new);
7988 return X86EMUL_UNHANDLEABLE
;
7990 return X86EMUL_CMPXCHG_FAILED
;
7992 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
7994 return X86EMUL_CONTINUE
;
7997 pr_warn_once("emulating exchange as write\n");
7999 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
8002 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
8003 unsigned short port
, void *data
,
8004 unsigned int count
, bool in
)
8009 WARN_ON_ONCE(vcpu
->arch
.pio
.count
);
8010 for (i
= 0; i
< count
; i
++) {
8012 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, port
, size
, data
);
8014 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
, port
, size
, data
);
8021 * Userspace must have unregistered the device while PIO
8022 * was running. Drop writes / read as 0.
8025 memset(data
, 0, size
* (count
- i
));
8034 vcpu
->arch
.pio
.port
= port
;
8035 vcpu
->arch
.pio
.in
= in
;
8036 vcpu
->arch
.pio
.count
= count
;
8037 vcpu
->arch
.pio
.size
= size
;
8040 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
8042 memcpy(vcpu
->arch
.pio_data
, data
, size
* count
);
8044 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
8045 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
8046 vcpu
->run
->io
.size
= size
;
8047 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
8048 vcpu
->run
->io
.count
= count
;
8049 vcpu
->run
->io
.port
= port
;
8053 static int emulator_pio_in(struct kvm_vcpu
*vcpu
, int size
,
8054 unsigned short port
, void *val
, unsigned int count
)
8056 int r
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
8058 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, val
);
8063 static void complete_emulator_pio_in(struct kvm_vcpu
*vcpu
, void *val
)
8065 int size
= vcpu
->arch
.pio
.size
;
8066 unsigned int count
= vcpu
->arch
.pio
.count
;
8067 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
8068 trace_kvm_pio(KVM_PIO_IN
, vcpu
->arch
.pio
.port
, size
, count
, vcpu
->arch
.pio_data
);
8069 vcpu
->arch
.pio
.count
= 0;
8072 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
8073 int size
, unsigned short port
, void *val
,
8076 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8077 if (vcpu
->arch
.pio
.count
) {
8079 * Complete a previous iteration that required userspace I/O.
8080 * Note, @count isn't guaranteed to match pio.count as userspace
8081 * can modify ECX before rerunning the vCPU. Ignore any such
8082 * shenanigans as KVM doesn't support modifying the rep count,
8083 * and the emulator ensures @count doesn't overflow the buffer.
8085 complete_emulator_pio_in(vcpu
, val
);
8089 return emulator_pio_in(vcpu
, size
, port
, val
, count
);
8092 static int emulator_pio_out(struct kvm_vcpu
*vcpu
, int size
,
8093 unsigned short port
, const void *val
,
8096 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, val
);
8097 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
8100 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
8101 int size
, unsigned short port
,
8102 const void *val
, unsigned int count
)
8104 return emulator_pio_out(emul_to_vcpu(ctxt
), size
, port
, val
, count
);
8107 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
8109 return static_call(kvm_x86_get_segment_base
)(vcpu
, seg
);
8112 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
8114 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
8117 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
8119 if (!need_emulate_wbinvd(vcpu
))
8120 return X86EMUL_CONTINUE
;
8122 if (static_call(kvm_x86_has_wbinvd_exit
)()) {
8123 int cpu
= get_cpu();
8125 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
8126 on_each_cpu_mask(vcpu
->arch
.wbinvd_dirty_mask
,
8127 wbinvd_ipi
, NULL
, 1);
8129 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
8132 return X86EMUL_CONTINUE
;
8135 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
8137 kvm_emulate_wbinvd_noskip(vcpu
);
8138 return kvm_skip_emulated_instruction(vcpu
);
8140 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
8144 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
8146 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
8149 static void emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
8150 unsigned long *dest
)
8152 kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
8155 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
8156 unsigned long value
)
8159 return kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
8162 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
8164 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
8167 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
8169 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8170 unsigned long value
;
8174 value
= kvm_read_cr0(vcpu
);
8177 value
= vcpu
->arch
.cr2
;
8180 value
= kvm_read_cr3(vcpu
);
8183 value
= kvm_read_cr4(vcpu
);
8186 value
= kvm_get_cr8(vcpu
);
8189 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
8196 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
8198 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8203 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
8206 vcpu
->arch
.cr2
= val
;
8209 res
= kvm_set_cr3(vcpu
, val
);
8212 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
8215 res
= kvm_set_cr8(vcpu
, val
);
8218 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
8225 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
8227 return static_call(kvm_x86_get_cpl
)(emul_to_vcpu(ctxt
));
8230 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8232 static_call(kvm_x86_get_gdt
)(emul_to_vcpu(ctxt
), dt
);
8235 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8237 static_call(kvm_x86_get_idt
)(emul_to_vcpu(ctxt
), dt
);
8240 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8242 static_call(kvm_x86_set_gdt
)(emul_to_vcpu(ctxt
), dt
);
8245 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
8247 static_call(kvm_x86_set_idt
)(emul_to_vcpu(ctxt
), dt
);
8250 static unsigned long emulator_get_cached_segment_base(
8251 struct x86_emulate_ctxt
*ctxt
, int seg
)
8253 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
8256 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
8257 struct desc_struct
*desc
, u32
*base3
,
8260 struct kvm_segment var
;
8262 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
8263 *selector
= var
.selector
;
8266 memset(desc
, 0, sizeof(*desc
));
8274 set_desc_limit(desc
, var
.limit
);
8275 set_desc_base(desc
, (unsigned long)var
.base
);
8276 #ifdef CONFIG_X86_64
8278 *base3
= var
.base
>> 32;
8280 desc
->type
= var
.type
;
8282 desc
->dpl
= var
.dpl
;
8283 desc
->p
= var
.present
;
8284 desc
->avl
= var
.avl
;
8292 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
8293 struct desc_struct
*desc
, u32 base3
,
8296 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8297 struct kvm_segment var
;
8299 var
.selector
= selector
;
8300 var
.base
= get_desc_base(desc
);
8301 #ifdef CONFIG_X86_64
8302 var
.base
|= ((u64
)base3
) << 32;
8304 var
.limit
= get_desc_limit(desc
);
8306 var
.limit
= (var
.limit
<< 12) | 0xfff;
8307 var
.type
= desc
->type
;
8308 var
.dpl
= desc
->dpl
;
8313 var
.avl
= desc
->avl
;
8314 var
.present
= desc
->p
;
8315 var
.unusable
= !var
.present
;
8318 kvm_set_segment(vcpu
, &var
, seg
);
8322 static int emulator_get_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
8323 u32 msr_index
, u64
*pdata
)
8325 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8328 r
= kvm_get_msr_with_filter(vcpu
, msr_index
, pdata
);
8330 return X86EMUL_UNHANDLEABLE
;
8333 if (kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_RDMSR
, 0,
8334 complete_emulated_rdmsr
, r
))
8335 return X86EMUL_IO_NEEDED
;
8337 trace_kvm_msr_read_ex(msr_index
);
8338 return X86EMUL_PROPAGATE_FAULT
;
8341 trace_kvm_msr_read(msr_index
, *pdata
);
8342 return X86EMUL_CONTINUE
;
8345 static int emulator_set_msr_with_filter(struct x86_emulate_ctxt
*ctxt
,
8346 u32 msr_index
, u64 data
)
8348 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8351 r
= kvm_set_msr_with_filter(vcpu
, msr_index
, data
);
8353 return X86EMUL_UNHANDLEABLE
;
8356 if (kvm_msr_user_space(vcpu
, msr_index
, KVM_EXIT_X86_WRMSR
, data
,
8357 complete_emulated_msr_access
, r
))
8358 return X86EMUL_IO_NEEDED
;
8360 trace_kvm_msr_write_ex(msr_index
, data
);
8361 return X86EMUL_PROPAGATE_FAULT
;
8364 trace_kvm_msr_write(msr_index
, data
);
8365 return X86EMUL_CONTINUE
;
8368 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
8369 u32 msr_index
, u64
*pdata
)
8371 return kvm_get_msr(emul_to_vcpu(ctxt
), msr_index
, pdata
);
8374 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
8377 if (kvm_pmu_is_valid_rdpmc_ecx(emul_to_vcpu(ctxt
), pmc
))
8382 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
8383 u32 pmc
, u64
*pdata
)
8385 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
8388 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
8390 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
8393 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
8394 struct x86_instruction_info
*info
,
8395 enum x86_intercept_stage stage
)
8397 return static_call(kvm_x86_check_intercept
)(emul_to_vcpu(ctxt
), info
, stage
,
8401 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
8402 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
,
8405 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, exact_only
);
8408 static bool emulator_guest_has_movbe(struct x86_emulate_ctxt
*ctxt
)
8410 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_MOVBE
);
8413 static bool emulator_guest_has_fxsr(struct x86_emulate_ctxt
*ctxt
)
8415 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_FXSR
);
8418 static bool emulator_guest_has_rdpid(struct x86_emulate_ctxt
*ctxt
)
8420 return guest_cpuid_has(emul_to_vcpu(ctxt
), X86_FEATURE_RDPID
);
8423 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
8425 return kvm_register_read_raw(emul_to_vcpu(ctxt
), reg
);
8428 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
8430 kvm_register_write_raw(emul_to_vcpu(ctxt
), reg
, val
);
8433 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
8435 static_call(kvm_x86_set_nmi_mask
)(emul_to_vcpu(ctxt
), masked
);
8438 static bool emulator_is_smm(struct x86_emulate_ctxt
*ctxt
)
8440 return is_smm(emul_to_vcpu(ctxt
));
8443 static bool emulator_is_guest_mode(struct x86_emulate_ctxt
*ctxt
)
8445 return is_guest_mode(emul_to_vcpu(ctxt
));
8448 #ifndef CONFIG_KVM_SMM
8449 static int emulator_leave_smm(struct x86_emulate_ctxt
*ctxt
)
8452 return X86EMUL_UNHANDLEABLE
;
8456 static void emulator_triple_fault(struct x86_emulate_ctxt
*ctxt
)
8458 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, emul_to_vcpu(ctxt
));
8461 static int emulator_set_xcr(struct x86_emulate_ctxt
*ctxt
, u32 index
, u64 xcr
)
8463 return __kvm_set_xcr(emul_to_vcpu(ctxt
), index
, xcr
);
8466 static void emulator_vm_bugged(struct x86_emulate_ctxt
*ctxt
)
8468 struct kvm
*kvm
= emul_to_vcpu(ctxt
)->kvm
;
8470 if (!kvm
->vm_bugged
)
8474 static const struct x86_emulate_ops emulate_ops
= {
8475 .vm_bugged
= emulator_vm_bugged
,
8476 .read_gpr
= emulator_read_gpr
,
8477 .write_gpr
= emulator_write_gpr
,
8478 .read_std
= emulator_read_std
,
8479 .write_std
= emulator_write_std
,
8480 .fetch
= kvm_fetch_guest_virt
,
8481 .read_emulated
= emulator_read_emulated
,
8482 .write_emulated
= emulator_write_emulated
,
8483 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
8484 .invlpg
= emulator_invlpg
,
8485 .pio_in_emulated
= emulator_pio_in_emulated
,
8486 .pio_out_emulated
= emulator_pio_out_emulated
,
8487 .get_segment
= emulator_get_segment
,
8488 .set_segment
= emulator_set_segment
,
8489 .get_cached_segment_base
= emulator_get_cached_segment_base
,
8490 .get_gdt
= emulator_get_gdt
,
8491 .get_idt
= emulator_get_idt
,
8492 .set_gdt
= emulator_set_gdt
,
8493 .set_idt
= emulator_set_idt
,
8494 .get_cr
= emulator_get_cr
,
8495 .set_cr
= emulator_set_cr
,
8496 .cpl
= emulator_get_cpl
,
8497 .get_dr
= emulator_get_dr
,
8498 .set_dr
= emulator_set_dr
,
8499 .set_msr_with_filter
= emulator_set_msr_with_filter
,
8500 .get_msr_with_filter
= emulator_get_msr_with_filter
,
8501 .get_msr
= emulator_get_msr
,
8502 .check_pmc
= emulator_check_pmc
,
8503 .read_pmc
= emulator_read_pmc
,
8504 .halt
= emulator_halt
,
8505 .wbinvd
= emulator_wbinvd
,
8506 .fix_hypercall
= emulator_fix_hypercall
,
8507 .intercept
= emulator_intercept
,
8508 .get_cpuid
= emulator_get_cpuid
,
8509 .guest_has_movbe
= emulator_guest_has_movbe
,
8510 .guest_has_fxsr
= emulator_guest_has_fxsr
,
8511 .guest_has_rdpid
= emulator_guest_has_rdpid
,
8512 .set_nmi_mask
= emulator_set_nmi_mask
,
8513 .is_smm
= emulator_is_smm
,
8514 .is_guest_mode
= emulator_is_guest_mode
,
8515 .leave_smm
= emulator_leave_smm
,
8516 .triple_fault
= emulator_triple_fault
,
8517 .set_xcr
= emulator_set_xcr
,
8520 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
8522 u32 int_shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
8524 * an sti; sti; sequence only disable interrupts for the first
8525 * instruction. So, if the last instruction, be it emulated or
8526 * not, left the system with the INT_STI flag enabled, it
8527 * means that the last instruction is an sti. We should not
8528 * leave the flag on in this case. The same goes for mov ss
8530 if (int_shadow
& mask
)
8532 if (unlikely(int_shadow
|| mask
)) {
8533 static_call(kvm_x86_set_interrupt_shadow
)(vcpu
, mask
);
8535 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8539 static void inject_emulated_exception(struct kvm_vcpu
*vcpu
)
8541 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8543 if (ctxt
->exception
.vector
== PF_VECTOR
)
8544 kvm_inject_emulated_page_fault(vcpu
, &ctxt
->exception
);
8545 else if (ctxt
->exception
.error_code_valid
)
8546 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
8547 ctxt
->exception
.error_code
);
8549 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
8552 static struct x86_emulate_ctxt
*alloc_emulate_ctxt(struct kvm_vcpu
*vcpu
)
8554 struct x86_emulate_ctxt
*ctxt
;
8556 ctxt
= kmem_cache_zalloc(x86_emulator_cache
, GFP_KERNEL_ACCOUNT
);
8558 pr_err("failed to allocate vcpu's emulator\n");
8563 ctxt
->ops
= &emulate_ops
;
8564 vcpu
->arch
.emulate_ctxt
= ctxt
;
8569 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
8571 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8574 static_call(kvm_x86_get_cs_db_l_bits
)(vcpu
, &cs_db
, &cs_l
);
8576 ctxt
->gpa_available
= false;
8577 ctxt
->eflags
= kvm_get_rflags(vcpu
);
8578 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
8580 ctxt
->eip
= kvm_rip_read(vcpu
);
8581 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
8582 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
8583 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
8584 cs_db
? X86EMUL_MODE_PROT32
:
8585 X86EMUL_MODE_PROT16
;
8586 ctxt
->interruptibility
= 0;
8587 ctxt
->have_exception
= false;
8588 ctxt
->exception
.vector
= -1;
8589 ctxt
->perm_ok
= false;
8591 init_decode_cache(ctxt
);
8592 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
8595 void kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
8597 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8600 init_emulate_ctxt(vcpu
);
8604 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
8605 ret
= emulate_int_real(ctxt
, irq
);
8607 if (ret
!= X86EMUL_CONTINUE
) {
8608 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
8610 ctxt
->eip
= ctxt
->_eip
;
8611 kvm_rip_write(vcpu
, ctxt
->eip
);
8612 kvm_set_rflags(vcpu
, ctxt
->eflags
);
8615 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
8617 static void prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8618 u8 ndata
, u8
*insn_bytes
, u8 insn_size
)
8620 struct kvm_run
*run
= vcpu
->run
;
8625 * Zero the whole array used to retrieve the exit info, as casting to
8626 * u32 for select entries will leave some chunks uninitialized.
8628 memset(&info
, 0, sizeof(info
));
8630 static_call(kvm_x86_get_exit_info
)(vcpu
, (u32
*)&info
[0], &info
[1],
8631 &info
[2], (u32
*)&info
[3],
8634 run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
8635 run
->emulation_failure
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
8638 * There's currently space for 13 entries, but 5 are used for the exit
8639 * reason and info. Restrict to 4 to reduce the maintenance burden
8640 * when expanding kvm_run.emulation_failure in the future.
8642 if (WARN_ON_ONCE(ndata
> 4))
8645 /* Always include the flags as a 'data' entry. */
8647 run
->emulation_failure
.flags
= 0;
8650 BUILD_BUG_ON((sizeof(run
->emulation_failure
.insn_size
) +
8651 sizeof(run
->emulation_failure
.insn_bytes
) != 16));
8653 run
->emulation_failure
.flags
|=
8654 KVM_INTERNAL_ERROR_EMULATION_FLAG_INSTRUCTION_BYTES
;
8655 run
->emulation_failure
.insn_size
= insn_size
;
8656 memset(run
->emulation_failure
.insn_bytes
, 0x90,
8657 sizeof(run
->emulation_failure
.insn_bytes
));
8658 memcpy(run
->emulation_failure
.insn_bytes
, insn_bytes
, insn_size
);
8661 memcpy(&run
->internal
.data
[info_start
], info
, sizeof(info
));
8662 memcpy(&run
->internal
.data
[info_start
+ ARRAY_SIZE(info
)], data
,
8663 ndata
* sizeof(data
[0]));
8665 run
->emulation_failure
.ndata
= info_start
+ ARRAY_SIZE(info
) + ndata
;
8668 static void prepare_emulation_ctxt_failure_exit(struct kvm_vcpu
*vcpu
)
8670 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
8672 prepare_emulation_failure_exit(vcpu
, NULL
, 0, ctxt
->fetch
.data
,
8673 ctxt
->fetch
.end
- ctxt
->fetch
.data
);
8676 void __kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
, u64
*data
,
8679 prepare_emulation_failure_exit(vcpu
, data
, ndata
, NULL
, 0);
8681 EXPORT_SYMBOL_GPL(__kvm_prepare_emulation_failure_exit
);
8683 void kvm_prepare_emulation_failure_exit(struct kvm_vcpu
*vcpu
)
8685 __kvm_prepare_emulation_failure_exit(vcpu
, NULL
, 0);
8687 EXPORT_SYMBOL_GPL(kvm_prepare_emulation_failure_exit
);
8689 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
8691 struct kvm
*kvm
= vcpu
->kvm
;
8693 ++vcpu
->stat
.insn_emulation_fail
;
8694 trace_kvm_emulate_insn_failed(vcpu
);
8696 if (emulation_type
& EMULTYPE_VMWARE_GP
) {
8697 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
8701 if (kvm
->arch
.exit_on_emulation_error
||
8702 (emulation_type
& EMULTYPE_SKIP
)) {
8703 prepare_emulation_ctxt_failure_exit(vcpu
);
8707 kvm_queue_exception(vcpu
, UD_VECTOR
);
8709 if (!is_guest_mode(vcpu
) && static_call(kvm_x86_get_cpl
)(vcpu
) == 0) {
8710 prepare_emulation_ctxt_failure_exit(vcpu
);
8717 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
8720 gpa_t gpa
= cr2_or_gpa
;
8723 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8726 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8727 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8730 if (!vcpu
->arch
.mmu
->root_role
.direct
) {
8732 * Write permission should be allowed since only
8733 * write access need to be emulated.
8735 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8738 * If the mapping is invalid in guest, let cpu retry
8739 * it to generate fault.
8741 if (gpa
== INVALID_GPA
)
8746 * Do not retry the unhandleable instruction if it faults on the
8747 * readonly host memory, otherwise it will goto a infinite loop:
8748 * retry instruction -> write #PF -> emulation fail -> retry
8749 * instruction -> ...
8751 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
8754 * If the instruction failed on the error pfn, it can not be fixed,
8755 * report the error to userspace.
8757 if (is_error_noslot_pfn(pfn
))
8760 kvm_release_pfn_clean(pfn
);
8762 /* The instructions are well-emulated on direct mmu. */
8763 if (vcpu
->arch
.mmu
->root_role
.direct
) {
8764 unsigned int indirect_shadow_pages
;
8766 write_lock(&vcpu
->kvm
->mmu_lock
);
8767 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
8768 write_unlock(&vcpu
->kvm
->mmu_lock
);
8770 if (indirect_shadow_pages
)
8771 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8777 * if emulation was due to access to shadowed page table
8778 * and it failed try to unshadow page and re-enter the
8779 * guest to let CPU execute the instruction.
8781 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8784 * If the access faults on its page table, it can not
8785 * be fixed by unprotecting shadow page and it should
8786 * be reported to userspace.
8788 return !(emulation_type
& EMULTYPE_WRITE_PF_TO_SP
);
8791 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
8792 gpa_t cr2_or_gpa
, int emulation_type
)
8794 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
8795 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2_or_gpa
;
8797 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
8798 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
8801 * If the emulation is caused by #PF and it is non-page_table
8802 * writing instruction, it means the VM-EXIT is caused by shadow
8803 * page protected, we can zap the shadow page and retry this
8804 * instruction directly.
8806 * Note: if the guest uses a non-page-table modifying instruction
8807 * on the PDE that points to the instruction, then we will unmap
8808 * the instruction and go to an infinite loop. So, we cache the
8809 * last retried eip and the last fault address, if we meet the eip
8810 * and the address again, we can break out of the potential infinite
8813 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
8815 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY_PF
))
8818 if (WARN_ON_ONCE(is_guest_mode(vcpu
)) ||
8819 WARN_ON_ONCE(!(emulation_type
& EMULTYPE_PF
)))
8822 if (x86_page_table_writing_insn(ctxt
))
8825 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2_or_gpa
)
8828 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
8829 vcpu
->arch
.last_retry_addr
= cr2_or_gpa
;
8831 if (!vcpu
->arch
.mmu
->root_role
.direct
)
8832 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2_or_gpa
, NULL
);
8834 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
8839 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
8840 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
8842 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
8851 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
8852 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
8857 static int kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
)
8859 struct kvm_run
*kvm_run
= vcpu
->run
;
8861 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
8862 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_ACTIVE_LOW
;
8863 kvm_run
->debug
.arch
.pc
= kvm_get_linear_rip(vcpu
);
8864 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8865 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8868 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
8872 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
8874 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
8877 r
= static_call(kvm_x86_skip_emulated_instruction
)(vcpu
);
8881 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
8884 * rflags is the old, "raw" value of the flags. The new value has
8885 * not been saved yet.
8887 * This is correct even for TF set by the guest, because "the
8888 * processor will not generate this exception after the instruction
8889 * that sets the TF flag".
8891 if (unlikely(rflags
& X86_EFLAGS_TF
))
8892 r
= kvm_vcpu_do_singlestep(vcpu
);
8895 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
8897 static bool kvm_is_code_breakpoint_inhibited(struct kvm_vcpu
*vcpu
)
8901 if (kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)
8905 * Intel CPUs inhibit code #DBs when MOV/POP SS blocking is active,
8906 * but AMD CPUs do not. MOV/POP SS blocking is rare, check that first
8907 * to avoid the relatively expensive CPUID lookup.
8909 shadow
= static_call(kvm_x86_get_interrupt_shadow
)(vcpu
);
8910 return (shadow
& KVM_X86_SHADOW_INT_MOV_SS
) &&
8911 guest_cpuid_is_intel(vcpu
);
8914 static bool kvm_vcpu_check_code_breakpoint(struct kvm_vcpu
*vcpu
,
8915 int emulation_type
, int *r
)
8917 WARN_ON_ONCE(emulation_type
& EMULTYPE_NO_DECODE
);
8920 * Do not check for code breakpoints if hardware has already done the
8921 * checks, as inferred from the emulation type. On NO_DECODE and SKIP,
8922 * the instruction has passed all exception checks, and all intercepted
8923 * exceptions that trigger emulation have lower priority than code
8924 * breakpoints, i.e. the fact that the intercepted exception occurred
8925 * means any code breakpoints have already been serviced.
8927 * Note, KVM needs to check for code #DBs on EMULTYPE_TRAP_UD_FORCED as
8928 * hardware has checked the RIP of the magic prefix, but not the RIP of
8929 * the instruction being emulated. The intent of forced emulation is
8930 * to behave as if KVM intercepted the instruction without an exception
8931 * and without a prefix.
8933 if (emulation_type
& (EMULTYPE_NO_DECODE
| EMULTYPE_SKIP
|
8934 EMULTYPE_TRAP_UD
| EMULTYPE_VMWARE_GP
| EMULTYPE_PF
))
8937 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
8938 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
8939 struct kvm_run
*kvm_run
= vcpu
->run
;
8940 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8941 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8942 vcpu
->arch
.guest_debug_dr7
,
8946 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_ACTIVE_LOW
;
8947 kvm_run
->debug
.arch
.pc
= eip
;
8948 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
8949 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
8955 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
8956 !kvm_is_code_breakpoint_inhibited(vcpu
)) {
8957 unsigned long eip
= kvm_get_linear_rip(vcpu
);
8958 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
8963 kvm_queue_exception_p(vcpu
, DB_VECTOR
, dr6
);
8972 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
8974 switch (ctxt
->opcode_len
) {
8981 case 0xe6: /* OUT */
8985 case 0x6c: /* INS */
8987 case 0x6e: /* OUTS */
8994 case 0x33: /* RDPMC */
9004 * Decode an instruction for emulation. The caller is responsible for handling
9005 * code breakpoints. Note, manually detecting code breakpoints is unnecessary
9006 * (and wrong) when emulating on an intercepted fault-like exception[*], as
9007 * code breakpoints have higher priority and thus have already been done by
9010 * [*] Except #MC, which is higher priority, but KVM should never emulate in
9011 * response to a machine check.
9013 int x86_decode_emulated_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
,
9014 void *insn
, int insn_len
)
9016 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
9019 init_emulate_ctxt(vcpu
);
9021 r
= x86_decode_insn(ctxt
, insn
, insn_len
, emulation_type
);
9023 trace_kvm_emulate_insn_start(vcpu
);
9024 ++vcpu
->stat
.insn_emulation
;
9028 EXPORT_SYMBOL_GPL(x86_decode_emulated_instruction
);
9030 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
, gpa_t cr2_or_gpa
,
9031 int emulation_type
, void *insn
, int insn_len
)
9034 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
9035 bool writeback
= true;
9037 r
= kvm_check_emulate_insn(vcpu
, emulation_type
, insn
, insn_len
);
9038 if (r
!= X86EMUL_CONTINUE
) {
9039 if (r
== X86EMUL_RETRY_INSTR
|| r
== X86EMUL_PROPAGATE_FAULT
)
9042 WARN_ON_ONCE(r
!= X86EMUL_UNHANDLEABLE
);
9043 return handle_emulation_failure(vcpu
, emulation_type
);
9046 vcpu
->arch
.l1tf_flush_l1d
= true;
9048 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
9049 kvm_clear_exception_queue(vcpu
);
9052 * Return immediately if RIP hits a code breakpoint, such #DBs
9053 * are fault-like and are higher priority than any faults on
9054 * the code fetch itself.
9056 if (kvm_vcpu_check_code_breakpoint(vcpu
, emulation_type
, &r
))
9059 r
= x86_decode_emulated_instruction(vcpu
, emulation_type
,
9061 if (r
!= EMULATION_OK
) {
9062 if ((emulation_type
& EMULTYPE_TRAP_UD
) ||
9063 (emulation_type
& EMULTYPE_TRAP_UD_FORCED
)) {
9064 kvm_queue_exception(vcpu
, UD_VECTOR
);
9067 if (reexecute_instruction(vcpu
, cr2_or_gpa
,
9071 if (ctxt
->have_exception
&&
9072 !(emulation_type
& EMULTYPE_SKIP
)) {
9074 * #UD should result in just EMULATION_FAILED, and trap-like
9075 * exception should not be encountered during decode.
9077 WARN_ON_ONCE(ctxt
->exception
.vector
== UD_VECTOR
||
9078 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
);
9079 inject_emulated_exception(vcpu
);
9082 return handle_emulation_failure(vcpu
, emulation_type
);
9086 if ((emulation_type
& EMULTYPE_VMWARE_GP
) &&
9087 !is_vmware_backdoor_opcode(ctxt
)) {
9088 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
9093 * EMULTYPE_SKIP without EMULTYPE_COMPLETE_USER_EXIT is intended for
9094 * use *only* by vendor callbacks for kvm_skip_emulated_instruction().
9095 * The caller is responsible for updating interruptibility state and
9096 * injecting single-step #DBs.
9098 if (emulation_type
& EMULTYPE_SKIP
) {
9099 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
9100 ctxt
->eip
= (u32
)ctxt
->_eip
;
9102 ctxt
->eip
= ctxt
->_eip
;
9104 if (emulation_type
& EMULTYPE_COMPLETE_USER_EXIT
) {
9109 kvm_rip_write(vcpu
, ctxt
->eip
);
9110 if (ctxt
->eflags
& X86_EFLAGS_RF
)
9111 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
9115 if (retry_instruction(ctxt
, cr2_or_gpa
, emulation_type
))
9118 /* this is needed for vmware backdoor interface to work since it
9119 changes registers values during IO operation */
9120 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
9121 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
9122 emulator_invalidate_register_cache(ctxt
);
9126 if (emulation_type
& EMULTYPE_PF
) {
9127 /* Save the faulting GPA (cr2) in the address field */
9128 ctxt
->exception
.address
= cr2_or_gpa
;
9130 /* With shadow page tables, cr2 contains a GVA or nGPA. */
9131 if (vcpu
->arch
.mmu
->root_role
.direct
) {
9132 ctxt
->gpa_available
= true;
9133 ctxt
->gpa_val
= cr2_or_gpa
;
9136 /* Sanitize the address out of an abundance of paranoia. */
9137 ctxt
->exception
.address
= 0;
9140 r
= x86_emulate_insn(ctxt
);
9142 if (r
== EMULATION_INTERCEPTED
)
9145 if (r
== EMULATION_FAILED
) {
9146 if (reexecute_instruction(vcpu
, cr2_or_gpa
, emulation_type
))
9149 return handle_emulation_failure(vcpu
, emulation_type
);
9152 if (ctxt
->have_exception
) {
9153 WARN_ON_ONCE(vcpu
->mmio_needed
&& !vcpu
->mmio_is_write
);
9154 vcpu
->mmio_needed
= false;
9156 inject_emulated_exception(vcpu
);
9157 } else if (vcpu
->arch
.pio
.count
) {
9158 if (!vcpu
->arch
.pio
.in
) {
9159 /* FIXME: return into emulator if single-stepping. */
9160 vcpu
->arch
.pio
.count
= 0;
9163 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
9166 } else if (vcpu
->mmio_needed
) {
9167 ++vcpu
->stat
.mmio_exits
;
9169 if (!vcpu
->mmio_is_write
)
9172 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
9173 } else if (vcpu
->arch
.complete_userspace_io
) {
9176 } else if (r
== EMULATION_RESTART
)
9183 unsigned long rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
9184 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
9185 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
9188 * Note, EXCPT_DB is assumed to be fault-like as the emulator
9189 * only supports code breakpoints and general detect #DB, both
9190 * of which are fault-like.
9192 if (!ctxt
->have_exception
||
9193 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
) {
9194 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_INSTRUCTIONS
);
9195 if (ctxt
->is_branch
)
9196 kvm_pmu_trigger_event(vcpu
, PERF_COUNT_HW_BRANCH_INSTRUCTIONS
);
9197 kvm_rip_write(vcpu
, ctxt
->eip
);
9198 if (r
&& (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
9199 r
= kvm_vcpu_do_singlestep(vcpu
);
9200 static_call_cond(kvm_x86_update_emulated_instruction
)(vcpu
);
9201 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
9205 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
9206 * do nothing, and it will be requested again as soon as
9207 * the shadow expires. But we still need to check here,
9208 * because POPF has no interrupt shadow.
9210 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
9211 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9213 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
9218 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
9220 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
9222 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
9224 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
9225 void *insn
, int insn_len
)
9227 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
9229 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
9231 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
9233 vcpu
->arch
.pio
.count
= 0;
9237 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
9239 vcpu
->arch
.pio
.count
= 0;
9241 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
9244 return kvm_skip_emulated_instruction(vcpu
);
9247 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
9248 unsigned short port
)
9250 unsigned long val
= kvm_rax_read(vcpu
);
9251 int ret
= emulator_pio_out(vcpu
, size
, port
, &val
, 1);
9257 * Workaround userspace that relies on old KVM behavior of %rip being
9258 * incremented prior to exiting to userspace to handle "OUT 0x7e".
9261 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
9262 vcpu
->arch
.complete_userspace_io
=
9263 complete_fast_pio_out_port_0x7e
;
9264 kvm_skip_emulated_instruction(vcpu
);
9266 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
9267 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
9272 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
9276 /* We should only ever be called with arch.pio.count equal to 1 */
9277 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
9279 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
9280 vcpu
->arch
.pio
.count
= 0;
9284 /* For size less than 4 we merge, else we zero extend */
9285 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
9287 complete_emulator_pio_in(vcpu
, &val
);
9288 kvm_rax_write(vcpu
, val
);
9290 return kvm_skip_emulated_instruction(vcpu
);
9293 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
9294 unsigned short port
)
9299 /* For size less than 4 we merge, else we zero extend */
9300 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
9302 ret
= emulator_pio_in(vcpu
, size
, port
, &val
, 1);
9304 kvm_rax_write(vcpu
, val
);
9308 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
9309 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
9314 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
9319 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
9321 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
9322 return ret
&& kvm_skip_emulated_instruction(vcpu
);
9324 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
9326 static int kvmclock_cpu_down_prep(unsigned int cpu
)
9328 __this_cpu_write(cpu_tsc_khz
, 0);
9332 static void tsc_khz_changed(void *data
)
9334 struct cpufreq_freqs
*freq
= data
;
9337 WARN_ON_ONCE(boot_cpu_has(X86_FEATURE_CONSTANT_TSC
));
9342 khz
= cpufreq_quick_get(raw_smp_processor_id());
9345 __this_cpu_write(cpu_tsc_khz
, khz
);
9348 #ifdef CONFIG_X86_64
9349 static void kvm_hyperv_tsc_notifier(void)
9354 mutex_lock(&kvm_lock
);
9355 list_for_each_entry(kvm
, &vm_list
, vm_list
)
9356 kvm_make_mclock_inprogress_request(kvm
);
9358 /* no guest entries from this point */
9359 hyperv_stop_tsc_emulation();
9361 /* TSC frequency always matches when on Hyper-V */
9362 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9363 for_each_present_cpu(cpu
)
9364 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
9366 kvm_caps
.max_guest_tsc_khz
= tsc_khz
;
9368 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9369 __kvm_start_pvclock_update(kvm
);
9370 pvclock_update_vm_gtod_copy(kvm
);
9371 kvm_end_pvclock_update(kvm
);
9374 mutex_unlock(&kvm_lock
);
9378 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
9381 struct kvm_vcpu
*vcpu
;
9386 * We allow guests to temporarily run on slowing clocks,
9387 * provided we notify them after, or to run on accelerating
9388 * clocks, provided we notify them before. Thus time never
9391 * However, we have a problem. We can't atomically update
9392 * the frequency of a given CPU from this function; it is
9393 * merely a notifier, which can be called from any CPU.
9394 * Changing the TSC frequency at arbitrary points in time
9395 * requires a recomputation of local variables related to
9396 * the TSC for each VCPU. We must flag these local variables
9397 * to be updated and be sure the update takes place with the
9398 * new frequency before any guests proceed.
9400 * Unfortunately, the combination of hotplug CPU and frequency
9401 * change creates an intractable locking scenario; the order
9402 * of when these callouts happen is undefined with respect to
9403 * CPU hotplug, and they can race with each other. As such,
9404 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
9405 * undefined; you can actually have a CPU frequency change take
9406 * place in between the computation of X and the setting of the
9407 * variable. To protect against this problem, all updates of
9408 * the per_cpu tsc_khz variable are done in an interrupt
9409 * protected IPI, and all callers wishing to update the value
9410 * must wait for a synchronous IPI to complete (which is trivial
9411 * if the caller is on the CPU already). This establishes the
9412 * necessary total order on variable updates.
9414 * Note that because a guest time update may take place
9415 * anytime after the setting of the VCPU's request bit, the
9416 * correct TSC value must be set before the request. However,
9417 * to ensure the update actually makes it to any guest which
9418 * starts running in hardware virtualization between the set
9419 * and the acquisition of the spinlock, we must also ping the
9420 * CPU after setting the request bit.
9424 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
9426 mutex_lock(&kvm_lock
);
9427 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9428 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9429 if (vcpu
->cpu
!= cpu
)
9431 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9432 if (vcpu
->cpu
!= raw_smp_processor_id())
9436 mutex_unlock(&kvm_lock
);
9438 if (freq
->old
< freq
->new && send_ipi
) {
9440 * We upscale the frequency. Must make the guest
9441 * doesn't see old kvmclock values while running with
9442 * the new frequency, otherwise we risk the guest sees
9443 * time go backwards.
9445 * In case we update the frequency for another cpu
9446 * (which might be in guest context) send an interrupt
9447 * to kick the cpu out of guest context. Next time
9448 * guest context is entered kvmclock will be updated,
9449 * so the guest will not see stale values.
9451 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
9455 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
9458 struct cpufreq_freqs
*freq
= data
;
9461 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
9463 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
9466 for_each_cpu(cpu
, freq
->policy
->cpus
)
9467 __kvmclock_cpufreq_notifier(freq
, cpu
);
9472 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
9473 .notifier_call
= kvmclock_cpufreq_notifier
9476 static int kvmclock_cpu_online(unsigned int cpu
)
9478 tsc_khz_changed(NULL
);
9482 static void kvm_timer_init(void)
9484 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9485 max_tsc_khz
= tsc_khz
;
9487 if (IS_ENABLED(CONFIG_CPU_FREQ
)) {
9488 struct cpufreq_policy
*policy
;
9492 policy
= cpufreq_cpu_get(cpu
);
9494 if (policy
->cpuinfo
.max_freq
)
9495 max_tsc_khz
= policy
->cpuinfo
.max_freq
;
9496 cpufreq_cpu_put(policy
);
9500 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
9501 CPUFREQ_TRANSITION_NOTIFIER
);
9503 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
9504 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
9508 #ifdef CONFIG_X86_64
9509 static void pvclock_gtod_update_fn(struct work_struct
*work
)
9512 struct kvm_vcpu
*vcpu
;
9515 mutex_lock(&kvm_lock
);
9516 list_for_each_entry(kvm
, &vm_list
, vm_list
)
9517 kvm_for_each_vcpu(i
, vcpu
, kvm
)
9518 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
9519 atomic_set(&kvm_guest_has_master_clock
, 0);
9520 mutex_unlock(&kvm_lock
);
9523 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
9526 * Indirection to move queue_work() out of the tk_core.seq write held
9527 * region to prevent possible deadlocks against time accessors which
9528 * are invoked with work related locks held.
9530 static void pvclock_irq_work_fn(struct irq_work
*w
)
9532 queue_work(system_long_wq
, &pvclock_gtod_work
);
9535 static DEFINE_IRQ_WORK(pvclock_irq_work
, pvclock_irq_work_fn
);
9538 * Notification about pvclock gtod data update.
9540 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
9543 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
9544 struct timekeeper
*tk
= priv
;
9546 update_pvclock_gtod(tk
);
9549 * Disable master clock if host does not trust, or does not use,
9550 * TSC based clocksource. Delegate queue_work() to irq_work as
9551 * this is invoked with tk_core.seq write held.
9553 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
9554 atomic_read(&kvm_guest_has_master_clock
) != 0)
9555 irq_work_queue(&pvclock_irq_work
);
9559 static struct notifier_block pvclock_gtod_notifier
= {
9560 .notifier_call
= pvclock_gtod_notify
,
9564 static inline void kvm_ops_update(struct kvm_x86_init_ops
*ops
)
9566 memcpy(&kvm_x86_ops
, ops
->runtime_ops
, sizeof(kvm_x86_ops
));
9568 #define __KVM_X86_OP(func) \
9569 static_call_update(kvm_x86_##func, kvm_x86_ops.func);
9570 #define KVM_X86_OP(func) \
9571 WARN_ON(!kvm_x86_ops.func); __KVM_X86_OP(func)
9572 #define KVM_X86_OP_OPTIONAL __KVM_X86_OP
9573 #define KVM_X86_OP_OPTIONAL_RET0(func) \
9574 static_call_update(kvm_x86_##func, (void *)kvm_x86_ops.func ? : \
9575 (void *)__static_call_return0);
9576 #include <asm/kvm-x86-ops.h>
9579 kvm_pmu_ops_update(ops
->pmu_ops
);
9582 static int kvm_x86_check_processor_compatibility(void)
9584 int cpu
= smp_processor_id();
9585 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
9588 * Compatibility checks are done when loading KVM and when enabling
9589 * hardware, e.g. during CPU hotplug, to ensure all online CPUs are
9590 * compatible, i.e. KVM should never perform a compatibility check on
9593 WARN_ON(!cpu_online(cpu
));
9595 if (__cr4_reserved_bits(cpu_has
, c
) !=
9596 __cr4_reserved_bits(cpu_has
, &boot_cpu_data
))
9599 return static_call(kvm_x86_check_processor_compatibility
)();
9602 static void kvm_x86_check_cpu_compat(void *ret
)
9604 *(int *)ret
= kvm_x86_check_processor_compatibility();
9607 static int __kvm_x86_vendor_init(struct kvm_x86_init_ops
*ops
)
9612 if (kvm_x86_ops
.hardware_enable
) {
9613 pr_err("already loaded vendor module '%s'\n", kvm_x86_ops
.name
);
9618 * KVM explicitly assumes that the guest has an FPU and
9619 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
9620 * vCPU's FPU state as a fxregs_state struct.
9622 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
9623 pr_err("inadequate fpu\n");
9627 if (IS_ENABLED(CONFIG_PREEMPT_RT
) && !boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9628 pr_err("RT requires X86_FEATURE_CONSTANT_TSC\n");
9633 * KVM assumes that PAT entry '0' encodes WB memtype and simply zeroes
9634 * the PAT bits in SPTEs. Bail if PAT[0] is programmed to something
9635 * other than WB. Note, EPT doesn't utilize the PAT, but don't bother
9636 * with an exception. PAT[0] is set to WB on RESET and also by the
9637 * kernel, i.e. failure indicates a kernel bug or broken firmware.
9639 if (rdmsrl_safe(MSR_IA32_CR_PAT
, &host_pat
) ||
9640 (host_pat
& GENMASK(2, 0)) != 6) {
9641 pr_err("host PAT[0] is not WB\n");
9645 x86_emulator_cache
= kvm_alloc_emulator_cache();
9646 if (!x86_emulator_cache
) {
9647 pr_err("failed to allocate cache for x86 emulator\n");
9651 user_return_msrs
= alloc_percpu(struct kvm_user_return_msrs
);
9652 if (!user_return_msrs
) {
9653 pr_err("failed to allocate percpu kvm_user_return_msrs\n");
9655 goto out_free_x86_emulator_cache
;
9657 kvm_nr_uret_msrs
= 0;
9659 r
= kvm_mmu_vendor_module_init();
9661 goto out_free_percpu
;
9663 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
9664 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
9665 kvm_caps
.supported_xcr0
= host_xcr0
& KVM_SUPPORTED_XCR0
;
9668 rdmsrl_safe(MSR_EFER
, &host_efer
);
9670 if (boot_cpu_has(X86_FEATURE_XSAVES
))
9671 rdmsrl(MSR_IA32_XSS
, host_xss
);
9673 kvm_init_pmu_capability(ops
->pmu_ops
);
9675 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES
))
9676 rdmsrl(MSR_IA32_ARCH_CAPABILITIES
, host_arch_capabilities
);
9678 r
= ops
->hardware_setup();
9682 kvm_ops_update(ops
);
9684 for_each_online_cpu(cpu
) {
9685 smp_call_function_single(cpu
, kvm_x86_check_cpu_compat
, &r
, 1);
9687 goto out_unwind_ops
;
9691 * Point of no return! DO NOT add error paths below this point unless
9692 * absolutely necessary, as most operations from this point forward
9693 * require unwinding.
9697 if (pi_inject_timer
== -1)
9698 pi_inject_timer
= housekeeping_enabled(HK_TYPE_TIMER
);
9699 #ifdef CONFIG_X86_64
9700 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
9702 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9703 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
9706 kvm_register_perf_callbacks(ops
->handle_intel_pt_intr
);
9708 if (!kvm_cpu_cap_has(X86_FEATURE_XSAVES
))
9709 kvm_caps
.supported_xss
= 0;
9711 #define __kvm_cpu_cap_has(UNUSED_, f) kvm_cpu_cap_has(f)
9712 cr4_reserved_bits
= __cr4_reserved_bits(__kvm_cpu_cap_has
, UNUSED_
);
9713 #undef __kvm_cpu_cap_has
9715 if (kvm_caps
.has_tsc_control
) {
9717 * Make sure the user can only configure tsc_khz values that
9718 * fit into a signed integer.
9719 * A min value is not calculated because it will always
9720 * be 1 on all machines.
9722 u64 max
= min(0x7fffffffULL
,
9723 __scale_tsc(kvm_caps
.max_tsc_scaling_ratio
, tsc_khz
));
9724 kvm_caps
.max_guest_tsc_khz
= max
;
9726 kvm_caps
.default_tsc_scaling_ratio
= 1ULL << kvm_caps
.tsc_scaling_ratio_frac_bits
;
9727 kvm_init_msr_lists();
9731 kvm_x86_ops
.hardware_enable
= NULL
;
9732 static_call(kvm_x86_hardware_unsetup
)();
9734 kvm_mmu_vendor_module_exit();
9736 free_percpu(user_return_msrs
);
9737 out_free_x86_emulator_cache
:
9738 kmem_cache_destroy(x86_emulator_cache
);
9742 int kvm_x86_vendor_init(struct kvm_x86_init_ops
*ops
)
9746 mutex_lock(&vendor_module_lock
);
9747 r
= __kvm_x86_vendor_init(ops
);
9748 mutex_unlock(&vendor_module_lock
);
9752 EXPORT_SYMBOL_GPL(kvm_x86_vendor_init
);
9754 void kvm_x86_vendor_exit(void)
9756 kvm_unregister_perf_callbacks();
9758 #ifdef CONFIG_X86_64
9759 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
9760 clear_hv_tscchange_cb();
9764 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
9765 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
9766 CPUFREQ_TRANSITION_NOTIFIER
);
9767 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
9769 #ifdef CONFIG_X86_64
9770 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
9771 irq_work_sync(&pvclock_irq_work
);
9772 cancel_work_sync(&pvclock_gtod_work
);
9774 static_call(kvm_x86_hardware_unsetup
)();
9775 kvm_mmu_vendor_module_exit();
9776 free_percpu(user_return_msrs
);
9777 kmem_cache_destroy(x86_emulator_cache
);
9778 #ifdef CONFIG_KVM_XEN
9779 static_key_deferred_flush(&kvm_xen_enabled
);
9780 WARN_ON(static_branch_unlikely(&kvm_xen_enabled
.key
));
9782 mutex_lock(&vendor_module_lock
);
9783 kvm_x86_ops
.hardware_enable
= NULL
;
9784 mutex_unlock(&vendor_module_lock
);
9786 EXPORT_SYMBOL_GPL(kvm_x86_vendor_exit
);
9788 static int __kvm_emulate_halt(struct kvm_vcpu
*vcpu
, int state
, int reason
)
9791 * The vCPU has halted, e.g. executed HLT. Update the run state if the
9792 * local APIC is in-kernel, the run loop will detect the non-runnable
9793 * state and halt the vCPU. Exit to userspace if the local APIC is
9794 * managed by userspace, in which case userspace is responsible for
9795 * handling wake events.
9797 ++vcpu
->stat
.halt_exits
;
9798 if (lapic_in_kernel(vcpu
)) {
9799 vcpu
->arch
.mp_state
= state
;
9802 vcpu
->run
->exit_reason
= reason
;
9807 int kvm_emulate_halt_noskip(struct kvm_vcpu
*vcpu
)
9809 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_HALTED
, KVM_EXIT_HLT
);
9811 EXPORT_SYMBOL_GPL(kvm_emulate_halt_noskip
);
9813 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
9815 int ret
= kvm_skip_emulated_instruction(vcpu
);
9817 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
9818 * KVM_EXIT_DEBUG here.
9820 return kvm_emulate_halt_noskip(vcpu
) && ret
;
9822 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
9824 int kvm_emulate_ap_reset_hold(struct kvm_vcpu
*vcpu
)
9826 int ret
= kvm_skip_emulated_instruction(vcpu
);
9828 return __kvm_emulate_halt(vcpu
, KVM_MP_STATE_AP_RESET_HOLD
,
9829 KVM_EXIT_AP_RESET_HOLD
) && ret
;
9831 EXPORT_SYMBOL_GPL(kvm_emulate_ap_reset_hold
);
9833 #ifdef CONFIG_X86_64
9834 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
9835 unsigned long clock_type
)
9837 struct kvm_clock_pairing clock_pairing
;
9838 struct timespec64 ts
;
9842 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
9843 return -KVM_EOPNOTSUPP
;
9846 * When tsc is in permanent catchup mode guests won't be able to use
9847 * pvclock_read_retry loop to get consistent view of pvclock
9849 if (vcpu
->arch
.tsc_always_catchup
)
9850 return -KVM_EOPNOTSUPP
;
9852 if (!kvm_get_walltime_and_clockread(&ts
, &cycle
))
9853 return -KVM_EOPNOTSUPP
;
9855 clock_pairing
.sec
= ts
.tv_sec
;
9856 clock_pairing
.nsec
= ts
.tv_nsec
;
9857 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
9858 clock_pairing
.flags
= 0;
9859 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
9862 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
9863 sizeof(struct kvm_clock_pairing
)))
9871 * kvm_pv_kick_cpu_op: Kick a vcpu.
9873 * @apicid - apicid of vcpu to be kicked.
9875 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, int apicid
)
9878 * All other fields are unused for APIC_DM_REMRD, but may be consumed by
9879 * common code, e.g. for tracing. Defer initialization to the compiler.
9881 struct kvm_lapic_irq lapic_irq
= {
9882 .delivery_mode
= APIC_DM_REMRD
,
9883 .dest_mode
= APIC_DEST_PHYSICAL
,
9884 .shorthand
= APIC_DEST_NOSHORT
,
9888 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
9891 bool kvm_apicv_activated(struct kvm
*kvm
)
9893 return (READ_ONCE(kvm
->arch
.apicv_inhibit_reasons
) == 0);
9895 EXPORT_SYMBOL_GPL(kvm_apicv_activated
);
9897 bool kvm_vcpu_apicv_activated(struct kvm_vcpu
*vcpu
)
9899 ulong vm_reasons
= READ_ONCE(vcpu
->kvm
->arch
.apicv_inhibit_reasons
);
9900 ulong vcpu_reasons
= static_call(kvm_x86_vcpu_get_apicv_inhibit_reasons
)(vcpu
);
9902 return (vm_reasons
| vcpu_reasons
) == 0;
9904 EXPORT_SYMBOL_GPL(kvm_vcpu_apicv_activated
);
9906 static void set_or_clear_apicv_inhibit(unsigned long *inhibits
,
9907 enum kvm_apicv_inhibit reason
, bool set
)
9910 __set_bit(reason
, inhibits
);
9912 __clear_bit(reason
, inhibits
);
9914 trace_kvm_apicv_inhibit_changed(reason
, set
, *inhibits
);
9917 static void kvm_apicv_init(struct kvm
*kvm
)
9919 unsigned long *inhibits
= &kvm
->arch
.apicv_inhibit_reasons
;
9921 init_rwsem(&kvm
->arch
.apicv_update_lock
);
9923 set_or_clear_apicv_inhibit(inhibits
, APICV_INHIBIT_REASON_ABSENT
, true);
9926 set_or_clear_apicv_inhibit(inhibits
,
9927 APICV_INHIBIT_REASON_DISABLE
, true);
9930 static void kvm_sched_yield(struct kvm_vcpu
*vcpu
, unsigned long dest_id
)
9932 struct kvm_vcpu
*target
= NULL
;
9933 struct kvm_apic_map
*map
;
9935 vcpu
->stat
.directed_yield_attempted
++;
9937 if (single_task_running())
9941 map
= rcu_dereference(vcpu
->kvm
->arch
.apic_map
);
9943 if (likely(map
) && dest_id
<= map
->max_apic_id
&& map
->phys_map
[dest_id
])
9944 target
= map
->phys_map
[dest_id
]->vcpu
;
9948 if (!target
|| !READ_ONCE(target
->ready
))
9951 /* Ignore requests to yield to self */
9955 if (kvm_vcpu_yield_to(target
) <= 0)
9958 vcpu
->stat
.directed_yield_successful
++;
9964 static int complete_hypercall_exit(struct kvm_vcpu
*vcpu
)
9966 u64 ret
= vcpu
->run
->hypercall
.ret
;
9968 if (!is_64_bit_mode(vcpu
))
9970 kvm_rax_write(vcpu
, ret
);
9971 ++vcpu
->stat
.hypercalls
;
9972 return kvm_skip_emulated_instruction(vcpu
);
9975 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
9977 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
9980 if (kvm_xen_hypercall_enabled(vcpu
->kvm
))
9981 return kvm_xen_hypercall(vcpu
);
9983 if (kvm_hv_hypercall_enabled(vcpu
))
9984 return kvm_hv_hypercall(vcpu
);
9986 nr
= kvm_rax_read(vcpu
);
9987 a0
= kvm_rbx_read(vcpu
);
9988 a1
= kvm_rcx_read(vcpu
);
9989 a2
= kvm_rdx_read(vcpu
);
9990 a3
= kvm_rsi_read(vcpu
);
9992 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
9994 op_64_bit
= is_64_bit_hypercall(vcpu
);
10003 if (static_call(kvm_x86_get_cpl
)(vcpu
) != 0) {
10011 case KVM_HC_VAPIC_POLL_IRQ
:
10014 case KVM_HC_KICK_CPU
:
10015 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_UNHALT
))
10018 kvm_pv_kick_cpu_op(vcpu
->kvm
, a1
);
10019 kvm_sched_yield(vcpu
, a1
);
10022 #ifdef CONFIG_X86_64
10023 case KVM_HC_CLOCK_PAIRING
:
10024 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
10027 case KVM_HC_SEND_IPI
:
10028 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SEND_IPI
))
10031 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
10033 case KVM_HC_SCHED_YIELD
:
10034 if (!guest_pv_has(vcpu
, KVM_FEATURE_PV_SCHED_YIELD
))
10037 kvm_sched_yield(vcpu
, a0
);
10040 case KVM_HC_MAP_GPA_RANGE
: {
10041 u64 gpa
= a0
, npages
= a1
, attrs
= a2
;
10044 if (!(vcpu
->kvm
->arch
.hypercall_exit_enabled
& (1 << KVM_HC_MAP_GPA_RANGE
)))
10047 if (!PAGE_ALIGNED(gpa
) || !npages
||
10048 gpa_to_gfn(gpa
) + npages
<= gpa_to_gfn(gpa
)) {
10053 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERCALL
;
10054 vcpu
->run
->hypercall
.nr
= KVM_HC_MAP_GPA_RANGE
;
10055 vcpu
->run
->hypercall
.args
[0] = gpa
;
10056 vcpu
->run
->hypercall
.args
[1] = npages
;
10057 vcpu
->run
->hypercall
.args
[2] = attrs
;
10058 vcpu
->run
->hypercall
.flags
= 0;
10060 vcpu
->run
->hypercall
.flags
|= KVM_EXIT_HYPERCALL_LONG_MODE
;
10062 WARN_ON_ONCE(vcpu
->run
->hypercall
.flags
& KVM_EXIT_HYPERCALL_MBZ
);
10063 vcpu
->arch
.complete_userspace_io
= complete_hypercall_exit
;
10073 kvm_rax_write(vcpu
, ret
);
10075 ++vcpu
->stat
.hypercalls
;
10076 return kvm_skip_emulated_instruction(vcpu
);
10078 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
10080 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
10082 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
10083 char instruction
[3];
10084 unsigned long rip
= kvm_rip_read(vcpu
);
10087 * If the quirk is disabled, synthesize a #UD and let the guest pick up
10090 if (!kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_FIX_HYPERCALL_INSN
)) {
10091 ctxt
->exception
.error_code_valid
= false;
10092 ctxt
->exception
.vector
= UD_VECTOR
;
10093 ctxt
->have_exception
= true;
10094 return X86EMUL_PROPAGATE_FAULT
;
10097 static_call(kvm_x86_patch_hypercall
)(vcpu
, instruction
);
10099 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
10103 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
10105 return vcpu
->run
->request_interrupt_window
&&
10106 likely(!pic_in_kernel(vcpu
->kvm
));
10109 /* Called within kvm->srcu read side. */
10110 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
10112 struct kvm_run
*kvm_run
= vcpu
->run
;
10114 kvm_run
->if_flag
= static_call(kvm_x86_get_if_flag
)(vcpu
);
10115 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
10116 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
10118 kvm_run
->ready_for_interrupt_injection
=
10119 pic_in_kernel(vcpu
->kvm
) ||
10120 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
10123 kvm_run
->flags
|= KVM_RUN_X86_SMM
;
10126 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
10130 if (!kvm_x86_ops
.update_cr8_intercept
)
10133 if (!lapic_in_kernel(vcpu
))
10136 if (vcpu
->arch
.apic
->apicv_active
)
10139 if (!vcpu
->arch
.apic
->vapic_addr
)
10140 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
10147 tpr
= kvm_lapic_get_cr8(vcpu
);
10149 static_call(kvm_x86_update_cr8_intercept
)(vcpu
, tpr
, max_irr
);
10153 int kvm_check_nested_events(struct kvm_vcpu
*vcpu
)
10155 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10156 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
10160 return kvm_x86_ops
.nested_ops
->check_events(vcpu
);
10163 static void kvm_inject_exception(struct kvm_vcpu
*vcpu
)
10166 * Suppress the error code if the vCPU is in Real Mode, as Real Mode
10167 * exceptions don't report error codes. The presence of an error code
10168 * is carried with the exception and only stripped when the exception
10169 * is injected as intercepted #PF VM-Exits for AMD's Paged Real Mode do
10170 * report an error code despite the CPU being in Real Mode.
10172 vcpu
->arch
.exception
.has_error_code
&= is_protmode(vcpu
);
10174 trace_kvm_inj_exception(vcpu
->arch
.exception
.vector
,
10175 vcpu
->arch
.exception
.has_error_code
,
10176 vcpu
->arch
.exception
.error_code
,
10177 vcpu
->arch
.exception
.injected
);
10179 static_call(kvm_x86_inject_exception
)(vcpu
);
10183 * Check for any event (interrupt or exception) that is ready to be injected,
10184 * and if there is at least one event, inject the event with the highest
10185 * priority. This handles both "pending" events, i.e. events that have never
10186 * been injected into the guest, and "injected" events, i.e. events that were
10187 * injected as part of a previous VM-Enter, but weren't successfully delivered
10188 * and need to be re-injected.
10190 * Note, this is not guaranteed to be invoked on a guest instruction boundary,
10191 * i.e. doesn't guarantee that there's an event window in the guest. KVM must
10192 * be able to inject exceptions in the "middle" of an instruction, and so must
10193 * also be able to re-inject NMIs and IRQs in the middle of an instruction.
10194 * I.e. for exceptions and re-injected events, NOT invoking this on instruction
10195 * boundaries is necessary and correct.
10197 * For simplicity, KVM uses a single path to inject all events (except events
10198 * that are injected directly from L1 to L2) and doesn't explicitly track
10199 * instruction boundaries for asynchronous events. However, because VM-Exits
10200 * that can occur during instruction execution typically result in KVM skipping
10201 * the instruction or injecting an exception, e.g. instruction and exception
10202 * intercepts, and because pending exceptions have higher priority than pending
10203 * interrupts, KVM still honors instruction boundaries in most scenarios.
10205 * But, if a VM-Exit occurs during instruction execution, and KVM does NOT skip
10206 * the instruction or inject an exception, then KVM can incorrecty inject a new
10207 * asynchrounous event if the event became pending after the CPU fetched the
10208 * instruction (in the guest). E.g. if a page fault (#PF, #NPF, EPT violation)
10209 * occurs and is resolved by KVM, a coincident NMI, SMI, IRQ, etc... can be
10210 * injected on the restarted instruction instead of being deferred until the
10211 * instruction completes.
10213 * In practice, this virtualization hole is unlikely to be observed by the
10214 * guest, and even less likely to cause functional problems. To detect the
10215 * hole, the guest would have to trigger an event on a side effect of an early
10216 * phase of instruction execution, e.g. on the instruction fetch from memory.
10217 * And for it to be a functional problem, the guest would need to depend on the
10218 * ordering between that side effect, the instruction completing, _and_ the
10219 * delivery of the asynchronous event.
10221 static int kvm_check_and_inject_events(struct kvm_vcpu
*vcpu
,
10222 bool *req_immediate_exit
)
10228 * Process nested events first, as nested VM-Exit supercedes event
10229 * re-injection. If there's an event queued for re-injection, it will
10230 * be saved into the appropriate vmc{b,s}12 fields on nested VM-Exit.
10232 if (is_guest_mode(vcpu
))
10233 r
= kvm_check_nested_events(vcpu
);
10238 * Re-inject exceptions and events *especially* if immediate entry+exit
10239 * to/from L2 is needed, as any event that has already been injected
10240 * into L2 needs to complete its lifecycle before injecting a new event.
10242 * Don't re-inject an NMI or interrupt if there is a pending exception.
10243 * This collision arises if an exception occurred while vectoring the
10244 * injected event, KVM intercepted said exception, and KVM ultimately
10245 * determined the fault belongs to the guest and queues the exception
10246 * for injection back into the guest.
10248 * "Injected" interrupts can also collide with pending exceptions if
10249 * userspace ignores the "ready for injection" flag and blindly queues
10250 * an interrupt. In that case, prioritizing the exception is correct,
10251 * as the exception "occurred" before the exit to userspace. Trap-like
10252 * exceptions, e.g. most #DBs, have higher priority than interrupts.
10253 * And while fault-like exceptions, e.g. #GP and #PF, are the lowest
10254 * priority, they're only generated (pended) during instruction
10255 * execution, and interrupts are recognized at instruction boundaries.
10256 * Thus a pending fault-like exception means the fault occurred on the
10257 * *previous* instruction and must be serviced prior to recognizing any
10258 * new events in order to fully complete the previous instruction.
10260 if (vcpu
->arch
.exception
.injected
)
10261 kvm_inject_exception(vcpu
);
10262 else if (kvm_is_exception_pending(vcpu
))
10264 else if (vcpu
->arch
.nmi_injected
)
10265 static_call(kvm_x86_inject_nmi
)(vcpu
);
10266 else if (vcpu
->arch
.interrupt
.injected
)
10267 static_call(kvm_x86_inject_irq
)(vcpu
, true);
10270 * Exceptions that morph to VM-Exits are handled above, and pending
10271 * exceptions on top of injected exceptions that do not VM-Exit should
10272 * either morph to #DF or, sadly, override the injected exception.
10274 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
&&
10275 vcpu
->arch
.exception
.pending
);
10278 * Bail if immediate entry+exit to/from the guest is needed to complete
10279 * nested VM-Enter or event re-injection so that a different pending
10280 * event can be serviced (or if KVM needs to exit to userspace).
10282 * Otherwise, continue processing events even if VM-Exit occurred. The
10283 * VM-Exit will have cleared exceptions that were meant for L2, but
10284 * there may now be events that can be injected into L1.
10290 * A pending exception VM-Exit should either result in nested VM-Exit
10291 * or force an immediate re-entry and exit to/from L2, and exception
10292 * VM-Exits cannot be injected (flag should _never_ be set).
10294 WARN_ON_ONCE(vcpu
->arch
.exception_vmexit
.injected
||
10295 vcpu
->arch
.exception_vmexit
.pending
);
10298 * New events, other than exceptions, cannot be injected if KVM needs
10299 * to re-inject a previous event. See above comments on re-injecting
10300 * for why pending exceptions get priority.
10302 can_inject
= !kvm_event_needs_reinjection(vcpu
);
10304 if (vcpu
->arch
.exception
.pending
) {
10306 * Fault-class exceptions, except #DBs, set RF=1 in the RFLAGS
10307 * value pushed on the stack. Trap-like exception and all #DBs
10308 * leave RF as-is (KVM follows Intel's behavior in this regard;
10309 * AMD states that code breakpoint #DBs excplitly clear RF=0).
10311 * Note, most versions of Intel's SDM and AMD's APM incorrectly
10312 * describe the behavior of General Detect #DBs, which are
10313 * fault-like. They do _not_ set RF, a la code breakpoints.
10315 if (exception_type(vcpu
->arch
.exception
.vector
) == EXCPT_FAULT
)
10316 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
10319 if (vcpu
->arch
.exception
.vector
== DB_VECTOR
) {
10320 kvm_deliver_exception_payload(vcpu
, &vcpu
->arch
.exception
);
10321 if (vcpu
->arch
.dr7
& DR7_GD
) {
10322 vcpu
->arch
.dr7
&= ~DR7_GD
;
10323 kvm_update_dr7(vcpu
);
10327 kvm_inject_exception(vcpu
);
10329 vcpu
->arch
.exception
.pending
= false;
10330 vcpu
->arch
.exception
.injected
= true;
10332 can_inject
= false;
10335 /* Don't inject interrupts if the user asked to avoid doing so */
10336 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
)
10340 * Finally, inject interrupt events. If an event cannot be injected
10341 * due to architectural conditions (e.g. IF=0) a window-open exit
10342 * will re-request KVM_REQ_EVENT. Sometimes however an event is pending
10343 * and can architecturally be injected, but we cannot do it right now:
10344 * an interrupt could have arrived just now and we have to inject it
10345 * as a vmexit, or there could already an event in the queue, which is
10346 * indicated by can_inject. In that case we request an immediate exit
10347 * in order to make progress and get back here for another iteration.
10348 * The kvm_x86_ops hooks communicate this by returning -EBUSY.
10350 #ifdef CONFIG_KVM_SMM
10351 if (vcpu
->arch
.smi_pending
) {
10352 r
= can_inject
? static_call(kvm_x86_smi_allowed
)(vcpu
, true) : -EBUSY
;
10356 vcpu
->arch
.smi_pending
= false;
10357 ++vcpu
->arch
.smi_count
;
10359 can_inject
= false;
10361 static_call(kvm_x86_enable_smi_window
)(vcpu
);
10365 if (vcpu
->arch
.nmi_pending
) {
10366 r
= can_inject
? static_call(kvm_x86_nmi_allowed
)(vcpu
, true) : -EBUSY
;
10370 --vcpu
->arch
.nmi_pending
;
10371 vcpu
->arch
.nmi_injected
= true;
10372 static_call(kvm_x86_inject_nmi
)(vcpu
);
10373 can_inject
= false;
10374 WARN_ON(static_call(kvm_x86_nmi_allowed
)(vcpu
, true) < 0);
10376 if (vcpu
->arch
.nmi_pending
)
10377 static_call(kvm_x86_enable_nmi_window
)(vcpu
);
10380 if (kvm_cpu_has_injectable_intr(vcpu
)) {
10381 r
= can_inject
? static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) : -EBUSY
;
10385 int irq
= kvm_cpu_get_interrupt(vcpu
);
10387 if (!WARN_ON_ONCE(irq
== -1)) {
10388 kvm_queue_interrupt(vcpu
, irq
, false);
10389 static_call(kvm_x86_inject_irq
)(vcpu
, false);
10390 WARN_ON(static_call(kvm_x86_interrupt_allowed
)(vcpu
, true) < 0);
10393 if (kvm_cpu_has_injectable_intr(vcpu
))
10394 static_call(kvm_x86_enable_irq_window
)(vcpu
);
10397 if (is_guest_mode(vcpu
) &&
10398 kvm_x86_ops
.nested_ops
->has_events
&&
10399 kvm_x86_ops
.nested_ops
->has_events(vcpu
))
10400 *req_immediate_exit
= true;
10403 * KVM must never queue a new exception while injecting an event; KVM
10404 * is done emulating and should only propagate the to-be-injected event
10405 * to the VMCS/VMCB. Queueing a new exception can put the vCPU into an
10406 * infinite loop as KVM will bail from VM-Enter to inject the pending
10407 * exception and start the cycle all over.
10409 * Exempt triple faults as they have special handling and won't put the
10410 * vCPU into an infinite loop. Triple fault can be queued when running
10411 * VMX without unrestricted guest, as that requires KVM to emulate Real
10412 * Mode events (see kvm_inject_realmode_interrupt()).
10414 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
||
10415 vcpu
->arch
.exception_vmexit
.pending
);
10420 *req_immediate_exit
= true;
10426 static void process_nmi(struct kvm_vcpu
*vcpu
)
10428 unsigned int limit
;
10431 * x86 is limited to one NMI pending, but because KVM can't react to
10432 * incoming NMIs as quickly as bare metal, e.g. if the vCPU is
10433 * scheduled out, KVM needs to play nice with two queued NMIs showing
10434 * up at the same time. To handle this scenario, allow two NMIs to be
10435 * (temporarily) pending so long as NMIs are not blocked and KVM is not
10436 * waiting for a previous NMI injection to complete (which effectively
10437 * blocks NMIs). KVM will immediately inject one of the two NMIs, and
10438 * will request an NMI window to handle the second NMI.
10440 if (static_call(kvm_x86_get_nmi_mask
)(vcpu
) || vcpu
->arch
.nmi_injected
)
10446 * Adjust the limit to account for pending virtual NMIs, which aren't
10447 * tracked in vcpu->arch.nmi_pending.
10449 if (static_call(kvm_x86_is_vnmi_pending
)(vcpu
))
10452 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
10453 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
10455 if (vcpu
->arch
.nmi_pending
&&
10456 (static_call(kvm_x86_set_vnmi_pending
)(vcpu
)))
10457 vcpu
->arch
.nmi_pending
--;
10459 if (vcpu
->arch
.nmi_pending
)
10460 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10463 /* Return total number of NMIs pending injection to the VM */
10464 int kvm_get_nr_pending_nmis(struct kvm_vcpu
*vcpu
)
10466 return vcpu
->arch
.nmi_pending
+
10467 static_call(kvm_x86_is_vnmi_pending
)(vcpu
);
10470 void kvm_make_scan_ioapic_request_mask(struct kvm
*kvm
,
10471 unsigned long *vcpu_bitmap
)
10473 kvm_make_vcpus_request_mask(kvm
, KVM_REQ_SCAN_IOAPIC
, vcpu_bitmap
);
10476 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
10478 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
10481 void __kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
10483 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
10486 if (!lapic_in_kernel(vcpu
))
10489 down_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
10492 /* Do not activate APICV when APIC is disabled */
10493 activate
= kvm_vcpu_apicv_activated(vcpu
) &&
10494 (kvm_get_apic_mode(vcpu
) != LAPIC_MODE_DISABLED
);
10496 if (apic
->apicv_active
== activate
)
10499 apic
->apicv_active
= activate
;
10500 kvm_apic_update_apicv(vcpu
);
10501 static_call(kvm_x86_refresh_apicv_exec_ctrl
)(vcpu
);
10504 * When APICv gets disabled, we may still have injected interrupts
10505 * pending. At the same time, KVM_REQ_EVENT may not be set as APICv was
10506 * still active when the interrupt got accepted. Make sure
10507 * kvm_check_and_inject_events() is called to check for that.
10509 if (!apic
->apicv_active
)
10510 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10514 up_read(&vcpu
->kvm
->arch
.apicv_update_lock
);
10516 EXPORT_SYMBOL_GPL(__kvm_vcpu_update_apicv
);
10518 static void kvm_vcpu_update_apicv(struct kvm_vcpu
*vcpu
)
10520 if (!lapic_in_kernel(vcpu
))
10524 * Due to sharing page tables across vCPUs, the xAPIC memslot must be
10525 * deleted if any vCPU has xAPIC virtualization and x2APIC enabled, but
10526 * and hardware doesn't support x2APIC virtualization. E.g. some AMD
10527 * CPUs support AVIC but not x2APIC. KVM still allows enabling AVIC in
10528 * this case so that KVM can the AVIC doorbell to inject interrupts to
10529 * running vCPUs, but KVM must not create SPTEs for the APIC base as
10530 * the vCPU would incorrectly be able to access the vAPIC page via MMIO
10531 * despite being in x2APIC mode. For simplicity, inhibiting the APIC
10532 * access page is sticky.
10534 if (apic_x2apic_mode(vcpu
->arch
.apic
) &&
10535 kvm_x86_ops
.allow_apicv_in_x2apic_without_x2apic_virtualization
)
10536 kvm_inhibit_apic_access_page(vcpu
);
10538 __kvm_vcpu_update_apicv(vcpu
);
10541 void __kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
10542 enum kvm_apicv_inhibit reason
, bool set
)
10544 unsigned long old
, new;
10546 lockdep_assert_held_write(&kvm
->arch
.apicv_update_lock
);
10548 if (!(kvm_x86_ops
.required_apicv_inhibits
& BIT(reason
)))
10551 old
= new = kvm
->arch
.apicv_inhibit_reasons
;
10553 set_or_clear_apicv_inhibit(&new, reason
, set
);
10555 if (!!old
!= !!new) {
10557 * Kick all vCPUs before setting apicv_inhibit_reasons to avoid
10558 * false positives in the sanity check WARN in svm_vcpu_run().
10559 * This task will wait for all vCPUs to ack the kick IRQ before
10560 * updating apicv_inhibit_reasons, and all other vCPUs will
10561 * block on acquiring apicv_update_lock so that vCPUs can't
10562 * redo svm_vcpu_run() without seeing the new inhibit state.
10564 * Note, holding apicv_update_lock and taking it in the read
10565 * side (handling the request) also prevents other vCPUs from
10566 * servicing the request with a stale apicv_inhibit_reasons.
10568 kvm_make_all_cpus_request(kvm
, KVM_REQ_APICV_UPDATE
);
10569 kvm
->arch
.apicv_inhibit_reasons
= new;
10571 unsigned long gfn
= gpa_to_gfn(APIC_DEFAULT_PHYS_BASE
);
10572 int idx
= srcu_read_lock(&kvm
->srcu
);
10574 kvm_zap_gfn_range(kvm
, gfn
, gfn
+1);
10575 srcu_read_unlock(&kvm
->srcu
, idx
);
10578 kvm
->arch
.apicv_inhibit_reasons
= new;
10582 void kvm_set_or_clear_apicv_inhibit(struct kvm
*kvm
,
10583 enum kvm_apicv_inhibit reason
, bool set
)
10588 down_write(&kvm
->arch
.apicv_update_lock
);
10589 __kvm_set_or_clear_apicv_inhibit(kvm
, reason
, set
);
10590 up_write(&kvm
->arch
.apicv_update_lock
);
10592 EXPORT_SYMBOL_GPL(kvm_set_or_clear_apicv_inhibit
);
10594 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
10596 if (!kvm_apic_present(vcpu
))
10599 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
10601 if (irqchip_split(vcpu
->kvm
))
10602 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
10604 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10605 if (ioapic_in_kernel(vcpu
->kvm
))
10606 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
10609 if (is_guest_mode(vcpu
))
10610 vcpu
->arch
.load_eoi_exitmap_pending
= true;
10612 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
10615 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
10617 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
10620 #ifdef CONFIG_KVM_HYPERV
10621 if (to_hv_vcpu(vcpu
)) {
10622 u64 eoi_exit_bitmap
[4];
10624 bitmap_or((ulong
*)eoi_exit_bitmap
,
10625 vcpu
->arch
.ioapic_handled_vectors
,
10626 to_hv_synic(vcpu
)->vec_bitmap
, 256);
10627 static_call_cond(kvm_x86_load_eoi_exitmap
)(vcpu
, eoi_exit_bitmap
);
10631 static_call_cond(kvm_x86_load_eoi_exitmap
)(
10632 vcpu
, (u64
*)vcpu
->arch
.ioapic_handled_vectors
);
10635 void kvm_arch_guest_memory_reclaimed(struct kvm
*kvm
)
10637 static_call_cond(kvm_x86_guest_memory_reclaimed
)(kvm
);
10640 static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
10642 if (!lapic_in_kernel(vcpu
))
10645 static_call_cond(kvm_x86_set_apic_access_page_addr
)(vcpu
);
10648 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
10650 smp_send_reschedule(vcpu
->cpu
);
10652 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
10655 * Called within kvm->srcu read side.
10656 * Returns 1 to let vcpu_run() continue the guest execution loop without
10657 * exiting to the userspace. Otherwise, the value will be returned to the
10660 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
10664 dm_request_for_irq_injection(vcpu
) &&
10665 kvm_cpu_accept_dm_intr(vcpu
);
10666 fastpath_t exit_fastpath
;
10668 bool req_immediate_exit
= false;
10670 if (kvm_request_pending(vcpu
)) {
10671 if (kvm_check_request(KVM_REQ_VM_DEAD
, vcpu
)) {
10676 if (kvm_dirty_ring_check_request(vcpu
)) {
10681 if (kvm_check_request(KVM_REQ_GET_NESTED_STATE_PAGES
, vcpu
)) {
10682 if (unlikely(!kvm_x86_ops
.nested_ops
->get_nested_state_pages(vcpu
))) {
10687 if (kvm_check_request(KVM_REQ_MMU_FREE_OBSOLETE_ROOTS
, vcpu
))
10688 kvm_mmu_free_obsolete_roots(vcpu
);
10689 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
10690 __kvm_migrate_timers(vcpu
);
10691 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
10692 kvm_update_masterclock(vcpu
->kvm
);
10693 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
10694 kvm_gen_kvmclock_update(vcpu
);
10695 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
10696 r
= kvm_guest_time_update(vcpu
);
10700 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
10701 kvm_mmu_sync_roots(vcpu
);
10702 if (kvm_check_request(KVM_REQ_LOAD_MMU_PGD
, vcpu
))
10703 kvm_mmu_load_pgd(vcpu
);
10706 * Note, the order matters here, as flushing "all" TLB entries
10707 * also flushes the "current" TLB entries, i.e. servicing the
10708 * flush "all" will clear any request to flush "current".
10710 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
10711 kvm_vcpu_flush_tlb_all(vcpu
);
10713 kvm_service_local_tlb_flush_requests(vcpu
);
10716 * Fall back to a "full" guest flush if Hyper-V's precise
10717 * flushing fails. Note, Hyper-V's flushing is per-vCPU, but
10718 * the flushes are considered "remote" and not "local" because
10719 * the requests can be initiated from other vCPUs.
10721 #ifdef CONFIG_KVM_HYPERV
10722 if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH
, vcpu
) &&
10723 kvm_hv_vcpu_flush_tlb(vcpu
))
10724 kvm_vcpu_flush_tlb_guest(vcpu
);
10727 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
10728 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
10732 if (kvm_test_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10733 if (is_guest_mode(vcpu
))
10734 kvm_x86_ops
.nested_ops
->triple_fault(vcpu
);
10736 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
10737 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
10738 vcpu
->mmio_needed
= 0;
10743 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
10744 /* Page is swapped out. Do synthetic halt */
10745 vcpu
->arch
.apf
.halted
= true;
10749 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
10750 record_steal_time(vcpu
);
10751 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
10752 kvm_pmu_handle_event(vcpu
);
10753 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
10754 kvm_pmu_deliver_pmi(vcpu
);
10755 #ifdef CONFIG_KVM_SMM
10756 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
10759 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
10761 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
10762 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
10763 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
10764 vcpu
->arch
.ioapic_handled_vectors
)) {
10765 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
10766 vcpu
->run
->eoi
.vector
=
10767 vcpu
->arch
.pending_ioapic_eoi
;
10772 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
10773 vcpu_scan_ioapic(vcpu
);
10774 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
10775 vcpu_load_eoi_exitmap(vcpu
);
10776 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
10777 kvm_vcpu_reload_apic_access_page(vcpu
);
10778 #ifdef CONFIG_KVM_HYPERV
10779 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
10780 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10781 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
10782 vcpu
->run
->system_event
.ndata
= 0;
10786 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
10787 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
10788 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
10789 vcpu
->run
->system_event
.ndata
= 0;
10793 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
10794 struct kvm_vcpu_hv
*hv_vcpu
= to_hv_vcpu(vcpu
);
10796 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
10797 vcpu
->run
->hyperv
= hv_vcpu
->exit
;
10803 * KVM_REQ_HV_STIMER has to be processed after
10804 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
10805 * depend on the guest clock being up-to-date
10807 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
10808 kvm_hv_process_stimers(vcpu
);
10810 if (kvm_check_request(KVM_REQ_APICV_UPDATE
, vcpu
))
10811 kvm_vcpu_update_apicv(vcpu
);
10812 if (kvm_check_request(KVM_REQ_APF_READY
, vcpu
))
10813 kvm_check_async_pf_completion(vcpu
);
10814 if (kvm_check_request(KVM_REQ_MSR_FILTER_CHANGED
, vcpu
))
10815 static_call(kvm_x86_msr_filter_changed
)(vcpu
);
10817 if (kvm_check_request(KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
, vcpu
))
10818 static_call(kvm_x86_update_cpu_dirty_logging
)(vcpu
);
10821 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
||
10822 kvm_xen_has_interrupt(vcpu
)) {
10823 ++vcpu
->stat
.req_event
;
10824 r
= kvm_apic_accept_events(vcpu
);
10829 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
10834 r
= kvm_check_and_inject_events(vcpu
, &req_immediate_exit
);
10840 static_call(kvm_x86_enable_irq_window
)(vcpu
);
10842 if (kvm_lapic_enabled(vcpu
)) {
10843 update_cr8_intercept(vcpu
);
10844 kvm_lapic_sync_to_vapic(vcpu
);
10848 r
= kvm_mmu_reload(vcpu
);
10850 goto cancel_injection
;
10855 static_call(kvm_x86_prepare_switch_to_guest
)(vcpu
);
10858 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
10859 * IPI are then delayed after guest entry, which ensures that they
10860 * result in virtual interrupt delivery.
10862 local_irq_disable();
10864 /* Store vcpu->apicv_active before vcpu->mode. */
10865 smp_store_release(&vcpu
->mode
, IN_GUEST_MODE
);
10867 kvm_vcpu_srcu_read_unlock(vcpu
);
10870 * 1) We should set ->mode before checking ->requests. Please see
10871 * the comment in kvm_vcpu_exiting_guest_mode().
10873 * 2) For APICv, we should set ->mode before checking PID.ON. This
10874 * pairs with the memory barrier implicit in pi_test_and_set_on
10875 * (see vmx_deliver_posted_interrupt).
10877 * 3) This also orders the write to mode from any reads to the page
10878 * tables done while the VCPU is running. Please see the comment
10879 * in kvm_flush_remote_tlbs.
10881 smp_mb__after_srcu_read_unlock();
10884 * Process pending posted interrupts to handle the case where the
10885 * notification IRQ arrived in the host, or was never sent (because the
10886 * target vCPU wasn't running). Do this regardless of the vCPU's APICv
10887 * status, KVM doesn't update assigned devices when APICv is inhibited,
10888 * i.e. they can post interrupts even if APICv is temporarily disabled.
10890 if (kvm_lapic_enabled(vcpu
))
10891 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10893 if (kvm_vcpu_exit_request(vcpu
)) {
10894 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
10896 local_irq_enable();
10898 kvm_vcpu_srcu_read_lock(vcpu
);
10900 goto cancel_injection
;
10903 if (req_immediate_exit
) {
10904 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
10905 static_call(kvm_x86_request_immediate_exit
)(vcpu
);
10908 fpregs_assert_state_consistent();
10909 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
10910 switch_fpu_return();
10912 if (vcpu
->arch
.guest_fpu
.xfd_err
)
10913 wrmsrl(MSR_IA32_XFD_ERR
, vcpu
->arch
.guest_fpu
.xfd_err
);
10915 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
10916 set_debugreg(0, 7);
10917 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
10918 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
10919 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
10920 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
10921 } else if (unlikely(hw_breakpoint_active())) {
10922 set_debugreg(0, 7);
10925 guest_timing_enter_irqoff();
10929 * Assert that vCPU vs. VM APICv state is consistent. An APICv
10930 * update must kick and wait for all vCPUs before toggling the
10931 * per-VM state, and responsing vCPUs must wait for the update
10932 * to complete before servicing KVM_REQ_APICV_UPDATE.
10934 WARN_ON_ONCE((kvm_vcpu_apicv_activated(vcpu
) != kvm_vcpu_apicv_active(vcpu
)) &&
10935 (kvm_get_apic_mode(vcpu
) != LAPIC_MODE_DISABLED
));
10937 exit_fastpath
= static_call(kvm_x86_vcpu_run
)(vcpu
);
10938 if (likely(exit_fastpath
!= EXIT_FASTPATH_REENTER_GUEST
))
10941 if (kvm_lapic_enabled(vcpu
))
10942 static_call_cond(kvm_x86_sync_pir_to_irr
)(vcpu
);
10944 if (unlikely(kvm_vcpu_exit_request(vcpu
))) {
10945 exit_fastpath
= EXIT_FASTPATH_EXIT_HANDLED
;
10949 /* Note, VM-Exits that go down the "slow" path are accounted below. */
10950 ++vcpu
->stat
.exits
;
10954 * Do this here before restoring debug registers on the host. And
10955 * since we do this before handling the vmexit, a DR access vmexit
10956 * can (a) read the correct value of the debug registers, (b) set
10957 * KVM_DEBUGREG_WONT_EXIT again.
10959 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
10960 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
10961 static_call(kvm_x86_sync_dirty_debug_regs
)(vcpu
);
10962 kvm_update_dr0123(vcpu
);
10963 kvm_update_dr7(vcpu
);
10967 * If the guest has used debug registers, at least dr7
10968 * will be disabled while returning to the host.
10969 * If we don't have active breakpoints in the host, we don't
10970 * care about the messed up debug address registers. But if
10971 * we have some of them active, restore the old state.
10973 if (hw_breakpoint_active())
10974 hw_breakpoint_restore();
10976 vcpu
->arch
.last_vmentry_cpu
= vcpu
->cpu
;
10977 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
10979 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
10983 * Sync xfd before calling handle_exit_irqoff() which may
10984 * rely on the fact that guest_fpu::xfd is up-to-date (e.g.
10985 * in #NM irqoff handler).
10987 if (vcpu
->arch
.xfd_no_write_intercept
)
10988 fpu_sync_guest_vmexit_xfd_state();
10990 static_call(kvm_x86_handle_exit_irqoff
)(vcpu
);
10992 if (vcpu
->arch
.guest_fpu
.xfd_err
)
10993 wrmsrl(MSR_IA32_XFD_ERR
, 0);
10996 * Consume any pending interrupts, including the possible source of
10997 * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
10998 * An instruction is required after local_irq_enable() to fully unblock
10999 * interrupts on processors that implement an interrupt shadow, the
11000 * stat.exits increment will do nicely.
11002 kvm_before_interrupt(vcpu
, KVM_HANDLING_IRQ
);
11003 local_irq_enable();
11004 ++vcpu
->stat
.exits
;
11005 local_irq_disable();
11006 kvm_after_interrupt(vcpu
);
11009 * Wait until after servicing IRQs to account guest time so that any
11010 * ticks that occurred while running the guest are properly accounted
11011 * to the guest. Waiting until IRQs are enabled degrades the accuracy
11012 * of accounting via context tracking, but the loss of accuracy is
11013 * acceptable for all known use cases.
11015 guest_timing_exit_irqoff();
11017 local_irq_enable();
11020 kvm_vcpu_srcu_read_lock(vcpu
);
11023 * Profile KVM exit RIPs:
11025 if (unlikely(prof_on
== KVM_PROFILING
)) {
11026 unsigned long rip
= kvm_rip_read(vcpu
);
11027 profile_hit(KVM_PROFILING
, (void *)rip
);
11030 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
11031 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
11033 if (vcpu
->arch
.apic_attention
)
11034 kvm_lapic_sync_from_vapic(vcpu
);
11036 r
= static_call(kvm_x86_handle_exit
)(vcpu
, exit_fastpath
);
11040 if (req_immediate_exit
)
11041 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11042 static_call(kvm_x86_cancel_injection
)(vcpu
);
11043 if (unlikely(vcpu
->arch
.apic_attention
))
11044 kvm_lapic_sync_from_vapic(vcpu
);
11049 /* Called within kvm->srcu read side. */
11050 static inline int vcpu_block(struct kvm_vcpu
*vcpu
)
11054 if (!kvm_arch_vcpu_runnable(vcpu
)) {
11056 * Switch to the software timer before halt-polling/blocking as
11057 * the guest's timer may be a break event for the vCPU, and the
11058 * hypervisor timer runs only when the CPU is in guest mode.
11059 * Switch before halt-polling so that KVM recognizes an expired
11060 * timer before blocking.
11062 hv_timer
= kvm_lapic_hv_timer_in_use(vcpu
);
11064 kvm_lapic_switch_to_sw_timer(vcpu
);
11066 kvm_vcpu_srcu_read_unlock(vcpu
);
11067 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
)
11068 kvm_vcpu_halt(vcpu
);
11070 kvm_vcpu_block(vcpu
);
11071 kvm_vcpu_srcu_read_lock(vcpu
);
11074 kvm_lapic_switch_to_hv_timer(vcpu
);
11077 * If the vCPU is not runnable, a signal or another host event
11078 * of some kind is pending; service it without changing the
11079 * vCPU's activity state.
11081 if (!kvm_arch_vcpu_runnable(vcpu
))
11086 * Evaluate nested events before exiting the halted state. This allows
11087 * the halt state to be recorded properly in the VMCS12's activity
11088 * state field (AMD does not have a similar field and a VM-Exit always
11089 * causes a spurious wakeup from HLT).
11091 if (is_guest_mode(vcpu
)) {
11092 if (kvm_check_nested_events(vcpu
) < 0)
11096 if (kvm_apic_accept_events(vcpu
) < 0)
11098 switch(vcpu
->arch
.mp_state
) {
11099 case KVM_MP_STATE_HALTED
:
11100 case KVM_MP_STATE_AP_RESET_HOLD
:
11101 vcpu
->arch
.pv
.pv_unhalted
= false;
11102 vcpu
->arch
.mp_state
=
11103 KVM_MP_STATE_RUNNABLE
;
11105 case KVM_MP_STATE_RUNNABLE
:
11106 vcpu
->arch
.apf
.halted
= false;
11108 case KVM_MP_STATE_INIT_RECEIVED
:
11117 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
11119 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
11120 !vcpu
->arch
.apf
.halted
);
11123 /* Called within kvm->srcu read side. */
11124 static int vcpu_run(struct kvm_vcpu
*vcpu
)
11128 vcpu
->run
->exit_reason
= KVM_EXIT_UNKNOWN
;
11129 vcpu
->arch
.l1tf_flush_l1d
= true;
11133 * If another guest vCPU requests a PV TLB flush in the middle
11134 * of instruction emulation, the rest of the emulation could
11135 * use a stale page translation. Assume that any code after
11136 * this point can start executing an instruction.
11138 vcpu
->arch
.at_instruction_boundary
= false;
11139 if (kvm_vcpu_running(vcpu
)) {
11140 r
= vcpu_enter_guest(vcpu
);
11142 r
= vcpu_block(vcpu
);
11148 kvm_clear_request(KVM_REQ_UNBLOCK
, vcpu
);
11149 if (kvm_xen_has_pending_events(vcpu
))
11150 kvm_xen_inject_pending_events(vcpu
);
11152 if (kvm_cpu_has_pending_timer(vcpu
))
11153 kvm_inject_pending_timer_irqs(vcpu
);
11155 if (dm_request_for_irq_injection(vcpu
) &&
11156 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
11158 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
11159 ++vcpu
->stat
.request_irq_exits
;
11163 if (__xfer_to_guest_mode_work_pending()) {
11164 kvm_vcpu_srcu_read_unlock(vcpu
);
11165 r
= xfer_to_guest_mode_handle_work(vcpu
);
11166 kvm_vcpu_srcu_read_lock(vcpu
);
11175 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
11177 return kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
11180 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
11182 BUG_ON(!vcpu
->arch
.pio
.count
);
11184 return complete_emulated_io(vcpu
);
11188 * Implements the following, as a state machine:
11191 * for each fragment
11192 * for each mmio piece in the fragment
11199 * for each fragment
11200 * for each mmio piece in the fragment
11205 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
11207 struct kvm_run
*run
= vcpu
->run
;
11208 struct kvm_mmio_fragment
*frag
;
11211 BUG_ON(!vcpu
->mmio_needed
);
11213 /* Complete previous fragment */
11214 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
11215 len
= min(8u, frag
->len
);
11216 if (!vcpu
->mmio_is_write
)
11217 memcpy(frag
->data
, run
->mmio
.data
, len
);
11219 if (frag
->len
<= 8) {
11220 /* Switch to the next fragment. */
11222 vcpu
->mmio_cur_fragment
++;
11224 /* Go forward to the next mmio piece. */
11230 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
11231 vcpu
->mmio_needed
= 0;
11233 /* FIXME: return into emulator if single-stepping. */
11234 if (vcpu
->mmio_is_write
)
11236 vcpu
->mmio_read_completed
= 1;
11237 return complete_emulated_io(vcpu
);
11240 run
->exit_reason
= KVM_EXIT_MMIO
;
11241 run
->mmio
.phys_addr
= frag
->gpa
;
11242 if (vcpu
->mmio_is_write
)
11243 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
11244 run
->mmio
.len
= min(8u, frag
->len
);
11245 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
11246 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
11250 /* Swap (qemu) user FPU context for the guest FPU context. */
11251 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
11253 /* Exclude PKRU, it's restored separately immediately after VM-Exit. */
11254 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, true);
11258 /* When vcpu_run ends, restore user space FPU context. */
11259 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
11261 fpu_swap_kvm_fpstate(&vcpu
->arch
.guest_fpu
, false);
11262 ++vcpu
->stat
.fpu_reload
;
11266 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
)
11268 struct kvm_queued_exception
*ex
= &vcpu
->arch
.exception
;
11269 struct kvm_run
*kvm_run
= vcpu
->run
;
11273 kvm_sigset_activate(vcpu
);
11274 kvm_run
->flags
= 0;
11275 kvm_load_guest_fpu(vcpu
);
11277 kvm_vcpu_srcu_read_lock(vcpu
);
11278 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
11279 if (kvm_run
->immediate_exit
) {
11285 * Don't bother switching APIC timer emulation from the
11286 * hypervisor timer to the software timer, the only way for the
11287 * APIC timer to be active is if userspace stuffed vCPU state,
11288 * i.e. put the vCPU into a nonsensical state. Only an INIT
11289 * will transition the vCPU out of UNINITIALIZED (without more
11290 * state stuffing from userspace), which will reset the local
11291 * APIC and thus cancel the timer or drop the IRQ (if the timer
11292 * already expired).
11294 kvm_vcpu_srcu_read_unlock(vcpu
);
11295 kvm_vcpu_block(vcpu
);
11296 kvm_vcpu_srcu_read_lock(vcpu
);
11298 if (kvm_apic_accept_events(vcpu
) < 0) {
11303 if (signal_pending(current
)) {
11305 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
11306 ++vcpu
->stat
.signal_exits
;
11311 if ((kvm_run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) ||
11312 (kvm_run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)) {
11317 if (kvm_run
->kvm_dirty_regs
) {
11318 r
= sync_regs(vcpu
);
11323 /* re-sync apic's tpr */
11324 if (!lapic_in_kernel(vcpu
)) {
11325 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
11332 * If userspace set a pending exception and L2 is active, convert it to
11333 * a pending VM-Exit if L1 wants to intercept the exception.
11335 if (vcpu
->arch
.exception_from_userspace
&& is_guest_mode(vcpu
) &&
11336 kvm_x86_ops
.nested_ops
->is_exception_vmexit(vcpu
, ex
->vector
,
11338 kvm_queue_exception_vmexit(vcpu
, ex
->vector
,
11339 ex
->has_error_code
, ex
->error_code
,
11340 ex
->has_payload
, ex
->payload
);
11341 ex
->injected
= false;
11342 ex
->pending
= false;
11344 vcpu
->arch
.exception_from_userspace
= false;
11346 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
11347 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
11348 vcpu
->arch
.complete_userspace_io
= NULL
;
11353 WARN_ON_ONCE(vcpu
->arch
.pio
.count
);
11354 WARN_ON_ONCE(vcpu
->mmio_needed
);
11357 if (kvm_run
->immediate_exit
) {
11362 r
= static_call(kvm_x86_vcpu_pre_run
)(vcpu
);
11366 r
= vcpu_run(vcpu
);
11369 kvm_put_guest_fpu(vcpu
);
11370 if (kvm_run
->kvm_valid_regs
)
11372 post_kvm_run_save(vcpu
);
11373 kvm_vcpu_srcu_read_unlock(vcpu
);
11375 kvm_sigset_deactivate(vcpu
);
11380 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11382 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
11384 * We are here if userspace calls get_regs() in the middle of
11385 * instruction emulation. Registers state needs to be copied
11386 * back from emulation context to vcpu. Userspace shouldn't do
11387 * that usually, but some bad designed PV devices (vmware
11388 * backdoor interface) need this to work
11390 emulator_writeback_register_cache(vcpu
->arch
.emulate_ctxt
);
11391 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
11393 regs
->rax
= kvm_rax_read(vcpu
);
11394 regs
->rbx
= kvm_rbx_read(vcpu
);
11395 regs
->rcx
= kvm_rcx_read(vcpu
);
11396 regs
->rdx
= kvm_rdx_read(vcpu
);
11397 regs
->rsi
= kvm_rsi_read(vcpu
);
11398 regs
->rdi
= kvm_rdi_read(vcpu
);
11399 regs
->rsp
= kvm_rsp_read(vcpu
);
11400 regs
->rbp
= kvm_rbp_read(vcpu
);
11401 #ifdef CONFIG_X86_64
11402 regs
->r8
= kvm_r8_read(vcpu
);
11403 regs
->r9
= kvm_r9_read(vcpu
);
11404 regs
->r10
= kvm_r10_read(vcpu
);
11405 regs
->r11
= kvm_r11_read(vcpu
);
11406 regs
->r12
= kvm_r12_read(vcpu
);
11407 regs
->r13
= kvm_r13_read(vcpu
);
11408 regs
->r14
= kvm_r14_read(vcpu
);
11409 regs
->r15
= kvm_r15_read(vcpu
);
11412 regs
->rip
= kvm_rip_read(vcpu
);
11413 regs
->rflags
= kvm_get_rflags(vcpu
);
11416 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11419 __get_regs(vcpu
, regs
);
11424 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11426 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
11427 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
11429 kvm_rax_write(vcpu
, regs
->rax
);
11430 kvm_rbx_write(vcpu
, regs
->rbx
);
11431 kvm_rcx_write(vcpu
, regs
->rcx
);
11432 kvm_rdx_write(vcpu
, regs
->rdx
);
11433 kvm_rsi_write(vcpu
, regs
->rsi
);
11434 kvm_rdi_write(vcpu
, regs
->rdi
);
11435 kvm_rsp_write(vcpu
, regs
->rsp
);
11436 kvm_rbp_write(vcpu
, regs
->rbp
);
11437 #ifdef CONFIG_X86_64
11438 kvm_r8_write(vcpu
, regs
->r8
);
11439 kvm_r9_write(vcpu
, regs
->r9
);
11440 kvm_r10_write(vcpu
, regs
->r10
);
11441 kvm_r11_write(vcpu
, regs
->r11
);
11442 kvm_r12_write(vcpu
, regs
->r12
);
11443 kvm_r13_write(vcpu
, regs
->r13
);
11444 kvm_r14_write(vcpu
, regs
->r14
);
11445 kvm_r15_write(vcpu
, regs
->r15
);
11448 kvm_rip_write(vcpu
, regs
->rip
);
11449 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
11451 vcpu
->arch
.exception
.pending
= false;
11452 vcpu
->arch
.exception_vmexit
.pending
= false;
11454 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11457 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
11460 __set_regs(vcpu
, regs
);
11465 static void __get_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11467 struct desc_ptr dt
;
11469 if (vcpu
->arch
.guest_state_protected
)
11470 goto skip_protected_regs
;
11472 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
11473 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
11474 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
11475 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
11476 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
11477 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
11479 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
11480 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
11482 static_call(kvm_x86_get_idt
)(vcpu
, &dt
);
11483 sregs
->idt
.limit
= dt
.size
;
11484 sregs
->idt
.base
= dt
.address
;
11485 static_call(kvm_x86_get_gdt
)(vcpu
, &dt
);
11486 sregs
->gdt
.limit
= dt
.size
;
11487 sregs
->gdt
.base
= dt
.address
;
11489 sregs
->cr2
= vcpu
->arch
.cr2
;
11490 sregs
->cr3
= kvm_read_cr3(vcpu
);
11492 skip_protected_regs
:
11493 sregs
->cr0
= kvm_read_cr0(vcpu
);
11494 sregs
->cr4
= kvm_read_cr4(vcpu
);
11495 sregs
->cr8
= kvm_get_cr8(vcpu
);
11496 sregs
->efer
= vcpu
->arch
.efer
;
11497 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
11500 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11502 __get_sregs_common(vcpu
, sregs
);
11504 if (vcpu
->arch
.guest_state_protected
)
11507 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
11508 set_bit(vcpu
->arch
.interrupt
.nr
,
11509 (unsigned long *)sregs
->interrupt_bitmap
);
11512 static void __get_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
11516 __get_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
);
11518 if (vcpu
->arch
.guest_state_protected
)
11521 if (is_pae_paging(vcpu
)) {
11522 for (i
= 0 ; i
< 4 ; i
++)
11523 sregs2
->pdptrs
[i
] = kvm_pdptr_read(vcpu
, i
);
11524 sregs2
->flags
|= KVM_SREGS2_FLAGS_PDPTRS_VALID
;
11528 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
11529 struct kvm_sregs
*sregs
)
11532 __get_sregs(vcpu
, sregs
);
11537 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
11538 struct kvm_mp_state
*mp_state
)
11543 if (kvm_mpx_supported())
11544 kvm_load_guest_fpu(vcpu
);
11546 r
= kvm_apic_accept_events(vcpu
);
11551 if ((vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
||
11552 vcpu
->arch
.mp_state
== KVM_MP_STATE_AP_RESET_HOLD
) &&
11553 vcpu
->arch
.pv
.pv_unhalted
)
11554 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
11556 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
11559 if (kvm_mpx_supported())
11560 kvm_put_guest_fpu(vcpu
);
11565 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
11566 struct kvm_mp_state
*mp_state
)
11572 switch (mp_state
->mp_state
) {
11573 case KVM_MP_STATE_UNINITIALIZED
:
11574 case KVM_MP_STATE_HALTED
:
11575 case KVM_MP_STATE_AP_RESET_HOLD
:
11576 case KVM_MP_STATE_INIT_RECEIVED
:
11577 case KVM_MP_STATE_SIPI_RECEIVED
:
11578 if (!lapic_in_kernel(vcpu
))
11582 case KVM_MP_STATE_RUNNABLE
:
11590 * Pending INITs are reported using KVM_SET_VCPU_EVENTS, disallow
11591 * forcing the guest into INIT/SIPI if those events are supposed to be
11592 * blocked. KVM prioritizes SMI over INIT, so reject INIT/SIPI state
11593 * if an SMI is pending as well.
11595 if ((!kvm_apic_init_sipi_allowed(vcpu
) || vcpu
->arch
.smi_pending
) &&
11596 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
11597 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
11600 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
11601 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
11602 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
11604 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
11605 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11613 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
11614 int reason
, bool has_error_code
, u32 error_code
)
11616 struct x86_emulate_ctxt
*ctxt
= vcpu
->arch
.emulate_ctxt
;
11619 init_emulate_ctxt(vcpu
);
11621 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
11622 has_error_code
, error_code
);
11624 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
11625 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
11626 vcpu
->run
->internal
.ndata
= 0;
11630 kvm_rip_write(vcpu
, ctxt
->eip
);
11631 kvm_set_rflags(vcpu
, ctxt
->eflags
);
11634 EXPORT_SYMBOL_GPL(kvm_task_switch
);
11636 static bool kvm_is_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11638 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
11640 * When EFER.LME and CR0.PG are set, the processor is in
11641 * 64-bit mode (though maybe in a 32-bit code segment).
11642 * CR4.PAE and EFER.LMA must be set.
11644 if (!(sregs
->cr4
& X86_CR4_PAE
) || !(sregs
->efer
& EFER_LMA
))
11646 if (kvm_vcpu_is_illegal_gpa(vcpu
, sregs
->cr3
))
11650 * Not in 64-bit mode: EFER.LMA is clear and the code
11651 * segment cannot be 64-bit.
11653 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
11657 return kvm_is_valid_cr4(vcpu
, sregs
->cr4
) &&
11658 kvm_is_valid_cr0(vcpu
, sregs
->cr0
);
11661 static int __set_sregs_common(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
,
11662 int *mmu_reset_needed
, bool update_pdptrs
)
11664 struct msr_data apic_base_msr
;
11666 struct desc_ptr dt
;
11668 if (!kvm_is_valid_sregs(vcpu
, sregs
))
11671 apic_base_msr
.data
= sregs
->apic_base
;
11672 apic_base_msr
.host_initiated
= true;
11673 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
11676 if (vcpu
->arch
.guest_state_protected
)
11679 dt
.size
= sregs
->idt
.limit
;
11680 dt
.address
= sregs
->idt
.base
;
11681 static_call(kvm_x86_set_idt
)(vcpu
, &dt
);
11682 dt
.size
= sregs
->gdt
.limit
;
11683 dt
.address
= sregs
->gdt
.base
;
11684 static_call(kvm_x86_set_gdt
)(vcpu
, &dt
);
11686 vcpu
->arch
.cr2
= sregs
->cr2
;
11687 *mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
11688 vcpu
->arch
.cr3
= sregs
->cr3
;
11689 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
11690 static_call_cond(kvm_x86_post_set_cr3
)(vcpu
, sregs
->cr3
);
11692 kvm_set_cr8(vcpu
, sregs
->cr8
);
11694 *mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
11695 static_call(kvm_x86_set_efer
)(vcpu
, sregs
->efer
);
11697 *mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
11698 static_call(kvm_x86_set_cr0
)(vcpu
, sregs
->cr0
);
11700 *mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
11701 static_call(kvm_x86_set_cr4
)(vcpu
, sregs
->cr4
);
11703 if (update_pdptrs
) {
11704 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11705 if (is_pae_paging(vcpu
)) {
11706 load_pdptrs(vcpu
, kvm_read_cr3(vcpu
));
11707 *mmu_reset_needed
= 1;
11709 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11712 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
11713 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
11714 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
11715 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
11716 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
11717 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
11719 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
11720 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
11722 update_cr8_intercept(vcpu
);
11724 /* Older userspace won't unhalt the vcpu on reset. */
11725 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
11726 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
11727 !is_protmode(vcpu
))
11728 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
11733 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
11735 int pending_vec
, max_bits
;
11736 int mmu_reset_needed
= 0;
11737 int ret
= __set_sregs_common(vcpu
, sregs
, &mmu_reset_needed
, true);
11742 if (mmu_reset_needed
) {
11743 kvm_mmu_reset_context(vcpu
);
11744 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11747 max_bits
= KVM_NR_INTERRUPTS
;
11748 pending_vec
= find_first_bit(
11749 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
11751 if (pending_vec
< max_bits
) {
11752 kvm_queue_interrupt(vcpu
, pending_vec
, false);
11753 pr_debug("Set back pending irq %d\n", pending_vec
);
11754 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
11759 static int __set_sregs2(struct kvm_vcpu
*vcpu
, struct kvm_sregs2
*sregs2
)
11761 int mmu_reset_needed
= 0;
11762 bool valid_pdptrs
= sregs2
->flags
& KVM_SREGS2_FLAGS_PDPTRS_VALID
;
11763 bool pae
= (sregs2
->cr0
& X86_CR0_PG
) && (sregs2
->cr4
& X86_CR4_PAE
) &&
11764 !(sregs2
->efer
& EFER_LMA
);
11767 if (sregs2
->flags
& ~KVM_SREGS2_FLAGS_PDPTRS_VALID
)
11770 if (valid_pdptrs
&& (!pae
|| vcpu
->arch
.guest_state_protected
))
11773 ret
= __set_sregs_common(vcpu
, (struct kvm_sregs
*)sregs2
,
11774 &mmu_reset_needed
, !valid_pdptrs
);
11778 if (valid_pdptrs
) {
11779 for (i
= 0; i
< 4 ; i
++)
11780 kvm_pdptr_write(vcpu
, i
, sregs2
->pdptrs
[i
]);
11782 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_PDPTR
);
11783 mmu_reset_needed
= 1;
11784 vcpu
->arch
.pdptrs_from_userspace
= true;
11786 if (mmu_reset_needed
) {
11787 kvm_mmu_reset_context(vcpu
);
11788 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
11793 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
11794 struct kvm_sregs
*sregs
)
11799 ret
= __set_sregs(vcpu
, sregs
);
11804 static void kvm_arch_vcpu_guestdbg_update_apicv_inhibit(struct kvm
*kvm
)
11807 struct kvm_vcpu
*vcpu
;
11813 down_write(&kvm
->arch
.apicv_update_lock
);
11815 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
11816 if (vcpu
->guest_debug
& KVM_GUESTDBG_BLOCKIRQ
) {
11821 __kvm_set_or_clear_apicv_inhibit(kvm
, APICV_INHIBIT_REASON_BLOCKIRQ
, set
);
11822 up_write(&kvm
->arch
.apicv_update_lock
);
11825 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
11826 struct kvm_guest_debug
*dbg
)
11828 unsigned long rflags
;
11831 if (vcpu
->arch
.guest_state_protected
)
11836 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
11838 if (kvm_is_exception_pending(vcpu
))
11840 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
11841 kvm_queue_exception(vcpu
, DB_VECTOR
);
11843 kvm_queue_exception(vcpu
, BP_VECTOR
);
11847 * Read rflags as long as potentially injected trace flags are still
11850 rflags
= kvm_get_rflags(vcpu
);
11852 vcpu
->guest_debug
= dbg
->control
;
11853 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
11854 vcpu
->guest_debug
= 0;
11856 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
11857 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
11858 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
11859 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
11861 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
11862 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
11864 kvm_update_dr7(vcpu
);
11866 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
11867 vcpu
->arch
.singlestep_rip
= kvm_get_linear_rip(vcpu
);
11870 * Trigger an rflags update that will inject or remove the trace
11873 kvm_set_rflags(vcpu
, rflags
);
11875 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
11877 kvm_arch_vcpu_guestdbg_update_apicv_inhibit(vcpu
->kvm
);
11887 * Translate a guest virtual address to a guest physical address.
11889 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
11890 struct kvm_translation
*tr
)
11892 unsigned long vaddr
= tr
->linear_address
;
11898 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
11899 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
11900 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
11901 tr
->physical_address
= gpa
;
11902 tr
->valid
= gpa
!= INVALID_GPA
;
11910 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11912 struct fxregs_state
*fxsave
;
11914 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11919 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11920 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
11921 fpu
->fcw
= fxsave
->cwd
;
11922 fpu
->fsw
= fxsave
->swd
;
11923 fpu
->ftwx
= fxsave
->twd
;
11924 fpu
->last_opcode
= fxsave
->fop
;
11925 fpu
->last_ip
= fxsave
->rip
;
11926 fpu
->last_dp
= fxsave
->rdp
;
11927 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
11933 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
11935 struct fxregs_state
*fxsave
;
11937 if (fpstate_is_confidential(&vcpu
->arch
.guest_fpu
))
11942 fxsave
= &vcpu
->arch
.guest_fpu
.fpstate
->regs
.fxsave
;
11944 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
11945 fxsave
->cwd
= fpu
->fcw
;
11946 fxsave
->swd
= fpu
->fsw
;
11947 fxsave
->twd
= fpu
->ftwx
;
11948 fxsave
->fop
= fpu
->last_opcode
;
11949 fxsave
->rip
= fpu
->last_ip
;
11950 fxsave
->rdp
= fpu
->last_dp
;
11951 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
11957 static void store_regs(struct kvm_vcpu
*vcpu
)
11959 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
11961 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
11962 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11964 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
11965 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
11967 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
11968 kvm_vcpu_ioctl_x86_get_vcpu_events(
11969 vcpu
, &vcpu
->run
->s
.regs
.events
);
11972 static int sync_regs(struct kvm_vcpu
*vcpu
)
11974 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
11975 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
11976 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
11979 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
11980 struct kvm_sregs sregs
= vcpu
->run
->s
.regs
.sregs
;
11982 if (__set_sregs(vcpu
, &sregs
))
11985 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
11988 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
11989 struct kvm_vcpu_events events
= vcpu
->run
->s
.regs
.events
;
11991 if (kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
))
11994 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
12000 int kvm_arch_vcpu_precreate(struct kvm
*kvm
, unsigned int id
)
12002 if (kvm_check_tsc_unstable() && kvm
->created_vcpus
)
12003 pr_warn_once("SMP vm created on host with unstable TSC; "
12004 "guest TSC will not be reliable\n");
12006 if (!kvm
->arch
.max_vcpu_ids
)
12007 kvm
->arch
.max_vcpu_ids
= KVM_MAX_VCPU_IDS
;
12009 if (id
>= kvm
->arch
.max_vcpu_ids
)
12012 return static_call(kvm_x86_vcpu_precreate
)(kvm
);
12015 int kvm_arch_vcpu_create(struct kvm_vcpu
*vcpu
)
12020 vcpu
->arch
.last_vmentry_cpu
= -1;
12021 vcpu
->arch
.regs_avail
= ~0;
12022 vcpu
->arch
.regs_dirty
= ~0;
12024 kvm_gpc_init(&vcpu
->arch
.pv_time
, vcpu
->kvm
, vcpu
, KVM_HOST_USES_PFN
);
12026 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
12027 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
12029 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
12031 r
= kvm_mmu_create(vcpu
);
12035 if (irqchip_in_kernel(vcpu
->kvm
)) {
12036 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
12038 goto fail_mmu_destroy
;
12041 * Defer evaluating inhibits until the vCPU is first run, as
12042 * this vCPU will not get notified of any changes until this
12043 * vCPU is visible to other vCPUs (marked online and added to
12044 * the set of vCPUs). Opportunistically mark APICv active as
12045 * VMX in particularly is highly unlikely to have inhibits.
12046 * Ignore the current per-VM APICv state so that vCPU creation
12047 * is guaranteed to run with a deterministic value, the request
12048 * will ensure the vCPU gets the correct state before VM-Entry.
12050 if (enable_apicv
) {
12051 vcpu
->arch
.apic
->apicv_active
= true;
12052 kvm_make_request(KVM_REQ_APICV_UPDATE
, vcpu
);
12055 static_branch_inc(&kvm_has_noapic_vcpu
);
12059 page
= alloc_page(GFP_KERNEL_ACCOUNT
| __GFP_ZERO
);
12061 goto fail_free_lapic
;
12062 vcpu
->arch
.pio_data
= page_address(page
);
12064 vcpu
->arch
.mce_banks
= kcalloc(KVM_MAX_MCE_BANKS
* 4, sizeof(u64
),
12065 GFP_KERNEL_ACCOUNT
);
12066 vcpu
->arch
.mci_ctl2_banks
= kcalloc(KVM_MAX_MCE_BANKS
, sizeof(u64
),
12067 GFP_KERNEL_ACCOUNT
);
12068 if (!vcpu
->arch
.mce_banks
|| !vcpu
->arch
.mci_ctl2_banks
)
12069 goto fail_free_mce_banks
;
12070 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
12072 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
12073 GFP_KERNEL_ACCOUNT
))
12074 goto fail_free_mce_banks
;
12076 if (!alloc_emulate_ctxt(vcpu
))
12077 goto free_wbinvd_dirty_mask
;
12079 if (!fpu_alloc_guest_fpstate(&vcpu
->arch
.guest_fpu
)) {
12080 pr_err("failed to allocate vcpu's fpu\n");
12081 goto free_emulate_ctxt
;
12084 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
12085 vcpu
->arch
.reserved_gpa_bits
= kvm_vcpu_reserved_gpa_bits_raw(vcpu
);
12087 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
12089 kvm_async_pf_hash_reset(vcpu
);
12091 vcpu
->arch
.perf_capabilities
= kvm_caps
.supported_perf_cap
;
12092 kvm_pmu_init(vcpu
);
12094 vcpu
->arch
.pending_external_vector
= -1;
12095 vcpu
->arch
.preempted_in_kernel
= false;
12097 #if IS_ENABLED(CONFIG_HYPERV)
12098 vcpu
->arch
.hv_root_tdp
= INVALID_PAGE
;
12101 r
= static_call(kvm_x86_vcpu_create
)(vcpu
);
12103 goto free_guest_fpu
;
12105 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
12106 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
12107 kvm_xen_init_vcpu(vcpu
);
12108 kvm_vcpu_mtrr_init(vcpu
);
12110 kvm_set_tsc_khz(vcpu
, vcpu
->kvm
->arch
.default_tsc_khz
);
12111 kvm_vcpu_reset(vcpu
, false);
12112 kvm_init_mmu(vcpu
);
12117 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
12119 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
12120 free_wbinvd_dirty_mask
:
12121 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
12122 fail_free_mce_banks
:
12123 kfree(vcpu
->arch
.mce_banks
);
12124 kfree(vcpu
->arch
.mci_ctl2_banks
);
12125 free_page((unsigned long)vcpu
->arch
.pio_data
);
12127 kvm_free_lapic(vcpu
);
12129 kvm_mmu_destroy(vcpu
);
12133 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
12135 struct kvm
*kvm
= vcpu
->kvm
;
12137 if (mutex_lock_killable(&vcpu
->mutex
))
12140 kvm_synchronize_tsc(vcpu
, NULL
);
12143 /* poll control enabled by default */
12144 vcpu
->arch
.msr_kvm_poll_control
= 1;
12146 mutex_unlock(&vcpu
->mutex
);
12148 if (kvmclock_periodic_sync
&& vcpu
->vcpu_idx
== 0)
12149 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
12150 KVMCLOCK_SYNC_PERIOD
);
12153 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
12157 kvmclock_reset(vcpu
);
12159 static_call(kvm_x86_vcpu_free
)(vcpu
);
12161 kmem_cache_free(x86_emulator_cache
, vcpu
->arch
.emulate_ctxt
);
12162 free_cpumask_var(vcpu
->arch
.wbinvd_dirty_mask
);
12163 fpu_free_guest_fpstate(&vcpu
->arch
.guest_fpu
);
12165 kvm_xen_destroy_vcpu(vcpu
);
12166 kvm_hv_vcpu_uninit(vcpu
);
12167 kvm_pmu_destroy(vcpu
);
12168 kfree(vcpu
->arch
.mce_banks
);
12169 kfree(vcpu
->arch
.mci_ctl2_banks
);
12170 kvm_free_lapic(vcpu
);
12171 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
12172 kvm_mmu_destroy(vcpu
);
12173 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
12174 free_page((unsigned long)vcpu
->arch
.pio_data
);
12175 kvfree(vcpu
->arch
.cpuid_entries
);
12176 if (!lapic_in_kernel(vcpu
))
12177 static_branch_dec(&kvm_has_noapic_vcpu
);
12180 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
12182 struct kvm_cpuid_entry2
*cpuid_0x1
;
12183 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
12184 unsigned long new_cr0
;
12187 * Several of the "set" flows, e.g. ->set_cr0(), read other registers
12188 * to handle side effects. RESET emulation hits those flows and relies
12189 * on emulated/virtualized registers, including those that are loaded
12190 * into hardware, to be zeroed at vCPU creation. Use CRs as a sentinel
12191 * to detect improper or missing initialization.
12193 WARN_ON_ONCE(!init_event
&&
12194 (old_cr0
|| kvm_read_cr3(vcpu
) || kvm_read_cr4(vcpu
)));
12197 * SVM doesn't unconditionally VM-Exit on INIT and SHUTDOWN, thus it's
12198 * possible to INIT the vCPU while L2 is active. Force the vCPU back
12199 * into L1 as EFER.SVME is cleared on INIT (along with all other EFER
12200 * bits), i.e. virtualization is disabled.
12202 if (is_guest_mode(vcpu
))
12203 kvm_leave_nested(vcpu
);
12205 kvm_lapic_reset(vcpu
, init_event
);
12207 WARN_ON_ONCE(is_guest_mode(vcpu
) || is_smm(vcpu
));
12208 vcpu
->arch
.hflags
= 0;
12210 vcpu
->arch
.smi_pending
= 0;
12211 vcpu
->arch
.smi_count
= 0;
12212 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
12213 vcpu
->arch
.nmi_pending
= 0;
12214 vcpu
->arch
.nmi_injected
= false;
12215 kvm_clear_interrupt_queue(vcpu
);
12216 kvm_clear_exception_queue(vcpu
);
12218 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
12219 kvm_update_dr0123(vcpu
);
12220 vcpu
->arch
.dr6
= DR6_ACTIVE_LOW
;
12221 vcpu
->arch
.dr7
= DR7_FIXED_1
;
12222 kvm_update_dr7(vcpu
);
12224 vcpu
->arch
.cr2
= 0;
12226 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
12227 vcpu
->arch
.apf
.msr_en_val
= 0;
12228 vcpu
->arch
.apf
.msr_int_val
= 0;
12229 vcpu
->arch
.st
.msr_val
= 0;
12231 kvmclock_reset(vcpu
);
12233 kvm_clear_async_pf_completion_queue(vcpu
);
12234 kvm_async_pf_hash_reset(vcpu
);
12235 vcpu
->arch
.apf
.halted
= false;
12237 if (vcpu
->arch
.guest_fpu
.fpstate
&& kvm_mpx_supported()) {
12238 struct fpstate
*fpstate
= vcpu
->arch
.guest_fpu
.fpstate
;
12241 * All paths that lead to INIT are required to load the guest's
12242 * FPU state (because most paths are buried in KVM_RUN).
12245 kvm_put_guest_fpu(vcpu
);
12247 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDREGS
);
12248 fpstate_clear_xstate_component(fpstate
, XFEATURE_BNDCSR
);
12251 kvm_load_guest_fpu(vcpu
);
12255 vcpu
->arch
.smbase
= 0x30000;
12257 vcpu
->arch
.msr_misc_features_enables
= 0;
12258 vcpu
->arch
.ia32_misc_enable_msr
= MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL
|
12259 MSR_IA32_MISC_ENABLE_BTS_UNAVAIL
;
12261 __kvm_set_xcr(vcpu
, 0, XFEATURE_MASK_FP
);
12262 __kvm_set_msr(vcpu
, MSR_IA32_XSS
, 0, true);
12265 /* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
12266 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
12267 kvm_register_mark_dirty(vcpu
, VCPU_REGS_RSP
);
12270 * Fall back to KVM's default Family/Model/Stepping of 0x600 (P6/Athlon)
12271 * if no CPUID match is found. Note, it's impossible to get a match at
12272 * RESET since KVM emulates RESET before exposing the vCPU to userspace,
12273 * i.e. it's impossible for kvm_find_cpuid_entry() to find a valid entry
12274 * on RESET. But, go through the motions in case that's ever remedied.
12276 cpuid_0x1
= kvm_find_cpuid_entry(vcpu
, 1);
12277 kvm_rdx_write(vcpu
, cpuid_0x1
? cpuid_0x1
->eax
: 0x600);
12279 static_call(kvm_x86_vcpu_reset
)(vcpu
, init_event
);
12281 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
12282 kvm_rip_write(vcpu
, 0xfff0);
12284 vcpu
->arch
.cr3
= 0;
12285 kvm_register_mark_dirty(vcpu
, VCPU_EXREG_CR3
);
12288 * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions
12289 * of Intel's SDM list CD/NW as being set on INIT, but they contradict
12290 * (or qualify) that with a footnote stating that CD/NW are preserved.
12292 new_cr0
= X86_CR0_ET
;
12294 new_cr0
|= (old_cr0
& (X86_CR0_NW
| X86_CR0_CD
));
12296 new_cr0
|= X86_CR0_NW
| X86_CR0_CD
;
12298 static_call(kvm_x86_set_cr0
)(vcpu
, new_cr0
);
12299 static_call(kvm_x86_set_cr4
)(vcpu
, 0);
12300 static_call(kvm_x86_set_efer
)(vcpu
, 0);
12301 static_call(kvm_x86_update_exception_bitmap
)(vcpu
);
12304 * On the standard CR0/CR4/EFER modification paths, there are several
12305 * complex conditions determining whether the MMU has to be reset and/or
12306 * which PCIDs have to be flushed. However, CR0.WP and the paging-related
12307 * bits in CR4 and EFER are irrelevant if CR0.PG was '0'; and a reset+flush
12308 * is needed anyway if CR0.PG was '1' (which can only happen for INIT, as
12309 * CR0 will be '0' prior to RESET). So we only need to check CR0.PG here.
12311 if (old_cr0
& X86_CR0_PG
) {
12312 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12313 kvm_mmu_reset_context(vcpu
);
12317 * Intel's SDM states that all TLB entries are flushed on INIT. AMD's
12318 * APM states the TLBs are untouched by INIT, but it also states that
12319 * the TLBs are flushed on "External initialization of the processor."
12320 * Flush the guest TLB regardless of vendor, there is no meaningful
12321 * benefit in relying on the guest to flush the TLB immediately after
12322 * INIT. A spurious TLB flush is benign and likely negligible from a
12323 * performance perspective.
12326 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
12328 EXPORT_SYMBOL_GPL(kvm_vcpu_reset
);
12330 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
12332 struct kvm_segment cs
;
12334 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
12335 cs
.selector
= vector
<< 8;
12336 cs
.base
= vector
<< 12;
12337 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
12338 kvm_rip_write(vcpu
, 0);
12340 EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_sipi_vector
);
12342 int kvm_arch_hardware_enable(void)
12345 struct kvm_vcpu
*vcpu
;
12350 bool stable
, backwards_tsc
= false;
12352 kvm_user_return_msr_cpu_online();
12354 ret
= kvm_x86_check_processor_compatibility();
12358 ret
= static_call(kvm_x86_hardware_enable
)();
12362 local_tsc
= rdtsc();
12363 stable
= !kvm_check_tsc_unstable();
12364 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
12365 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12366 if (!stable
&& vcpu
->cpu
== smp_processor_id())
12367 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
12368 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
12369 backwards_tsc
= true;
12370 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
12371 max_tsc
= vcpu
->arch
.last_host_tsc
;
12377 * Sometimes, even reliable TSCs go backwards. This happens on
12378 * platforms that reset TSC during suspend or hibernate actions, but
12379 * maintain synchronization. We must compensate. Fortunately, we can
12380 * detect that condition here, which happens early in CPU bringup,
12381 * before any KVM threads can be running. Unfortunately, we can't
12382 * bring the TSCs fully up to date with real time, as we aren't yet far
12383 * enough into CPU bringup that we know how much real time has actually
12384 * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
12385 * variables that haven't been updated yet.
12387 * So we simply find the maximum observed TSC above, then record the
12388 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
12389 * the adjustment will be applied. Note that we accumulate
12390 * adjustments, in case multiple suspend cycles happen before some VCPU
12391 * gets a chance to run again. In the event that no KVM threads get a
12392 * chance to run, we will miss the entire elapsed period, as we'll have
12393 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
12394 * loose cycle time. This isn't too big a deal, since the loss will be
12395 * uniform across all VCPUs (not to mention the scenario is extremely
12396 * unlikely). It is possible that a second hibernate recovery happens
12397 * much faster than a first, causing the observed TSC here to be
12398 * smaller; this would require additional padding adjustment, which is
12399 * why we set last_host_tsc to the local tsc observed here.
12401 * N.B. - this code below runs only on platforms with reliable TSC,
12402 * as that is the only way backwards_tsc is set above. Also note
12403 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
12404 * have the same delta_cyc adjustment applied if backwards_tsc
12405 * is detected. Note further, this adjustment is only done once,
12406 * as we reset last_host_tsc on all VCPUs to stop this from being
12407 * called multiple times (one for each physical CPU bringup).
12409 * Platforms with unreliable TSCs don't have to deal with this, they
12410 * will be compensated by the logic in vcpu_load, which sets the TSC to
12411 * catchup mode. This will catchup all VCPUs to real time, but cannot
12412 * guarantee that they stay in perfect synchronization.
12414 if (backwards_tsc
) {
12415 u64 delta_cyc
= max_tsc
- local_tsc
;
12416 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
12417 kvm
->arch
.backwards_tsc_observed
= true;
12418 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12419 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
12420 vcpu
->arch
.last_host_tsc
= local_tsc
;
12421 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
12425 * We have to disable TSC offset matching.. if you were
12426 * booting a VM while issuing an S4 host suspend....
12427 * you may have some problem. Solving this issue is
12428 * left as an exercise to the reader.
12430 kvm
->arch
.last_tsc_nsec
= 0;
12431 kvm
->arch
.last_tsc_write
= 0;
12438 void kvm_arch_hardware_disable(void)
12440 static_call(kvm_x86_hardware_disable
)();
12441 drop_user_return_notifiers();
12444 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
12446 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
12449 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
12451 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
12454 __read_mostly
DEFINE_STATIC_KEY_FALSE(kvm_has_noapic_vcpu
);
12455 EXPORT_SYMBOL_GPL(kvm_has_noapic_vcpu
);
12457 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
12459 struct kvm_pmu
*pmu
= vcpu_to_pmu(vcpu
);
12461 vcpu
->arch
.l1tf_flush_l1d
= true;
12462 if (pmu
->version
&& unlikely(pmu
->event_count
)) {
12463 pmu
->need_cleanup
= true;
12464 kvm_make_request(KVM_REQ_PMU
, vcpu
);
12466 static_call(kvm_x86_sched_in
)(vcpu
, cpu
);
12469 void kvm_arch_free_vm(struct kvm
*kvm
)
12471 #if IS_ENABLED(CONFIG_HYPERV)
12472 kfree(kvm
->arch
.hv_pa_pg
);
12474 __kvm_arch_free_vm(kvm
);
12478 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
12481 unsigned long flags
;
12483 if (!kvm_is_vm_type_supported(type
))
12486 kvm
->arch
.vm_type
= type
;
12488 ret
= kvm_page_track_init(kvm
);
12492 kvm_mmu_init_vm(kvm
);
12494 ret
= static_call(kvm_x86_vm_init
)(kvm
);
12496 goto out_uninit_mmu
;
12498 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
12499 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
12501 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
12502 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
12503 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
12504 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
12505 &kvm
->arch
.irq_sources_bitmap
);
12507 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
12508 mutex_init(&kvm
->arch
.apic_map_lock
);
12509 seqcount_raw_spinlock_init(&kvm
->arch
.pvclock_sc
, &kvm
->arch
.tsc_write_lock
);
12510 kvm
->arch
.kvmclock_offset
= -get_kvmclock_base_ns();
12512 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
12513 pvclock_update_vm_gtod_copy(kvm
);
12514 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
12516 kvm
->arch
.default_tsc_khz
= max_tsc_khz
? : tsc_khz
;
12517 kvm
->arch
.guest_can_read_msr_platform_info
= true;
12518 kvm
->arch
.enable_pmu
= enable_pmu
;
12520 #if IS_ENABLED(CONFIG_HYPERV)
12521 spin_lock_init(&kvm
->arch
.hv_root_tdp_lock
);
12522 kvm
->arch
.hv_root_tdp
= INVALID_PAGE
;
12525 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
12526 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
12528 kvm_apicv_init(kvm
);
12529 kvm_hv_init_vm(kvm
);
12530 kvm_xen_init_vm(kvm
);
12535 kvm_mmu_uninit_vm(kvm
);
12536 kvm_page_track_cleanup(kvm
);
12541 int kvm_arch_post_init_vm(struct kvm
*kvm
)
12543 return kvm_mmu_post_init_vm(kvm
);
12546 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
12549 kvm_mmu_unload(vcpu
);
12553 static void kvm_unload_vcpu_mmus(struct kvm
*kvm
)
12556 struct kvm_vcpu
*vcpu
;
12558 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
12559 kvm_clear_async_pf_completion_queue(vcpu
);
12560 kvm_unload_vcpu_mmu(vcpu
);
12564 void kvm_arch_sync_events(struct kvm
*kvm
)
12566 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
12567 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
12572 * __x86_set_memory_region: Setup KVM internal memory slot
12574 * @kvm: the kvm pointer to the VM.
12575 * @id: the slot ID to setup.
12576 * @gpa: the GPA to install the slot (unused when @size == 0).
12577 * @size: the size of the slot. Set to zero to uninstall a slot.
12579 * This function helps to setup a KVM internal memory slot. Specify
12580 * @size > 0 to install a new slot, while @size == 0 to uninstall a
12581 * slot. The return code can be one of the following:
12583 * HVA: on success (uninstall will return a bogus HVA)
12586 * The caller should always use IS_ERR() to check the return value
12587 * before use. Note, the KVM internal memory slots are guaranteed to
12588 * remain valid and unchanged until the VM is destroyed, i.e., the
12589 * GPA->HVA translation will not change. However, the HVA is a user
12590 * address, i.e. its accessibility is not guaranteed, and must be
12591 * accessed via __copy_{to,from}_user().
12593 void __user
* __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
,
12597 unsigned long hva
, old_npages
;
12598 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
12599 struct kvm_memory_slot
*slot
;
12601 /* Called with kvm->slots_lock held. */
12602 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
12603 return ERR_PTR_USR(-EINVAL
);
12605 slot
= id_to_memslot(slots
, id
);
12607 if (slot
&& slot
->npages
)
12608 return ERR_PTR_USR(-EEXIST
);
12611 * MAP_SHARED to prevent internal slot pages from being moved
12614 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
12615 MAP_SHARED
| MAP_ANONYMOUS
, 0);
12616 if (IS_ERR_VALUE(hva
))
12617 return (void __user
*)hva
;
12619 if (!slot
|| !slot
->npages
)
12622 old_npages
= slot
->npages
;
12623 hva
= slot
->userspace_addr
;
12626 for (i
= 0; i
< kvm_arch_nr_memslot_as_ids(kvm
); i
++) {
12627 struct kvm_userspace_memory_region2 m
;
12629 m
.slot
= id
| (i
<< 16);
12631 m
.guest_phys_addr
= gpa
;
12632 m
.userspace_addr
= hva
;
12633 m
.memory_size
= size
;
12634 r
= __kvm_set_memory_region(kvm
, &m
);
12636 return ERR_PTR_USR(r
);
12640 vm_munmap(hva
, old_npages
* PAGE_SIZE
);
12642 return (void __user
*)hva
;
12644 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
12646 void kvm_arch_pre_destroy_vm(struct kvm
*kvm
)
12648 kvm_mmu_pre_destroy_vm(kvm
);
12651 void kvm_arch_destroy_vm(struct kvm
*kvm
)
12653 if (current
->mm
== kvm
->mm
) {
12655 * Free memory regions allocated on behalf of userspace,
12656 * unless the memory map has changed due to process exit
12659 mutex_lock(&kvm
->slots_lock
);
12660 __x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
,
12662 __x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
,
12664 __x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
12665 mutex_unlock(&kvm
->slots_lock
);
12667 kvm_unload_vcpu_mmus(kvm
);
12668 static_call_cond(kvm_x86_vm_destroy
)(kvm
);
12669 kvm_free_msr_filter(srcu_dereference_check(kvm
->arch
.msr_filter
, &kvm
->srcu
, 1));
12670 kvm_pic_destroy(kvm
);
12671 kvm_ioapic_destroy(kvm
);
12672 kvm_destroy_vcpus(kvm
);
12673 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
12674 kfree(srcu_dereference_check(kvm
->arch
.pmu_event_filter
, &kvm
->srcu
, 1));
12675 kvm_mmu_uninit_vm(kvm
);
12676 kvm_page_track_cleanup(kvm
);
12677 kvm_xen_destroy_vm(kvm
);
12678 kvm_hv_destroy_vm(kvm
);
12681 static void memslot_rmap_free(struct kvm_memory_slot
*slot
)
12685 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12686 kvfree(slot
->arch
.rmap
[i
]);
12687 slot
->arch
.rmap
[i
] = NULL
;
12691 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
)
12695 memslot_rmap_free(slot
);
12697 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12698 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12699 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12702 kvm_page_track_free_memslot(slot
);
12705 int memslot_rmap_alloc(struct kvm_memory_slot
*slot
, unsigned long npages
)
12707 const int sz
= sizeof(*slot
->arch
.rmap
[0]);
12710 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12712 int lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12714 if (slot
->arch
.rmap
[i
])
12717 slot
->arch
.rmap
[i
] = __vcalloc(lpages
, sz
, GFP_KERNEL_ACCOUNT
);
12718 if (!slot
->arch
.rmap
[i
]) {
12719 memslot_rmap_free(slot
);
12727 static int kvm_alloc_memslot_metadata(struct kvm
*kvm
,
12728 struct kvm_memory_slot
*slot
)
12730 unsigned long npages
= slot
->npages
;
12734 * Clear out the previous array pointers for the KVM_MR_MOVE case. The
12735 * old arrays will be freed by __kvm_set_memory_region() if installing
12736 * the new memslot is successful.
12738 memset(&slot
->arch
, 0, sizeof(slot
->arch
));
12740 if (kvm_memslots_have_rmaps(kvm
)) {
12741 r
= memslot_rmap_alloc(slot
, npages
);
12746 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12747 struct kvm_lpage_info
*linfo
;
12748 unsigned long ugfn
;
12752 lpages
= __kvm_mmu_slot_lpages(slot
, npages
, level
);
12754 linfo
= __vcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
12758 slot
->arch
.lpage_info
[i
- 1] = linfo
;
12760 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
12761 linfo
[0].disallow_lpage
= 1;
12762 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
12763 linfo
[lpages
- 1].disallow_lpage
= 1;
12764 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
12766 * If the gfn and userspace address are not aligned wrt each
12767 * other, disable large page support for this slot.
12769 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1)) {
12772 for (j
= 0; j
< lpages
; ++j
)
12773 linfo
[j
].disallow_lpage
= 1;
12777 #ifdef CONFIG_KVM_GENERIC_MEMORY_ATTRIBUTES
12778 kvm_mmu_init_memslot_memory_attributes(kvm
, slot
);
12781 if (kvm_page_track_create_memslot(kvm
, slot
, npages
))
12787 memslot_rmap_free(slot
);
12789 for (i
= 1; i
< KVM_NR_PAGE_SIZES
; ++i
) {
12790 kvfree(slot
->arch
.lpage_info
[i
- 1]);
12791 slot
->arch
.lpage_info
[i
- 1] = NULL
;
12796 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
12798 struct kvm_vcpu
*vcpu
;
12802 * memslots->generation has been incremented.
12803 * mmio generation may have reached its maximum value.
12805 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
12807 /* Force re-initialization of steal_time cache */
12808 kvm_for_each_vcpu(i
, vcpu
, kvm
)
12809 kvm_vcpu_kick(vcpu
);
12812 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
12813 const struct kvm_memory_slot
*old
,
12814 struct kvm_memory_slot
*new,
12815 enum kvm_mr_change change
)
12818 * KVM doesn't support moving memslots when there are external page
12819 * trackers attached to the VM, i.e. if KVMGT is in use.
12821 if (change
== KVM_MR_MOVE
&& kvm_page_track_has_external_user(kvm
))
12824 if (change
== KVM_MR_CREATE
|| change
== KVM_MR_MOVE
) {
12825 if ((new->base_gfn
+ new->npages
- 1) > kvm_mmu_max_gfn())
12828 return kvm_alloc_memslot_metadata(kvm
, new);
12831 if (change
== KVM_MR_FLAGS_ONLY
)
12832 memcpy(&new->arch
, &old
->arch
, sizeof(old
->arch
));
12833 else if (WARN_ON_ONCE(change
!= KVM_MR_DELETE
))
12840 static void kvm_mmu_update_cpu_dirty_logging(struct kvm
*kvm
, bool enable
)
12844 if (!kvm_x86_ops
.cpu_dirty_log_size
)
12847 nr_slots
= atomic_read(&kvm
->nr_memslots_dirty_logging
);
12848 if ((enable
&& nr_slots
== 1) || !nr_slots
)
12849 kvm_make_all_cpus_request(kvm
, KVM_REQ_UPDATE_CPU_DIRTY_LOGGING
);
12852 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
12853 struct kvm_memory_slot
*old
,
12854 const struct kvm_memory_slot
*new,
12855 enum kvm_mr_change change
)
12857 u32 old_flags
= old
? old
->flags
: 0;
12858 u32 new_flags
= new ? new->flags
: 0;
12859 bool log_dirty_pages
= new_flags
& KVM_MEM_LOG_DIRTY_PAGES
;
12862 * Update CPU dirty logging if dirty logging is being toggled. This
12863 * applies to all operations.
12865 if ((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)
12866 kvm_mmu_update_cpu_dirty_logging(kvm
, log_dirty_pages
);
12869 * Nothing more to do for RO slots (which can't be dirtied and can't be
12870 * made writable) or CREATE/MOVE/DELETE of a slot.
12872 * For a memslot with dirty logging disabled:
12873 * CREATE: No dirty mappings will already exist.
12874 * MOVE/DELETE: The old mappings will already have been cleaned up by
12875 * kvm_arch_flush_shadow_memslot()
12877 * For a memslot with dirty logging enabled:
12878 * CREATE: No shadow pages exist, thus nothing to write-protect
12879 * and no dirty bits to clear.
12880 * MOVE/DELETE: The old mappings will already have been cleaned up by
12881 * kvm_arch_flush_shadow_memslot().
12883 if ((change
!= KVM_MR_FLAGS_ONLY
) || (new_flags
& KVM_MEM_READONLY
))
12887 * READONLY and non-flags changes were filtered out above, and the only
12888 * other flag is LOG_DIRTY_PAGES, i.e. something is wrong if dirty
12889 * logging isn't being toggled on or off.
12891 if (WARN_ON_ONCE(!((old_flags
^ new_flags
) & KVM_MEM_LOG_DIRTY_PAGES
)))
12894 if (!log_dirty_pages
) {
12896 * Dirty logging tracks sptes in 4k granularity, meaning that
12897 * large sptes have to be split. If live migration succeeds,
12898 * the guest in the source machine will be destroyed and large
12899 * sptes will be created in the destination. However, if the
12900 * guest continues to run in the source machine (for example if
12901 * live migration fails), small sptes will remain around and
12902 * cause bad performance.
12904 * Scan sptes if dirty logging has been stopped, dropping those
12905 * which can be collapsed into a single large-page spte. Later
12906 * page faults will create the large-page sptes.
12908 kvm_mmu_zap_collapsible_sptes(kvm
, new);
12911 * Initially-all-set does not require write protecting any page,
12912 * because they're all assumed to be dirty.
12914 if (kvm_dirty_log_manual_protect_and_init_set(kvm
))
12917 if (READ_ONCE(eager_page_split
))
12918 kvm_mmu_slot_try_split_huge_pages(kvm
, new, PG_LEVEL_4K
);
12920 if (kvm_x86_ops
.cpu_dirty_log_size
) {
12921 kvm_mmu_slot_leaf_clear_dirty(kvm
, new);
12922 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_2M
);
12924 kvm_mmu_slot_remove_write_access(kvm
, new, PG_LEVEL_4K
);
12928 * Unconditionally flush the TLBs after enabling dirty logging.
12929 * A flush is almost always going to be necessary (see below),
12930 * and unconditionally flushing allows the helpers to omit
12931 * the subtly complex checks when removing write access.
12933 * Do the flush outside of mmu_lock to reduce the amount of
12934 * time mmu_lock is held. Flushing after dropping mmu_lock is
12935 * safe as KVM only needs to guarantee the slot is fully
12936 * write-protected before returning to userspace, i.e. before
12937 * userspace can consume the dirty status.
12939 * Flushing outside of mmu_lock requires KVM to be careful when
12940 * making decisions based on writable status of an SPTE, e.g. a
12941 * !writable SPTE doesn't guarantee a CPU can't perform writes.
12943 * Specifically, KVM also write-protects guest page tables to
12944 * monitor changes when using shadow paging, and must guarantee
12945 * no CPUs can write to those page before mmu_lock is dropped.
12946 * Because CPUs may have stale TLB entries at this point, a
12947 * !writable SPTE doesn't guarantee CPUs can't perform writes.
12949 * KVM also allows making SPTES writable outside of mmu_lock,
12950 * e.g. to allow dirty logging without taking mmu_lock.
12952 * To handle these scenarios, KVM uses a separate software-only
12953 * bit (MMU-writable) to track if a SPTE is !writable due to
12954 * a guest page table being write-protected (KVM clears the
12955 * MMU-writable flag when write-protecting for shadow paging).
12957 * The use of MMU-writable is also the primary motivation for
12958 * the unconditional flush. Because KVM must guarantee that a
12959 * CPU doesn't contain stale, writable TLB entries for a
12960 * !MMU-writable SPTE, KVM must flush if it encounters any
12961 * MMU-writable SPTE regardless of whether the actual hardware
12962 * writable bit was set. I.e. KVM is almost guaranteed to need
12963 * to flush, while unconditionally flushing allows the "remove
12964 * write access" helpers to ignore MMU-writable entirely.
12966 * See is_writable_pte() for more details (the case involving
12967 * access-tracked SPTEs is particularly relevant).
12969 kvm_flush_remote_tlbs_memslot(kvm
, new);
12973 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
12974 struct kvm_memory_slot
*old
,
12975 const struct kvm_memory_slot
*new,
12976 enum kvm_mr_change change
)
12978 if (change
== KVM_MR_DELETE
)
12979 kvm_page_track_delete_slot(kvm
, old
);
12981 if (!kvm
->arch
.n_requested_mmu_pages
&&
12982 (change
== KVM_MR_CREATE
|| change
== KVM_MR_DELETE
)) {
12983 unsigned long nr_mmu_pages
;
12985 nr_mmu_pages
= kvm
->nr_memslot_pages
/ KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO
;
12986 nr_mmu_pages
= max(nr_mmu_pages
, KVM_MIN_ALLOC_MMU_PAGES
);
12987 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
12990 kvm_mmu_slot_apply_flags(kvm
, old
, new, change
);
12992 /* Free the arrays associated with the old memslot. */
12993 if (change
== KVM_MR_MOVE
)
12994 kvm_arch_free_memslot(kvm
, old
);
12997 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
12999 return (is_guest_mode(vcpu
) &&
13000 static_call(kvm_x86_guest_apic_has_interrupt
)(vcpu
));
13003 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
13005 if (!list_empty_careful(&vcpu
->async_pf
.done
))
13008 if (kvm_apic_has_pending_init_or_sipi(vcpu
) &&
13009 kvm_apic_init_sipi_allowed(vcpu
))
13012 if (vcpu
->arch
.pv
.pv_unhalted
)
13015 if (kvm_is_exception_pending(vcpu
))
13018 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
13019 (vcpu
->arch
.nmi_pending
&&
13020 static_call(kvm_x86_nmi_allowed
)(vcpu
, false)))
13023 #ifdef CONFIG_KVM_SMM
13024 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
13025 (vcpu
->arch
.smi_pending
&&
13026 static_call(kvm_x86_smi_allowed
)(vcpu
, false)))
13030 if (kvm_test_request(KVM_REQ_PMI
, vcpu
))
13033 if (kvm_arch_interrupt_allowed(vcpu
) &&
13034 (kvm_cpu_has_interrupt(vcpu
) ||
13035 kvm_guest_apic_has_interrupt(vcpu
)))
13038 if (kvm_hv_has_stimer_pending(vcpu
))
13041 if (is_guest_mode(vcpu
) &&
13042 kvm_x86_ops
.nested_ops
->has_events
&&
13043 kvm_x86_ops
.nested_ops
->has_events(vcpu
))
13046 if (kvm_xen_has_pending_events(vcpu
))
13052 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
13054 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
13057 bool kvm_arch_dy_has_pending_interrupt(struct kvm_vcpu
*vcpu
)
13059 if (kvm_vcpu_apicv_active(vcpu
) &&
13060 static_call(kvm_x86_dy_apicv_has_pending_interrupt
)(vcpu
))
13066 bool kvm_arch_dy_runnable(struct kvm_vcpu
*vcpu
)
13068 if (READ_ONCE(vcpu
->arch
.pv
.pv_unhalted
))
13071 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
13072 #ifdef CONFIG_KVM_SMM
13073 kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
13075 kvm_test_request(KVM_REQ_EVENT
, vcpu
))
13078 return kvm_arch_dy_has_pending_interrupt(vcpu
);
13081 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
13083 if (vcpu
->arch
.guest_state_protected
)
13086 if (vcpu
!= kvm_get_running_vcpu())
13087 return vcpu
->arch
.preempted_in_kernel
;
13089 return static_call(kvm_x86_get_cpl
)(vcpu
) == 0;
13092 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu
*vcpu
)
13094 return kvm_rip_read(vcpu
);
13097 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
13099 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
13102 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
13104 return static_call(kvm_x86_interrupt_allowed
)(vcpu
, false);
13107 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
13109 /* Can't read the RIP when guest state is protected, just return 0 */
13110 if (vcpu
->arch
.guest_state_protected
)
13113 if (is_64_bit_mode(vcpu
))
13114 return kvm_rip_read(vcpu
);
13115 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
13116 kvm_rip_read(vcpu
));
13118 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
13120 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
13122 return kvm_get_linear_rip(vcpu
) == linear_rip
;
13124 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
13126 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
13128 unsigned long rflags
;
13130 rflags
= static_call(kvm_x86_get_rflags
)(vcpu
);
13131 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
13132 rflags
&= ~X86_EFLAGS_TF
;
13135 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
13137 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
13139 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
13140 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
13141 rflags
|= X86_EFLAGS_TF
;
13142 static_call(kvm_x86_set_rflags
)(vcpu
, rflags
);
13145 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
13147 __kvm_set_rflags(vcpu
, rflags
);
13148 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
13150 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
13152 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
13154 BUILD_BUG_ON(!is_power_of_2(ASYNC_PF_PER_VCPU
));
13156 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
13159 static inline u32
kvm_async_pf_next_probe(u32 key
)
13161 return (key
+ 1) & (ASYNC_PF_PER_VCPU
- 1);
13164 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13166 u32 key
= kvm_async_pf_hash_fn(gfn
);
13168 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
13169 key
= kvm_async_pf_next_probe(key
);
13171 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
13174 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13177 u32 key
= kvm_async_pf_hash_fn(gfn
);
13179 for (i
= 0; i
< ASYNC_PF_PER_VCPU
&&
13180 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
13181 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
13182 key
= kvm_async_pf_next_probe(key
);
13187 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13189 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
13192 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
13196 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
13198 if (WARN_ON_ONCE(vcpu
->arch
.apf
.gfns
[i
] != gfn
))
13202 vcpu
->arch
.apf
.gfns
[i
] = ~0;
13204 j
= kvm_async_pf_next_probe(j
);
13205 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
13207 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
13209 * k lies cyclically in ]i,j]
13211 * |....j i.k.| or |.k..j i...|
13213 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
13214 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
13219 static inline int apf_put_user_notpresent(struct kvm_vcpu
*vcpu
)
13221 u32 reason
= KVM_PV_REASON_PAGE_NOT_PRESENT
;
13223 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &reason
,
13227 static inline int apf_put_user_ready(struct kvm_vcpu
*vcpu
, u32 token
)
13229 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
13231 return kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
13232 &token
, offset
, sizeof(token
));
13235 static inline bool apf_pageready_slot_free(struct kvm_vcpu
*vcpu
)
13237 unsigned int offset
= offsetof(struct kvm_vcpu_pv_apf_data
, token
);
13240 if (kvm_read_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
,
13241 &val
, offset
, sizeof(val
)))
13247 static bool kvm_can_deliver_async_pf(struct kvm_vcpu
*vcpu
)
13250 if (!kvm_pv_async_pf_enabled(vcpu
))
13253 if (vcpu
->arch
.apf
.send_user_only
&&
13254 static_call(kvm_x86_get_cpl
)(vcpu
) == 0)
13257 if (is_guest_mode(vcpu
)) {
13259 * L1 needs to opt into the special #PF vmexits that are
13260 * used to deliver async page faults.
13262 return vcpu
->arch
.apf
.delivery_as_pf_vmexit
;
13265 * Play it safe in case the guest temporarily disables paging.
13266 * The real mode IDT in particular is unlikely to have a #PF
13269 return is_paging(vcpu
);
13273 bool kvm_can_do_async_pf(struct kvm_vcpu
*vcpu
)
13275 if (unlikely(!lapic_in_kernel(vcpu
) ||
13276 kvm_event_needs_reinjection(vcpu
) ||
13277 kvm_is_exception_pending(vcpu
)))
13280 if (kvm_hlt_in_guest(vcpu
->kvm
) && !kvm_can_deliver_async_pf(vcpu
))
13284 * If interrupts are off we cannot even use an artificial
13287 return kvm_arch_interrupt_allowed(vcpu
);
13290 bool kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
13291 struct kvm_async_pf
*work
)
13293 struct x86_exception fault
;
13295 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->cr2_or_gpa
);
13296 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
13298 if (kvm_can_deliver_async_pf(vcpu
) &&
13299 !apf_put_user_notpresent(vcpu
)) {
13300 fault
.vector
= PF_VECTOR
;
13301 fault
.error_code_valid
= true;
13302 fault
.error_code
= 0;
13303 fault
.nested_page_fault
= false;
13304 fault
.address
= work
->arch
.token
;
13305 fault
.async_page_fault
= true;
13306 kvm_inject_page_fault(vcpu
, &fault
);
13310 * It is not possible to deliver a paravirtualized asynchronous
13311 * page fault, but putting the guest in an artificial halt state
13312 * can be beneficial nevertheless: if an interrupt arrives, we
13313 * can deliver it timely and perhaps the guest will schedule
13314 * another process. When the instruction that triggered a page
13315 * fault is retried, hopefully the page will be ready in the host.
13317 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
13322 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
13323 struct kvm_async_pf
*work
)
13325 struct kvm_lapic_irq irq
= {
13326 .delivery_mode
= APIC_DM_FIXED
,
13327 .vector
= vcpu
->arch
.apf
.vec
13330 if (work
->wakeup_all
)
13331 work
->arch
.token
= ~0; /* broadcast wakeup */
13333 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
13334 trace_kvm_async_pf_ready(work
->arch
.token
, work
->cr2_or_gpa
);
13336 if ((work
->wakeup_all
|| work
->notpresent_injected
) &&
13337 kvm_pv_async_pf_enabled(vcpu
) &&
13338 !apf_put_user_ready(vcpu
, work
->arch
.token
)) {
13339 vcpu
->arch
.apf
.pageready_pending
= true;
13340 kvm_apic_set_irq(vcpu
, &irq
, NULL
);
13343 vcpu
->arch
.apf
.halted
= false;
13344 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
13347 void kvm_arch_async_page_present_queued(struct kvm_vcpu
*vcpu
)
13349 kvm_make_request(KVM_REQ_APF_READY
, vcpu
);
13350 if (!vcpu
->arch
.apf
.pageready_pending
)
13351 kvm_vcpu_kick(vcpu
);
13354 bool kvm_arch_can_dequeue_async_page_present(struct kvm_vcpu
*vcpu
)
13356 if (!kvm_pv_async_pf_enabled(vcpu
))
13359 return kvm_lapic_enabled(vcpu
) && apf_pageready_slot_free(vcpu
);
13362 void kvm_arch_start_assignment(struct kvm
*kvm
)
13364 if (atomic_inc_return(&kvm
->arch
.assigned_device_count
) == 1)
13365 static_call_cond(kvm_x86_pi_start_assignment
)(kvm
);
13367 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
13369 void kvm_arch_end_assignment(struct kvm
*kvm
)
13371 atomic_dec(&kvm
->arch
.assigned_device_count
);
13373 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
13375 bool noinstr
kvm_arch_has_assigned_device(struct kvm
*kvm
)
13377 return raw_atomic_read(&kvm
->arch
.assigned_device_count
);
13379 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
13381 static void kvm_noncoherent_dma_assignment_start_or_stop(struct kvm
*kvm
)
13384 * Non-coherent DMA assignment and de-assignment will affect
13385 * whether KVM honors guest MTRRs and cause changes in memtypes
13387 * So, pass %true unconditionally to indicate non-coherent DMA was,
13388 * or will be involved, and that zapping SPTEs might be necessary.
13390 if (__kvm_mmu_honors_guest_mtrrs(true))
13391 kvm_zap_gfn_range(kvm
, gpa_to_gfn(0), gpa_to_gfn(~0ULL));
13394 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
13396 if (atomic_inc_return(&kvm
->arch
.noncoherent_dma_count
) == 1)
13397 kvm_noncoherent_dma_assignment_start_or_stop(kvm
);
13399 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
13401 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
13403 if (!atomic_dec_return(&kvm
->arch
.noncoherent_dma_count
))
13404 kvm_noncoherent_dma_assignment_start_or_stop(kvm
);
13406 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
13408 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
13410 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
13412 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
13414 bool kvm_arch_has_irq_bypass(void)
13416 return enable_apicv
&& irq_remapping_cap(IRQ_POSTING_CAP
);
13419 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
13420 struct irq_bypass_producer
*prod
)
13422 struct kvm_kernel_irqfd
*irqfd
=
13423 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
13426 irqfd
->producer
= prod
;
13427 kvm_arch_start_assignment(irqfd
->kvm
);
13428 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
,
13429 prod
->irq
, irqfd
->gsi
, 1);
13432 kvm_arch_end_assignment(irqfd
->kvm
);
13437 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
13438 struct irq_bypass_producer
*prod
)
13441 struct kvm_kernel_irqfd
*irqfd
=
13442 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
13444 WARN_ON(irqfd
->producer
!= prod
);
13445 irqfd
->producer
= NULL
;
13448 * When producer of consumer is unregistered, we change back to
13449 * remapped mode, so we can re-use the current implementation
13450 * when the irq is masked/disabled or the consumer side (KVM
13451 * int this case doesn't want to receive the interrupts.
13453 ret
= static_call(kvm_x86_pi_update_irte
)(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
13455 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
13456 " fails: %d\n", irqfd
->consumer
.token
, ret
);
13458 kvm_arch_end_assignment(irqfd
->kvm
);
13461 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
13462 uint32_t guest_irq
, bool set
)
13464 return static_call(kvm_x86_pi_update_irte
)(kvm
, host_irq
, guest_irq
, set
);
13467 bool kvm_arch_irqfd_route_changed(struct kvm_kernel_irq_routing_entry
*old
,
13468 struct kvm_kernel_irq_routing_entry
*new)
13470 if (new->type
!= KVM_IRQ_ROUTING_MSI
)
13473 return !!memcmp(&old
->msi
, &new->msi
, sizeof(new->msi
));
13476 bool kvm_vector_hashing_enabled(void)
13478 return vector_hashing
;
13481 bool kvm_arch_no_poll(struct kvm_vcpu
*vcpu
)
13483 return (vcpu
->arch
.msr_kvm_poll_control
& 1) == 0;
13485 EXPORT_SYMBOL_GPL(kvm_arch_no_poll
);
13488 int kvm_spec_ctrl_test_value(u64 value
)
13491 * test that setting IA32_SPEC_CTRL to given value
13492 * is allowed by the host processor
13496 unsigned long flags
;
13499 local_irq_save(flags
);
13501 if (rdmsrl_safe(MSR_IA32_SPEC_CTRL
, &saved_value
))
13503 else if (wrmsrl_safe(MSR_IA32_SPEC_CTRL
, value
))
13506 wrmsrl(MSR_IA32_SPEC_CTRL
, saved_value
);
13508 local_irq_restore(flags
);
13512 EXPORT_SYMBOL_GPL(kvm_spec_ctrl_test_value
);
13514 void kvm_fixup_and_inject_pf_error(struct kvm_vcpu
*vcpu
, gva_t gva
, u16 error_code
)
13516 struct kvm_mmu
*mmu
= vcpu
->arch
.walk_mmu
;
13517 struct x86_exception fault
;
13518 u64 access
= error_code
&
13519 (PFERR_WRITE_MASK
| PFERR_FETCH_MASK
| PFERR_USER_MASK
);
13521 if (!(error_code
& PFERR_PRESENT_MASK
) ||
13522 mmu
->gva_to_gpa(vcpu
, mmu
, gva
, access
, &fault
) != INVALID_GPA
) {
13524 * If vcpu->arch.walk_mmu->gva_to_gpa succeeded, the page
13525 * tables probably do not match the TLB. Just proceed
13526 * with the error code that the processor gave.
13528 fault
.vector
= PF_VECTOR
;
13529 fault
.error_code_valid
= true;
13530 fault
.error_code
= error_code
;
13531 fault
.nested_page_fault
= false;
13532 fault
.address
= gva
;
13533 fault
.async_page_fault
= false;
13535 vcpu
->arch
.walk_mmu
->inject_page_fault(vcpu
, &fault
);
13537 EXPORT_SYMBOL_GPL(kvm_fixup_and_inject_pf_error
);
13540 * Handles kvm_read/write_guest_virt*() result and either injects #PF or returns
13541 * KVM_EXIT_INTERNAL_ERROR for cases not currently handled by KVM. Return value
13542 * indicates whether exit to userspace is needed.
13544 int kvm_handle_memory_failure(struct kvm_vcpu
*vcpu
, int r
,
13545 struct x86_exception
*e
)
13547 if (r
== X86EMUL_PROPAGATE_FAULT
) {
13548 if (KVM_BUG_ON(!e
, vcpu
->kvm
))
13551 kvm_inject_emulated_page_fault(vcpu
, e
);
13556 * In case kvm_read/write_guest_virt*() failed with X86EMUL_IO_NEEDED
13557 * while handling a VMX instruction KVM could've handled the request
13558 * correctly by exiting to userspace and performing I/O but there
13559 * doesn't seem to be a real use-case behind such requests, just return
13560 * KVM_EXIT_INTERNAL_ERROR for now.
13562 kvm_prepare_emulation_failure_exit(vcpu
);
13566 EXPORT_SYMBOL_GPL(kvm_handle_memory_failure
);
13568 int kvm_handle_invpcid(struct kvm_vcpu
*vcpu
, unsigned long type
, gva_t gva
)
13571 struct x86_exception e
;
13578 r
= kvm_read_guest_virt(vcpu
, gva
, &operand
, sizeof(operand
), &e
);
13579 if (r
!= X86EMUL_CONTINUE
)
13580 return kvm_handle_memory_failure(vcpu
, r
, &e
);
13582 if (operand
.pcid
>> 12 != 0) {
13583 kvm_inject_gp(vcpu
, 0);
13587 pcid_enabled
= kvm_is_cr4_bit_set(vcpu
, X86_CR4_PCIDE
);
13590 case INVPCID_TYPE_INDIV_ADDR
:
13591 if ((!pcid_enabled
&& (operand
.pcid
!= 0)) ||
13592 is_noncanonical_address(operand
.gla
, vcpu
)) {
13593 kvm_inject_gp(vcpu
, 0);
13596 kvm_mmu_invpcid_gva(vcpu
, operand
.gla
, operand
.pcid
);
13597 return kvm_skip_emulated_instruction(vcpu
);
13599 case INVPCID_TYPE_SINGLE_CTXT
:
13600 if (!pcid_enabled
&& (operand
.pcid
!= 0)) {
13601 kvm_inject_gp(vcpu
, 0);
13605 kvm_invalidate_pcid(vcpu
, operand
.pcid
);
13606 return kvm_skip_emulated_instruction(vcpu
);
13608 case INVPCID_TYPE_ALL_NON_GLOBAL
:
13610 * Currently, KVM doesn't mark global entries in the shadow
13611 * page tables, so a non-global flush just degenerates to a
13612 * global flush. If needed, we could optimize this later by
13613 * keeping track of global entries in shadow page tables.
13617 case INVPCID_TYPE_ALL_INCL_GLOBAL
:
13618 kvm_make_request(KVM_REQ_TLB_FLUSH_GUEST
, vcpu
);
13619 return kvm_skip_emulated_instruction(vcpu
);
13622 kvm_inject_gp(vcpu
, 0);
13626 EXPORT_SYMBOL_GPL(kvm_handle_invpcid
);
13628 static int complete_sev_es_emulated_mmio(struct kvm_vcpu
*vcpu
)
13630 struct kvm_run
*run
= vcpu
->run
;
13631 struct kvm_mmio_fragment
*frag
;
13634 BUG_ON(!vcpu
->mmio_needed
);
13636 /* Complete previous fragment */
13637 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
13638 len
= min(8u, frag
->len
);
13639 if (!vcpu
->mmio_is_write
)
13640 memcpy(frag
->data
, run
->mmio
.data
, len
);
13642 if (frag
->len
<= 8) {
13643 /* Switch to the next fragment. */
13645 vcpu
->mmio_cur_fragment
++;
13647 /* Go forward to the next mmio piece. */
13653 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
13654 vcpu
->mmio_needed
= 0;
13656 // VMG change, at this point, we're always done
13657 // RIP has already been advanced
13661 // More MMIO is needed
13662 run
->mmio
.phys_addr
= frag
->gpa
;
13663 run
->mmio
.len
= min(8u, frag
->len
);
13664 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
13665 if (run
->mmio
.is_write
)
13666 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
13667 run
->exit_reason
= KVM_EXIT_MMIO
;
13669 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13674 int kvm_sev_es_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
13678 struct kvm_mmio_fragment
*frag
;
13683 handled
= write_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
13684 if (handled
== bytes
)
13691 /*TODO: Check if need to increment number of frags */
13692 frag
= vcpu
->mmio_fragments
;
13693 vcpu
->mmio_nr_fragments
= 1;
13698 vcpu
->mmio_needed
= 1;
13699 vcpu
->mmio_cur_fragment
= 0;
13701 vcpu
->run
->mmio
.phys_addr
= gpa
;
13702 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
13703 vcpu
->run
->mmio
.is_write
= 1;
13704 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
13705 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
13707 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13711 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_write
);
13713 int kvm_sev_es_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t gpa
, unsigned int bytes
,
13717 struct kvm_mmio_fragment
*frag
;
13722 handled
= read_emultor
.read_write_mmio(vcpu
, gpa
, bytes
, data
);
13723 if (handled
== bytes
)
13730 /*TODO: Check if need to increment number of frags */
13731 frag
= vcpu
->mmio_fragments
;
13732 vcpu
->mmio_nr_fragments
= 1;
13737 vcpu
->mmio_needed
= 1;
13738 vcpu
->mmio_cur_fragment
= 0;
13740 vcpu
->run
->mmio
.phys_addr
= gpa
;
13741 vcpu
->run
->mmio
.len
= min(8u, frag
->len
);
13742 vcpu
->run
->mmio
.is_write
= 0;
13743 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
13745 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_mmio
;
13749 EXPORT_SYMBOL_GPL(kvm_sev_es_mmio_read
);
13751 static void advance_sev_es_emulated_pio(struct kvm_vcpu
*vcpu
, unsigned count
, int size
)
13753 vcpu
->arch
.sev_pio_count
-= count
;
13754 vcpu
->arch
.sev_pio_data
+= count
* size
;
13757 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
13758 unsigned int port
);
13760 static int complete_sev_es_emulated_outs(struct kvm_vcpu
*vcpu
)
13762 int size
= vcpu
->arch
.pio
.size
;
13763 int port
= vcpu
->arch
.pio
.port
;
13765 vcpu
->arch
.pio
.count
= 0;
13766 if (vcpu
->arch
.sev_pio_count
)
13767 return kvm_sev_es_outs(vcpu
, size
, port
);
13771 static int kvm_sev_es_outs(struct kvm_vcpu
*vcpu
, unsigned int size
,
13775 unsigned int count
=
13776 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13777 int ret
= emulator_pio_out(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
);
13779 /* memcpy done already by emulator_pio_out. */
13780 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13784 /* Emulation done by the kernel. */
13785 if (!vcpu
->arch
.sev_pio_count
)
13789 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_outs
;
13793 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13794 unsigned int port
);
13796 static int complete_sev_es_emulated_ins(struct kvm_vcpu
*vcpu
)
13798 unsigned count
= vcpu
->arch
.pio
.count
;
13799 int size
= vcpu
->arch
.pio
.size
;
13800 int port
= vcpu
->arch
.pio
.port
;
13802 complete_emulator_pio_in(vcpu
, vcpu
->arch
.sev_pio_data
);
13803 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13804 if (vcpu
->arch
.sev_pio_count
)
13805 return kvm_sev_es_ins(vcpu
, size
, port
);
13809 static int kvm_sev_es_ins(struct kvm_vcpu
*vcpu
, unsigned int size
,
13813 unsigned int count
=
13814 min_t(unsigned int, PAGE_SIZE
/ size
, vcpu
->arch
.sev_pio_count
);
13815 if (!emulator_pio_in(vcpu
, size
, port
, vcpu
->arch
.sev_pio_data
, count
))
13818 /* Emulation done by the kernel. */
13819 advance_sev_es_emulated_pio(vcpu
, count
, size
);
13820 if (!vcpu
->arch
.sev_pio_count
)
13824 vcpu
->arch
.complete_userspace_io
= complete_sev_es_emulated_ins
;
13828 int kvm_sev_es_string_io(struct kvm_vcpu
*vcpu
, unsigned int size
,
13829 unsigned int port
, void *data
, unsigned int count
,
13832 vcpu
->arch
.sev_pio_data
= data
;
13833 vcpu
->arch
.sev_pio_count
= count
;
13834 return in
? kvm_sev_es_ins(vcpu
, size
, port
)
13835 : kvm_sev_es_outs(vcpu
, size
, port
);
13837 EXPORT_SYMBOL_GPL(kvm_sev_es_string_io
);
13839 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_entry
);
13840 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
13841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
13842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
13843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
13844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
13845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
13846 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter
);
13847 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
13848 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
13849 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
13850 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed
);
13851 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
13852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
13853 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
13854 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
13855 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update
);
13856 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
13857 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
13858 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
13859 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);
13860 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_ga_log
);
13861 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_kick_vcpu_slowpath
);
13862 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_doorbell
);
13863 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_apicv_accept_irq
);
13864 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_enter
);
13865 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_exit
);
13866 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_enter
);
13867 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_vmgexit_msr_protocol_exit
);
13869 static int __init
kvm_x86_init(void)
13871 kvm_mmu_x86_module_init();
13872 mitigate_smt_rsb
&= boot_cpu_has_bug(X86_BUG_SMT_RSB
) && cpu_smt_possible();
13875 module_init(kvm_x86_init
);
13877 static void __exit
kvm_x86_exit(void)
13880 * If module_init() is implemented, module_exit() must also be
13881 * implemented to allow module unload.
13884 module_exit(kvm_x86_exit
);