1 // SPDX-License-Identifier: GPL-2.0-only
3 * Kernel-based Virtual Machine driver for Linux
5 * derived from drivers/kvm/kvm_main.c
7 * Copyright (C) 2006 Qumranet, Inc.
8 * Copyright (C) 2008 Qumranet, Inc.
9 * Copyright IBM Corporation, 2008
10 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
13 * Avi Kivity <avi@qumranet.com>
14 * Yaniv Kamay <yaniv@qumranet.com>
15 * Amit Shah <amit.shah@qumranet.com>
16 * Ben-Ami Yassour <benami@il.ibm.com>
19 #include <linux/kvm_host.h>
24 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/export.h>
36 #include <linux/moduleparam.h>
37 #include <linux/mman.h>
38 #include <linux/highmem.h>
39 #include <linux/iommu.h>
40 #include <linux/intel-iommu.h>
41 #include <linux/cpufreq.h>
42 #include <linux/user-return-notifier.h>
43 #include <linux/srcu.h>
44 #include <linux/slab.h>
45 #include <linux/perf_event.h>
46 #include <linux/uaccess.h>
47 #include <linux/hash.h>
48 #include <linux/pci.h>
49 #include <linux/timekeeper_internal.h>
50 #include <linux/pvclock_gtod.h>
51 #include <linux/kvm_irqfd.h>
52 #include <linux/irqbypass.h>
53 #include <linux/sched/stat.h>
54 #include <linux/mem_encrypt.h>
56 #include <trace/events/kvm.h>
58 #include <asm/debugreg.h>
62 #include <linux/kernel_stat.h>
63 #include <asm/fpu/internal.h> /* Ugh! */
64 #include <asm/pvclock.h>
65 #include <asm/div64.h>
66 #include <asm/irq_remapping.h>
67 #include <asm/mshyperv.h>
68 #include <asm/hypervisor.h>
69 #include <asm/intel_pt.h>
71 #define CREATE_TRACE_POINTS
74 #define MAX_IO_MSRS 256
75 #define KVM_MAX_MCE_BANKS 32
76 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
77 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
79 #define emul_to_vcpu(ctxt) \
80 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
83 * - enable syscall per default because its emulated by KVM
84 * - enable LME and LMA per default on 64 bit KVM
88 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
90 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
93 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
94 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
96 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
97 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
99 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
100 static void process_nmi(struct kvm_vcpu
*vcpu
);
101 static void enter_smm(struct kvm_vcpu
*vcpu
);
102 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 static void store_regs(struct kvm_vcpu
*vcpu
);
104 static int sync_regs(struct kvm_vcpu
*vcpu
);
106 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
107 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
109 static bool __read_mostly ignore_msrs
= 0;
110 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly report_ignored_msrs
= true;
113 module_param(report_ignored_msrs
, bool, S_IRUGO
| S_IWUSR
);
115 unsigned int min_timer_period_us
= 200;
116 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
118 static bool __read_mostly kvmclock_periodic_sync
= true;
119 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
121 bool __read_mostly kvm_has_tsc_control
;
122 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
123 u32 __read_mostly kvm_max_guest_tsc_khz
;
124 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
125 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
126 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
127 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
128 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
129 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
130 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
132 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
133 static u32 __read_mostly tsc_tolerance_ppm
= 250;
134 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
137 * lapic timer advance (tscdeadline mode only) in nanoseconds. '-1' enables
138 * adaptive tuning starting from default advancment of 1000ns. '0' disables
139 * advancement entirely. Any other value is used as-is and disables adaptive
140 * tuning, i.e. allows priveleged userspace to set an exact advancement time.
142 static int __read_mostly lapic_timer_advance_ns
= -1;
143 module_param(lapic_timer_advance_ns
, int, S_IRUGO
| S_IWUSR
);
145 static bool __read_mostly vector_hashing
= true;
146 module_param(vector_hashing
, bool, S_IRUGO
);
148 bool __read_mostly enable_vmware_backdoor
= false;
149 module_param(enable_vmware_backdoor
, bool, S_IRUGO
);
150 EXPORT_SYMBOL_GPL(enable_vmware_backdoor
);
152 static bool __read_mostly force_emulation_prefix
= false;
153 module_param(force_emulation_prefix
, bool, S_IRUGO
);
155 #define KVM_NR_SHARED_MSRS 16
157 struct kvm_shared_msrs_global
{
159 u32 msrs
[KVM_NR_SHARED_MSRS
];
162 struct kvm_shared_msrs
{
163 struct user_return_notifier urn
;
165 struct kvm_shared_msr_values
{
168 } values
[KVM_NR_SHARED_MSRS
];
171 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
172 static struct kvm_shared_msrs __percpu
*shared_msrs
;
174 struct kvm_stats_debugfs_item debugfs_entries
[] = {
175 { "pf_fixed", VCPU_STAT(pf_fixed
) },
176 { "pf_guest", VCPU_STAT(pf_guest
) },
177 { "tlb_flush", VCPU_STAT(tlb_flush
) },
178 { "invlpg", VCPU_STAT(invlpg
) },
179 { "exits", VCPU_STAT(exits
) },
180 { "io_exits", VCPU_STAT(io_exits
) },
181 { "mmio_exits", VCPU_STAT(mmio_exits
) },
182 { "signal_exits", VCPU_STAT(signal_exits
) },
183 { "irq_window", VCPU_STAT(irq_window_exits
) },
184 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
185 { "halt_exits", VCPU_STAT(halt_exits
) },
186 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
187 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
188 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
189 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
190 { "hypercalls", VCPU_STAT(hypercalls
) },
191 { "request_irq", VCPU_STAT(request_irq_exits
) },
192 { "irq_exits", VCPU_STAT(irq_exits
) },
193 { "host_state_reload", VCPU_STAT(host_state_reload
) },
194 { "fpu_reload", VCPU_STAT(fpu_reload
) },
195 { "insn_emulation", VCPU_STAT(insn_emulation
) },
196 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
197 { "irq_injections", VCPU_STAT(irq_injections
) },
198 { "nmi_injections", VCPU_STAT(nmi_injections
) },
199 { "req_event", VCPU_STAT(req_event
) },
200 { "l1d_flush", VCPU_STAT(l1d_flush
) },
201 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
202 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
203 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
204 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
205 { "mmu_flooded", VM_STAT(mmu_flooded
) },
206 { "mmu_recycled", VM_STAT(mmu_recycled
) },
207 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
208 { "mmu_unsync", VM_STAT(mmu_unsync
) },
209 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
210 { "largepages", VM_STAT(lpages
) },
211 { "max_mmu_page_hash_collisions",
212 VM_STAT(max_mmu_page_hash_collisions
) },
216 u64 __read_mostly host_xcr0
;
218 struct kmem_cache
*x86_fpu_cache
;
219 EXPORT_SYMBOL_GPL(x86_fpu_cache
);
221 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
223 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
226 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
227 vcpu
->arch
.apf
.gfns
[i
] = ~0;
230 static void kvm_on_user_return(struct user_return_notifier
*urn
)
233 struct kvm_shared_msrs
*locals
234 = container_of(urn
, struct kvm_shared_msrs
, urn
);
235 struct kvm_shared_msr_values
*values
;
239 * Disabling irqs at this point since the following code could be
240 * interrupted and executed through kvm_arch_hardware_disable()
242 local_irq_save(flags
);
243 if (locals
->registered
) {
244 locals
->registered
= false;
245 user_return_notifier_unregister(urn
);
247 local_irq_restore(flags
);
248 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
249 values
= &locals
->values
[slot
];
250 if (values
->host
!= values
->curr
) {
251 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
252 values
->curr
= values
->host
;
257 static void shared_msr_update(unsigned slot
, u32 msr
)
260 unsigned int cpu
= smp_processor_id();
261 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
263 /* only read, and nobody should modify it at this time,
264 * so don't need lock */
265 if (slot
>= shared_msrs_global
.nr
) {
266 printk(KERN_ERR
"kvm: invalid MSR slot!");
269 rdmsrl_safe(msr
, &value
);
270 smsr
->values
[slot
].host
= value
;
271 smsr
->values
[slot
].curr
= value
;
274 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
276 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
277 shared_msrs_global
.msrs
[slot
] = msr
;
278 if (slot
>= shared_msrs_global
.nr
)
279 shared_msrs_global
.nr
= slot
+ 1;
281 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
283 static void kvm_shared_msr_cpu_online(void)
287 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
288 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
291 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
293 unsigned int cpu
= smp_processor_id();
294 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
297 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
299 smsr
->values
[slot
].curr
= value
;
300 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
304 if (!smsr
->registered
) {
305 smsr
->urn
.on_user_return
= kvm_on_user_return
;
306 user_return_notifier_register(&smsr
->urn
);
307 smsr
->registered
= true;
311 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
313 static void drop_user_return_notifiers(void)
315 unsigned int cpu
= smp_processor_id();
316 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
318 if (smsr
->registered
)
319 kvm_on_user_return(&smsr
->urn
);
322 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
324 return vcpu
->arch
.apic_base
;
326 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
328 enum lapic_mode
kvm_get_apic_mode(struct kvm_vcpu
*vcpu
)
330 return kvm_apic_mode(kvm_get_apic_base(vcpu
));
332 EXPORT_SYMBOL_GPL(kvm_get_apic_mode
);
334 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
336 enum lapic_mode old_mode
= kvm_get_apic_mode(vcpu
);
337 enum lapic_mode new_mode
= kvm_apic_mode(msr_info
->data
);
338 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
339 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
341 if ((msr_info
->data
& reserved_bits
) != 0 || new_mode
== LAPIC_MODE_INVALID
)
343 if (!msr_info
->host_initiated
) {
344 if (old_mode
== LAPIC_MODE_X2APIC
&& new_mode
== LAPIC_MODE_XAPIC
)
346 if (old_mode
== LAPIC_MODE_DISABLED
&& new_mode
== LAPIC_MODE_X2APIC
)
350 kvm_lapic_set_base(vcpu
, msr_info
->data
);
353 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
355 asmlinkage __visible
void kvm_spurious_fault(void)
357 /* Fault while not rebooting. We want the trace. */
360 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
362 #define EXCPT_BENIGN 0
363 #define EXCPT_CONTRIBUTORY 1
366 static int exception_class(int vector
)
376 return EXCPT_CONTRIBUTORY
;
383 #define EXCPT_FAULT 0
385 #define EXCPT_ABORT 2
386 #define EXCPT_INTERRUPT 3
388 static int exception_type(int vector
)
392 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
393 return EXCPT_INTERRUPT
;
397 /* #DB is trap, as instruction watchpoints are handled elsewhere */
398 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
401 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
404 /* Reserved exceptions will result in fault */
408 void kvm_deliver_exception_payload(struct kvm_vcpu
*vcpu
)
410 unsigned nr
= vcpu
->arch
.exception
.nr
;
411 bool has_payload
= vcpu
->arch
.exception
.has_payload
;
412 unsigned long payload
= vcpu
->arch
.exception
.payload
;
420 * "Certain debug exceptions may clear bit 0-3. The
421 * remaining contents of the DR6 register are never
422 * cleared by the processor".
424 vcpu
->arch
.dr6
&= ~DR_TRAP_BITS
;
426 * DR6.RTM is set by all #DB exceptions that don't clear it.
428 vcpu
->arch
.dr6
|= DR6_RTM
;
429 vcpu
->arch
.dr6
|= payload
;
431 * Bit 16 should be set in the payload whenever the #DB
432 * exception should clear DR6.RTM. This makes the payload
433 * compatible with the pending debug exceptions under VMX.
434 * Though not currently documented in the SDM, this also
435 * makes the payload compatible with the exit qualification
436 * for #DB exceptions under VMX.
438 vcpu
->arch
.dr6
^= payload
& DR6_RTM
;
441 vcpu
->arch
.cr2
= payload
;
445 vcpu
->arch
.exception
.has_payload
= false;
446 vcpu
->arch
.exception
.payload
= 0;
448 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload
);
450 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
451 unsigned nr
, bool has_error
, u32 error_code
,
452 bool has_payload
, unsigned long payload
, bool reinject
)
457 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
459 if (!vcpu
->arch
.exception
.pending
&& !vcpu
->arch
.exception
.injected
) {
461 if (has_error
&& !is_protmode(vcpu
))
465 * On vmentry, vcpu->arch.exception.pending is only
466 * true if an event injection was blocked by
467 * nested_run_pending. In that case, however,
468 * vcpu_enter_guest requests an immediate exit,
469 * and the guest shouldn't proceed far enough to
472 WARN_ON_ONCE(vcpu
->arch
.exception
.pending
);
473 vcpu
->arch
.exception
.injected
= true;
474 if (WARN_ON_ONCE(has_payload
)) {
476 * A reinjected event has already
477 * delivered its payload.
483 vcpu
->arch
.exception
.pending
= true;
484 vcpu
->arch
.exception
.injected
= false;
486 vcpu
->arch
.exception
.has_error_code
= has_error
;
487 vcpu
->arch
.exception
.nr
= nr
;
488 vcpu
->arch
.exception
.error_code
= error_code
;
489 vcpu
->arch
.exception
.has_payload
= has_payload
;
490 vcpu
->arch
.exception
.payload
= payload
;
492 * In guest mode, payload delivery should be deferred,
493 * so that the L1 hypervisor can intercept #PF before
494 * CR2 is modified (or intercept #DB before DR6 is
495 * modified under nVMX). However, for ABI
496 * compatibility with KVM_GET_VCPU_EVENTS and
497 * KVM_SET_VCPU_EVENTS, we can't delay payload
498 * delivery unless userspace has enabled this
499 * functionality via the per-VM capability,
500 * KVM_CAP_EXCEPTION_PAYLOAD.
502 if (!vcpu
->kvm
->arch
.exception_payload_enabled
||
503 !is_guest_mode(vcpu
))
504 kvm_deliver_exception_payload(vcpu
);
508 /* to check exception */
509 prev_nr
= vcpu
->arch
.exception
.nr
;
510 if (prev_nr
== DF_VECTOR
) {
511 /* triple fault -> shutdown */
512 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
515 class1
= exception_class(prev_nr
);
516 class2
= exception_class(nr
);
517 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
518 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
520 * Generate double fault per SDM Table 5-5. Set
521 * exception.pending = true so that the double fault
522 * can trigger a nested vmexit.
524 vcpu
->arch
.exception
.pending
= true;
525 vcpu
->arch
.exception
.injected
= false;
526 vcpu
->arch
.exception
.has_error_code
= true;
527 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
528 vcpu
->arch
.exception
.error_code
= 0;
529 vcpu
->arch
.exception
.has_payload
= false;
530 vcpu
->arch
.exception
.payload
= 0;
532 /* replace previous exception with a new one in a hope
533 that instruction re-execution will regenerate lost
538 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
540 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, false);
542 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
544 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
546 kvm_multiple_exception(vcpu
, nr
, false, 0, false, 0, true);
548 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
550 static void kvm_queue_exception_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
551 unsigned long payload
)
553 kvm_multiple_exception(vcpu
, nr
, false, 0, true, payload
, false);
556 static void kvm_queue_exception_e_p(struct kvm_vcpu
*vcpu
, unsigned nr
,
557 u32 error_code
, unsigned long payload
)
559 kvm_multiple_exception(vcpu
, nr
, true, error_code
,
560 true, payload
, false);
563 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
566 kvm_inject_gp(vcpu
, 0);
568 return kvm_skip_emulated_instruction(vcpu
);
572 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
574 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
576 ++vcpu
->stat
.pf_guest
;
577 vcpu
->arch
.exception
.nested_apf
=
578 is_guest_mode(vcpu
) && fault
->async_page_fault
;
579 if (vcpu
->arch
.exception
.nested_apf
) {
580 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
581 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
583 kvm_queue_exception_e_p(vcpu
, PF_VECTOR
, fault
->error_code
,
587 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
589 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
591 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
592 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
594 vcpu
->arch
.mmu
->inject_page_fault(vcpu
, fault
);
596 return fault
->nested_page_fault
;
599 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
601 atomic_inc(&vcpu
->arch
.nmi_queued
);
602 kvm_make_request(KVM_REQ_NMI
, vcpu
);
604 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
606 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
608 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, false);
610 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
612 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
614 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false, 0, true);
616 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
619 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
620 * a #GP and return false.
622 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
624 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
626 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
629 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
631 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
633 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
636 kvm_queue_exception(vcpu
, UD_VECTOR
);
639 EXPORT_SYMBOL_GPL(kvm_require_dr
);
642 * This function will be used to read from the physical memory of the currently
643 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
644 * can read from guest physical or from the guest's guest physical memory.
646 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
647 gfn_t ngfn
, void *data
, int offset
, int len
,
650 struct x86_exception exception
;
654 ngpa
= gfn_to_gpa(ngfn
);
655 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
656 if (real_gfn
== UNMAPPED_GVA
)
659 real_gfn
= gpa_to_gfn(real_gfn
);
661 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
663 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
665 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
666 void *data
, int offset
, int len
, u32 access
)
668 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
669 data
, offset
, len
, access
);
673 * Load the pae pdptrs. Return true is they are all valid.
675 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
677 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
678 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
681 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
683 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
684 offset
* sizeof(u64
), sizeof(pdpte
),
685 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
690 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
691 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
693 vcpu
->arch
.mmu
->guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
700 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
701 __set_bit(VCPU_EXREG_PDPTR
,
702 (unsigned long *)&vcpu
->arch
.regs_avail
);
703 __set_bit(VCPU_EXREG_PDPTR
,
704 (unsigned long *)&vcpu
->arch
.regs_dirty
);
709 EXPORT_SYMBOL_GPL(load_pdptrs
);
711 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
713 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
719 if (is_long_mode(vcpu
) || !is_pae(vcpu
) || !is_paging(vcpu
))
722 if (!test_bit(VCPU_EXREG_PDPTR
,
723 (unsigned long *)&vcpu
->arch
.regs_avail
))
726 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
727 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
728 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
729 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
732 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
737 EXPORT_SYMBOL_GPL(pdptrs_changed
);
739 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
741 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
742 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
747 if (cr0
& 0xffffffff00000000UL
)
751 cr0
&= ~CR0_RESERVED_BITS
;
753 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
756 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
759 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
761 if ((vcpu
->arch
.efer
& EFER_LME
)) {
766 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
771 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
776 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
779 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
781 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
782 kvm_clear_async_pf_completion_queue(vcpu
);
783 kvm_async_pf_hash_reset(vcpu
);
786 if ((cr0
^ old_cr0
) & update_bits
)
787 kvm_mmu_reset_context(vcpu
);
789 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
790 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
791 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
792 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
796 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
798 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
800 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
802 EXPORT_SYMBOL_GPL(kvm_lmsw
);
804 void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
806 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
807 !vcpu
->guest_xcr0_loaded
) {
808 /* kvm_set_xcr() also depends on this */
809 if (vcpu
->arch
.xcr0
!= host_xcr0
)
810 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
811 vcpu
->guest_xcr0_loaded
= 1;
814 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0
);
816 void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
818 if (vcpu
->guest_xcr0_loaded
) {
819 if (vcpu
->arch
.xcr0
!= host_xcr0
)
820 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
821 vcpu
->guest_xcr0_loaded
= 0;
824 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0
);
826 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
829 u64 old_xcr0
= vcpu
->arch
.xcr0
;
832 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
833 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
835 if (!(xcr0
& XFEATURE_MASK_FP
))
837 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
841 * Do not allow the guest to set bits that we do not support
842 * saving. However, xcr0 bit 0 is always set, even if the
843 * emulated CPU does not support XSAVE (see fx_init).
845 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
846 if (xcr0
& ~valid_bits
)
849 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
850 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
853 if (xcr0
& XFEATURE_MASK_AVX512
) {
854 if (!(xcr0
& XFEATURE_MASK_YMM
))
856 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
859 vcpu
->arch
.xcr0
= xcr0
;
861 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
862 kvm_update_cpuid(vcpu
);
866 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
868 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
869 __kvm_set_xcr(vcpu
, index
, xcr
)) {
870 kvm_inject_gp(vcpu
, 0);
875 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
877 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
879 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
880 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
881 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
883 if (cr4
& CR4_RESERVED_BITS
)
886 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
889 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
892 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
895 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
898 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
901 if (!guest_cpuid_has(vcpu
, X86_FEATURE_LA57
) && (cr4
& X86_CR4_LA57
))
904 if (!guest_cpuid_has(vcpu
, X86_FEATURE_UMIP
) && (cr4
& X86_CR4_UMIP
))
907 if (is_long_mode(vcpu
)) {
908 if (!(cr4
& X86_CR4_PAE
))
910 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
911 && ((cr4
^ old_cr4
) & pdptr_bits
)
912 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
916 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
917 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
920 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
921 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
925 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
928 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
929 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
930 kvm_mmu_reset_context(vcpu
);
932 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
933 kvm_update_cpuid(vcpu
);
937 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
939 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
941 bool skip_tlb_flush
= false;
943 bool pcid_enabled
= kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
);
946 skip_tlb_flush
= cr3
& X86_CR3_PCID_NOFLUSH
;
947 cr3
&= ~X86_CR3_PCID_NOFLUSH
;
951 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
952 if (!skip_tlb_flush
) {
953 kvm_mmu_sync_roots(vcpu
);
954 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
959 if (is_long_mode(vcpu
) &&
960 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 63)))
962 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
963 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
966 kvm_mmu_new_cr3(vcpu
, cr3
, skip_tlb_flush
);
967 vcpu
->arch
.cr3
= cr3
;
968 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
972 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
974 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
976 if (cr8
& CR8_RESERVED_BITS
)
978 if (lapic_in_kernel(vcpu
))
979 kvm_lapic_set_tpr(vcpu
, cr8
);
981 vcpu
->arch
.cr8
= cr8
;
984 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
986 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
988 if (lapic_in_kernel(vcpu
))
989 return kvm_lapic_get_cr8(vcpu
);
991 return vcpu
->arch
.cr8
;
993 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
995 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
999 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
1000 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
1001 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
1002 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
1006 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
1008 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1009 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
1012 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
1016 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1017 dr7
= vcpu
->arch
.guest_debug_dr7
;
1019 dr7
= vcpu
->arch
.dr7
;
1020 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
1021 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
1022 if (dr7
& DR7_BP_EN_MASK
)
1023 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
1026 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
1028 u64 fixed
= DR6_FIXED_1
;
1030 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
1035 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1039 vcpu
->arch
.db
[dr
] = val
;
1040 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
1041 vcpu
->arch
.eff_db
[dr
] = val
;
1046 if (val
& 0xffffffff00000000ULL
)
1047 return -1; /* #GP */
1048 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
1049 kvm_update_dr6(vcpu
);
1054 if (val
& 0xffffffff00000000ULL
)
1055 return -1; /* #GP */
1056 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
1057 kvm_update_dr7(vcpu
);
1064 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
1066 if (__kvm_set_dr(vcpu
, dr
, val
)) {
1067 kvm_inject_gp(vcpu
, 0);
1072 EXPORT_SYMBOL_GPL(kvm_set_dr
);
1074 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
1078 *val
= vcpu
->arch
.db
[dr
];
1083 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
1084 *val
= vcpu
->arch
.dr6
;
1086 *val
= kvm_x86_ops
->get_dr6(vcpu
);
1091 *val
= vcpu
->arch
.dr7
;
1096 EXPORT_SYMBOL_GPL(kvm_get_dr
);
1098 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
1100 u32 ecx
= kvm_rcx_read(vcpu
);
1104 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
1107 kvm_rax_write(vcpu
, (u32
)data
);
1108 kvm_rdx_write(vcpu
, data
>> 32);
1111 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
1114 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1115 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1117 * This list is modified at module load time to reflect the
1118 * capabilities of the host cpu. This capabilities test skips MSRs that are
1119 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1120 * may depend on host virtualization features rather than host cpu features.
1123 static u32 msrs_to_save
[] = {
1124 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
1126 #ifdef CONFIG_X86_64
1127 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
1129 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
1130 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
1132 MSR_IA32_RTIT_CTL
, MSR_IA32_RTIT_STATUS
, MSR_IA32_RTIT_CR3_MATCH
,
1133 MSR_IA32_RTIT_OUTPUT_BASE
, MSR_IA32_RTIT_OUTPUT_MASK
,
1134 MSR_IA32_RTIT_ADDR0_A
, MSR_IA32_RTIT_ADDR0_B
,
1135 MSR_IA32_RTIT_ADDR1_A
, MSR_IA32_RTIT_ADDR1_B
,
1136 MSR_IA32_RTIT_ADDR2_A
, MSR_IA32_RTIT_ADDR2_B
,
1137 MSR_IA32_RTIT_ADDR3_A
, MSR_IA32_RTIT_ADDR3_B
,
1140 static unsigned num_msrs_to_save
;
1142 static u32 emulated_msrs
[] = {
1143 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
1144 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
1145 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
1146 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
1147 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
1148 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
1149 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1151 HV_X64_MSR_VP_INDEX
,
1152 HV_X64_MSR_VP_RUNTIME
,
1153 HV_X64_MSR_SCONTROL
,
1154 HV_X64_MSR_STIMER0_CONFIG
,
1155 HV_X64_MSR_VP_ASSIST_PAGE
,
1156 HV_X64_MSR_REENLIGHTENMENT_CONTROL
, HV_X64_MSR_TSC_EMULATION_CONTROL
,
1157 HV_X64_MSR_TSC_EMULATION_STATUS
,
1159 MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1162 MSR_IA32_TSC_ADJUST
,
1163 MSR_IA32_TSCDEADLINE
,
1164 MSR_IA32_ARCH_CAPABILITIES
,
1165 MSR_IA32_MISC_ENABLE
,
1166 MSR_IA32_MCG_STATUS
,
1168 MSR_IA32_MCG_EXT_CTL
,
1172 MSR_MISC_FEATURES_ENABLES
,
1173 MSR_AMD64_VIRT_SPEC_CTRL
,
1179 static unsigned num_emulated_msrs
;
1182 * List of msr numbers which are used to expose MSR-based features that
1183 * can be used by a hypervisor to validate requested CPU features.
1185 static u32 msr_based_features
[] = {
1187 MSR_IA32_VMX_TRUE_PINBASED_CTLS
,
1188 MSR_IA32_VMX_PINBASED_CTLS
,
1189 MSR_IA32_VMX_TRUE_PROCBASED_CTLS
,
1190 MSR_IA32_VMX_PROCBASED_CTLS
,
1191 MSR_IA32_VMX_TRUE_EXIT_CTLS
,
1192 MSR_IA32_VMX_EXIT_CTLS
,
1193 MSR_IA32_VMX_TRUE_ENTRY_CTLS
,
1194 MSR_IA32_VMX_ENTRY_CTLS
,
1196 MSR_IA32_VMX_CR0_FIXED0
,
1197 MSR_IA32_VMX_CR0_FIXED1
,
1198 MSR_IA32_VMX_CR4_FIXED0
,
1199 MSR_IA32_VMX_CR4_FIXED1
,
1200 MSR_IA32_VMX_VMCS_ENUM
,
1201 MSR_IA32_VMX_PROCBASED_CTLS2
,
1202 MSR_IA32_VMX_EPT_VPID_CAP
,
1203 MSR_IA32_VMX_VMFUNC
,
1207 MSR_IA32_ARCH_CAPABILITIES
,
1210 static unsigned int num_msr_based_features
;
1212 u64
kvm_get_arch_capabilities(void)
1216 rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES
, &data
);
1219 * If we're doing cache flushes (either "always" or "cond")
1220 * we will do one whenever the guest does a vmlaunch/vmresume.
1221 * If an outer hypervisor is doing the cache flush for us
1222 * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1223 * capability to the guest too, and if EPT is disabled we're not
1224 * vulnerable. Overall, only VMENTER_L1D_FLUSH_NEVER will
1225 * require a nested hypervisor to do a flush of its own.
1227 if (l1tf_vmx_mitigation
!= VMENTER_L1D_FLUSH_NEVER
)
1228 data
|= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH
;
1232 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities
);
1234 static int kvm_get_msr_feature(struct kvm_msr_entry
*msr
)
1236 switch (msr
->index
) {
1237 case MSR_IA32_ARCH_CAPABILITIES
:
1238 msr
->data
= kvm_get_arch_capabilities();
1240 case MSR_IA32_UCODE_REV
:
1241 rdmsrl_safe(msr
->index
, &msr
->data
);
1244 if (kvm_x86_ops
->get_msr_feature(msr
))
1250 static int do_get_msr_feature(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1252 struct kvm_msr_entry msr
;
1256 r
= kvm_get_msr_feature(&msr
);
1265 static bool __kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1267 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1270 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1273 if (efer
& (EFER_LME
| EFER_LMA
) &&
1274 !guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
1277 if (efer
& EFER_NX
&& !guest_cpuid_has(vcpu
, X86_FEATURE_NX
))
1283 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1285 if (efer
& efer_reserved_bits
)
1288 return __kvm_valid_efer(vcpu
, efer
);
1290 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1292 static int set_efer(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
1294 u64 old_efer
= vcpu
->arch
.efer
;
1295 u64 efer
= msr_info
->data
;
1297 if (efer
& efer_reserved_bits
)
1300 if (!msr_info
->host_initiated
) {
1301 if (!__kvm_valid_efer(vcpu
, efer
))
1304 if (is_paging(vcpu
) &&
1305 (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1310 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1312 kvm_x86_ops
->set_efer(vcpu
, efer
);
1314 /* Update reserved bits */
1315 if ((efer
^ old_efer
) & EFER_NX
)
1316 kvm_mmu_reset_context(vcpu
);
1321 void kvm_enable_efer_bits(u64 mask
)
1323 efer_reserved_bits
&= ~mask
;
1325 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1328 * Writes msr value into into the appropriate "register".
1329 * Returns 0 on success, non-0 otherwise.
1330 * Assumes vcpu_load() was already called.
1332 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1334 switch (msr
->index
) {
1337 case MSR_KERNEL_GS_BASE
:
1340 if (is_noncanonical_address(msr
->data
, vcpu
))
1343 case MSR_IA32_SYSENTER_EIP
:
1344 case MSR_IA32_SYSENTER_ESP
:
1346 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1347 * non-canonical address is written on Intel but not on
1348 * AMD (which ignores the top 32-bits, because it does
1349 * not implement 64-bit SYSENTER).
1351 * 64-bit code should hence be able to write a non-canonical
1352 * value on AMD. Making the address canonical ensures that
1353 * vmentry does not fail on Intel after writing a non-canonical
1354 * value, and that something deterministic happens if the guest
1355 * invokes 64-bit SYSENTER.
1357 msr
->data
= get_canonical(msr
->data
, vcpu_virt_addr_bits(vcpu
));
1359 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1361 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1364 * Adapt set_msr() to msr_io()'s calling convention
1366 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1368 struct msr_data msr
;
1372 msr
.host_initiated
= true;
1373 r
= kvm_get_msr(vcpu
, &msr
);
1381 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1383 struct msr_data msr
;
1387 msr
.host_initiated
= true;
1388 return kvm_set_msr(vcpu
, &msr
);
1391 #ifdef CONFIG_X86_64
1392 struct pvclock_gtod_data
{
1395 struct { /* extract of a clocksource struct */
1408 static struct pvclock_gtod_data pvclock_gtod_data
;
1410 static void update_pvclock_gtod(struct timekeeper
*tk
)
1412 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1415 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1417 write_seqcount_begin(&vdata
->seq
);
1419 /* copy pvclock gtod data */
1420 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1421 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1422 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1423 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1424 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1426 vdata
->boot_ns
= boot_ns
;
1427 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1429 vdata
->wall_time_sec
= tk
->xtime_sec
;
1431 write_seqcount_end(&vdata
->seq
);
1435 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1438 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1439 * vcpu_enter_guest. This function is only called from
1440 * the physical CPU that is running vcpu.
1442 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1445 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1449 struct pvclock_wall_clock wc
;
1450 struct timespec64 boot
;
1455 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1460 ++version
; /* first time write, random junk */
1464 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1468 * The guest calculates current wall clock time by adding
1469 * system time (updated by kvm_guest_time_update below) to the
1470 * wall clock specified here. guest system time equals host
1471 * system time for us, thus we must fill in host boot time here.
1473 getboottime64(&boot
);
1475 if (kvm
->arch
.kvmclock_offset
) {
1476 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1477 boot
= timespec64_sub(boot
, ts
);
1479 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1480 wc
.nsec
= boot
.tv_nsec
;
1481 wc
.version
= version
;
1483 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1486 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1489 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1491 do_shl32_div32(dividend
, divisor
);
1495 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1496 s8
*pshift
, u32
*pmultiplier
)
1504 scaled64
= scaled_hz
;
1505 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1510 tps32
= (uint32_t)tps64
;
1511 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1512 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1520 *pmultiplier
= div_frac(scaled64
, tps32
);
1522 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1523 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1526 #ifdef CONFIG_X86_64
1527 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1530 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1531 static unsigned long max_tsc_khz
;
1533 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1535 u64 v
= (u64
)khz
* (1000000 + ppm
);
1540 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1544 /* Guest TSC same frequency as host TSC? */
1546 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1550 /* TSC scaling supported? */
1551 if (!kvm_has_tsc_control
) {
1552 if (user_tsc_khz
> tsc_khz
) {
1553 vcpu
->arch
.tsc_catchup
= 1;
1554 vcpu
->arch
.tsc_always_catchup
= 1;
1557 WARN(1, "user requested TSC rate below hardware speed\n");
1562 /* TSC scaling required - calculate ratio */
1563 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1564 user_tsc_khz
, tsc_khz
);
1566 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1567 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1572 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1576 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1578 u32 thresh_lo
, thresh_hi
;
1579 int use_scaling
= 0;
1581 /* tsc_khz can be zero if TSC calibration fails */
1582 if (user_tsc_khz
== 0) {
1583 /* set tsc_scaling_ratio to a safe value */
1584 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1588 /* Compute a scale to convert nanoseconds in TSC cycles */
1589 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1590 &vcpu
->arch
.virtual_tsc_shift
,
1591 &vcpu
->arch
.virtual_tsc_mult
);
1592 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1595 * Compute the variation in TSC rate which is acceptable
1596 * within the range of tolerance and decide if the
1597 * rate being applied is within that bounds of the hardware
1598 * rate. If so, no scaling or compensation need be done.
1600 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1601 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1602 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1603 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1606 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1609 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1611 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1612 vcpu
->arch
.virtual_tsc_mult
,
1613 vcpu
->arch
.virtual_tsc_shift
);
1614 tsc
+= vcpu
->arch
.this_tsc_write
;
1618 static inline int gtod_is_based_on_tsc(int mode
)
1620 return mode
== VCLOCK_TSC
|| mode
== VCLOCK_HVCLOCK
;
1623 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1625 #ifdef CONFIG_X86_64
1627 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1628 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1630 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1631 atomic_read(&vcpu
->kvm
->online_vcpus
));
1634 * Once the masterclock is enabled, always perform request in
1635 * order to update it.
1637 * In order to enable masterclock, the host clocksource must be TSC
1638 * and the vcpus need to have matched TSCs. When that happens,
1639 * perform request to enable masterclock.
1641 if (ka
->use_master_clock
||
1642 (gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) && vcpus_matched
))
1643 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1645 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1646 atomic_read(&vcpu
->kvm
->online_vcpus
),
1647 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1651 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1653 u64 curr_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1654 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1658 * Multiply tsc by a fixed point number represented by ratio.
1660 * The most significant 64-N bits (mult) of ratio represent the
1661 * integral part of the fixed point number; the remaining N bits
1662 * (frac) represent the fractional part, ie. ratio represents a fixed
1663 * point number (mult + frac * 2^(-N)).
1665 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1667 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1669 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1672 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1675 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1677 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1678 _tsc
= __scale_tsc(ratio
, tsc
);
1682 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1684 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1688 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1690 return target_tsc
- tsc
;
1693 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1695 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1697 return tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1699 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1701 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1703 vcpu
->arch
.tsc_offset
= kvm_x86_ops
->write_l1_tsc_offset(vcpu
, offset
);
1706 static inline bool kvm_check_tsc_unstable(void)
1708 #ifdef CONFIG_X86_64
1710 * TSC is marked unstable when we're running on Hyper-V,
1711 * 'TSC page' clocksource is good.
1713 if (pvclock_gtod_data
.clock
.vclock_mode
== VCLOCK_HVCLOCK
)
1716 return check_tsc_unstable();
1719 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1721 struct kvm
*kvm
= vcpu
->kvm
;
1722 u64 offset
, ns
, elapsed
;
1723 unsigned long flags
;
1725 bool already_matched
;
1726 u64 data
= msr
->data
;
1727 bool synchronizing
= false;
1729 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1730 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1731 ns
= ktime_get_boot_ns();
1732 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1734 if (vcpu
->arch
.virtual_tsc_khz
) {
1735 if (data
== 0 && msr
->host_initiated
) {
1737 * detection of vcpu initialization -- need to sync
1738 * with other vCPUs. This particularly helps to keep
1739 * kvm_clock stable after CPU hotplug
1741 synchronizing
= true;
1743 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1744 nsec_to_cycles(vcpu
, elapsed
);
1745 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1747 * Special case: TSC write with a small delta (1 second)
1748 * of virtual cycle time against real time is
1749 * interpreted as an attempt to synchronize the CPU.
1751 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1752 data
+ tsc_hz
> tsc_exp
;
1757 * For a reliable TSC, we can match TSC offsets, and for an unstable
1758 * TSC, we add elapsed time in this computation. We could let the
1759 * compensation code attempt to catch up if we fall behind, but
1760 * it's better to try to match offsets from the beginning.
1762 if (synchronizing
&&
1763 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1764 if (!kvm_check_tsc_unstable()) {
1765 offset
= kvm
->arch
.cur_tsc_offset
;
1766 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1768 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1770 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1771 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1774 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1777 * We split periods of matched TSC writes into generations.
1778 * For each generation, we track the original measured
1779 * nanosecond time, offset, and write, so if TSCs are in
1780 * sync, we can match exact offset, and if not, we can match
1781 * exact software computation in compute_guest_tsc()
1783 * These values are tracked in kvm->arch.cur_xxx variables.
1785 kvm
->arch
.cur_tsc_generation
++;
1786 kvm
->arch
.cur_tsc_nsec
= ns
;
1787 kvm
->arch
.cur_tsc_write
= data
;
1788 kvm
->arch
.cur_tsc_offset
= offset
;
1790 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1791 kvm
->arch
.cur_tsc_generation
, data
);
1795 * We also track th most recent recorded KHZ, write and time to
1796 * allow the matching interval to be extended at each write.
1798 kvm
->arch
.last_tsc_nsec
= ns
;
1799 kvm
->arch
.last_tsc_write
= data
;
1800 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1802 vcpu
->arch
.last_guest_tsc
= data
;
1804 /* Keep track of which generation this VCPU has synchronized to */
1805 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1806 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1807 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1809 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1810 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1812 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1813 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1815 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1817 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1818 } else if (!already_matched
) {
1819 kvm
->arch
.nr_vcpus_matched_tsc
++;
1822 kvm_track_tsc_matching(vcpu
);
1823 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1826 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1828 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1831 u64 tsc_offset
= kvm_x86_ops
->read_l1_tsc_offset(vcpu
);
1832 kvm_vcpu_write_tsc_offset(vcpu
, tsc_offset
+ adjustment
);
1835 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1837 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1838 WARN_ON(adjustment
< 0);
1839 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1840 adjust_tsc_offset_guest(vcpu
, adjustment
);
1843 #ifdef CONFIG_X86_64
1845 static u64
read_tsc(void)
1847 u64 ret
= (u64
)rdtsc_ordered();
1848 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1850 if (likely(ret
>= last
))
1854 * GCC likes to generate cmov here, but this branch is extremely
1855 * predictable (it's just a function of time and the likely is
1856 * very likely) and there's a data dependence, so force GCC
1857 * to generate a branch instead. I don't barrier() because
1858 * we don't actually need a barrier, and if this function
1859 * ever gets inlined it will generate worse code.
1865 static inline u64
vgettsc(u64
*tsc_timestamp
, int *mode
)
1868 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1871 switch (gtod
->clock
.vclock_mode
) {
1872 case VCLOCK_HVCLOCK
:
1873 tsc_pg_val
= hv_read_tsc_page_tsc(hv_get_tsc_page(),
1875 if (tsc_pg_val
!= U64_MAX
) {
1876 /* TSC page valid */
1877 *mode
= VCLOCK_HVCLOCK
;
1878 v
= (tsc_pg_val
- gtod
->clock
.cycle_last
) &
1881 /* TSC page invalid */
1882 *mode
= VCLOCK_NONE
;
1887 *tsc_timestamp
= read_tsc();
1888 v
= (*tsc_timestamp
- gtod
->clock
.cycle_last
) &
1892 *mode
= VCLOCK_NONE
;
1895 if (*mode
== VCLOCK_NONE
)
1896 *tsc_timestamp
= v
= 0;
1898 return v
* gtod
->clock
.mult
;
1901 static int do_monotonic_boot(s64
*t
, u64
*tsc_timestamp
)
1903 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1909 seq
= read_seqcount_begin(>od
->seq
);
1910 ns
= gtod
->nsec_base
;
1911 ns
+= vgettsc(tsc_timestamp
, &mode
);
1912 ns
>>= gtod
->clock
.shift
;
1913 ns
+= gtod
->boot_ns
;
1914 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1920 static int do_realtime(struct timespec64
*ts
, u64
*tsc_timestamp
)
1922 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1928 seq
= read_seqcount_begin(>od
->seq
);
1929 ts
->tv_sec
= gtod
->wall_time_sec
;
1930 ns
= gtod
->nsec_base
;
1931 ns
+= vgettsc(tsc_timestamp
, &mode
);
1932 ns
>>= gtod
->clock
.shift
;
1933 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1935 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1941 /* returns true if host is using TSC based clocksource */
1942 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*tsc_timestamp
)
1944 /* checked again under seqlock below */
1945 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
1948 return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns
,
1952 /* returns true if host is using TSC based clocksource */
1953 static bool kvm_get_walltime_and_clockread(struct timespec64
*ts
,
1956 /* checked again under seqlock below */
1957 if (!gtod_is_based_on_tsc(pvclock_gtod_data
.clock
.vclock_mode
))
1960 return gtod_is_based_on_tsc(do_realtime(ts
, tsc_timestamp
));
1966 * Assuming a stable TSC across physical CPUS, and a stable TSC
1967 * across virtual CPUs, the following condition is possible.
1968 * Each numbered line represents an event visible to both
1969 * CPUs at the next numbered event.
1971 * "timespecX" represents host monotonic time. "tscX" represents
1974 * VCPU0 on CPU0 | VCPU1 on CPU1
1976 * 1. read timespec0,tsc0
1977 * 2. | timespec1 = timespec0 + N
1979 * 3. transition to guest | transition to guest
1980 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1981 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1982 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1984 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1987 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1989 * - 0 < N - M => M < N
1991 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1992 * always the case (the difference between two distinct xtime instances
1993 * might be smaller then the difference between corresponding TSC reads,
1994 * when updating guest vcpus pvclock areas).
1996 * To avoid that problem, do not allow visibility of distinct
1997 * system_timestamp/tsc_timestamp values simultaneously: use a master
1998 * copy of host monotonic time values. Update that master copy
2001 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2005 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
2007 #ifdef CONFIG_X86_64
2008 struct kvm_arch
*ka
= &kvm
->arch
;
2010 bool host_tsc_clocksource
, vcpus_matched
;
2012 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
2013 atomic_read(&kvm
->online_vcpus
));
2016 * If the host uses TSC clock, then passthrough TSC as stable
2019 host_tsc_clocksource
= kvm_get_time_and_clockread(
2020 &ka
->master_kernel_ns
,
2021 &ka
->master_cycle_now
);
2023 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
2024 && !ka
->backwards_tsc_observed
2025 && !ka
->boot_vcpu_runs_old_kvmclock
;
2027 if (ka
->use_master_clock
)
2028 atomic_set(&kvm_guest_has_master_clock
, 1);
2030 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
2031 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
2036 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
2038 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
2041 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
2043 #ifdef CONFIG_X86_64
2045 struct kvm_vcpu
*vcpu
;
2046 struct kvm_arch
*ka
= &kvm
->arch
;
2048 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2049 kvm_make_mclock_inprogress_request(kvm
);
2050 /* no guest entries from this point */
2051 pvclock_update_vm_gtod_copy(kvm
);
2053 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2054 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2056 /* guest entries allowed */
2057 kvm_for_each_vcpu(i
, vcpu
, kvm
)
2058 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
2060 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2064 u64
get_kvmclock_ns(struct kvm
*kvm
)
2066 struct kvm_arch
*ka
= &kvm
->arch
;
2067 struct pvclock_vcpu_time_info hv_clock
;
2070 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2071 if (!ka
->use_master_clock
) {
2072 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2073 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
2076 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
2077 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
2078 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2080 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2083 if (__this_cpu_read(cpu_tsc_khz
)) {
2084 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
2085 &hv_clock
.tsc_shift
,
2086 &hv_clock
.tsc_to_system_mul
);
2087 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
2089 ret
= ktime_get_boot_ns() + ka
->kvmclock_offset
;
2096 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
2098 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2099 struct pvclock_vcpu_time_info guest_hv_clock
;
2101 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2102 &guest_hv_clock
, sizeof(guest_hv_clock
))))
2105 /* This VCPU is paused, but it's legal for a guest to read another
2106 * VCPU's kvmclock, so we really have to follow the specification where
2107 * it says that version is odd if data is being modified, and even after
2110 * Version field updates must be kept separate. This is because
2111 * kvm_write_guest_cached might use a "rep movs" instruction, and
2112 * writes within a string instruction are weakly ordered. So there
2113 * are three writes overall.
2115 * As a small optimization, only write the version field in the first
2116 * and third write. The vcpu->pv_time cache is still valid, because the
2117 * version field is the first in the struct.
2119 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
2121 if (guest_hv_clock
.version
& 1)
2122 ++guest_hv_clock
.version
; /* first time write, random junk */
2124 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
2125 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2127 sizeof(vcpu
->hv_clock
.version
));
2131 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2132 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
2134 if (vcpu
->pvclock_set_guest_stopped_request
) {
2135 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
2136 vcpu
->pvclock_set_guest_stopped_request
= false;
2139 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
2141 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2143 sizeof(vcpu
->hv_clock
));
2147 vcpu
->hv_clock
.version
++;
2148 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
2150 sizeof(vcpu
->hv_clock
.version
));
2153 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
2155 unsigned long flags
, tgt_tsc_khz
;
2156 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
2157 struct kvm_arch
*ka
= &v
->kvm
->arch
;
2159 u64 tsc_timestamp
, host_tsc
;
2161 bool use_master_clock
;
2167 * If the host uses TSC clock, then passthrough TSC as stable
2170 spin_lock(&ka
->pvclock_gtod_sync_lock
);
2171 use_master_clock
= ka
->use_master_clock
;
2172 if (use_master_clock
) {
2173 host_tsc
= ka
->master_cycle_now
;
2174 kernel_ns
= ka
->master_kernel_ns
;
2176 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
2178 /* Keep irq disabled to prevent changes to the clock */
2179 local_irq_save(flags
);
2180 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
2181 if (unlikely(tgt_tsc_khz
== 0)) {
2182 local_irq_restore(flags
);
2183 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2186 if (!use_master_clock
) {
2188 kernel_ns
= ktime_get_boot_ns();
2191 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
2194 * We may have to catch up the TSC to match elapsed wall clock
2195 * time for two reasons, even if kvmclock is used.
2196 * 1) CPU could have been running below the maximum TSC rate
2197 * 2) Broken TSC compensation resets the base at each VCPU
2198 * entry to avoid unknown leaps of TSC even when running
2199 * again on the same CPU. This may cause apparent elapsed
2200 * time to disappear, and the guest to stand still or run
2203 if (vcpu
->tsc_catchup
) {
2204 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
2205 if (tsc
> tsc_timestamp
) {
2206 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
2207 tsc_timestamp
= tsc
;
2211 local_irq_restore(flags
);
2213 /* With all the info we got, fill in the values */
2215 if (kvm_has_tsc_control
)
2216 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
2218 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
2219 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
2220 &vcpu
->hv_clock
.tsc_shift
,
2221 &vcpu
->hv_clock
.tsc_to_system_mul
);
2222 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
2225 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
2226 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
2227 vcpu
->last_guest_tsc
= tsc_timestamp
;
2229 /* If the host uses TSC clocksource, then it is stable */
2231 if (use_master_clock
)
2232 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
2234 vcpu
->hv_clock
.flags
= pvclock_flags
;
2236 if (vcpu
->pv_time_enabled
)
2237 kvm_setup_pvclock_page(v
);
2238 if (v
== kvm_get_vcpu(v
->kvm
, 0))
2239 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
2244 * kvmclock updates which are isolated to a given vcpu, such as
2245 * vcpu->cpu migration, should not allow system_timestamp from
2246 * the rest of the vcpus to remain static. Otherwise ntp frequency
2247 * correction applies to one vcpu's system_timestamp but not
2250 * So in those cases, request a kvmclock update for all vcpus.
2251 * We need to rate-limit these requests though, as they can
2252 * considerably slow guests that have a large number of vcpus.
2253 * The time for a remote vcpu to update its kvmclock is bound
2254 * by the delay we use to rate-limit the updates.
2257 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2259 static void kvmclock_update_fn(struct work_struct
*work
)
2262 struct delayed_work
*dwork
= to_delayed_work(work
);
2263 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2264 kvmclock_update_work
);
2265 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2266 struct kvm_vcpu
*vcpu
;
2268 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
2269 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2270 kvm_vcpu_kick(vcpu
);
2274 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
2276 struct kvm
*kvm
= v
->kvm
;
2278 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
2279 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
2280 KVMCLOCK_UPDATE_DELAY
);
2283 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2285 static void kvmclock_sync_fn(struct work_struct
*work
)
2287 struct delayed_work
*dwork
= to_delayed_work(work
);
2288 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
2289 kvmclock_sync_work
);
2290 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
2292 if (!kvmclock_periodic_sync
)
2295 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
2296 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
2297 KVMCLOCK_SYNC_PERIOD
);
2301 * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2303 static bool can_set_mci_status(struct kvm_vcpu
*vcpu
)
2305 /* McStatusWrEn enabled? */
2306 if (guest_cpuid_is_amd(vcpu
))
2307 return !!(vcpu
->arch
.msr_hwcr
& BIT_ULL(18));
2312 static int set_msr_mce(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2314 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2315 unsigned bank_num
= mcg_cap
& 0xff;
2316 u32 msr
= msr_info
->index
;
2317 u64 data
= msr_info
->data
;
2320 case MSR_IA32_MCG_STATUS
:
2321 vcpu
->arch
.mcg_status
= data
;
2323 case MSR_IA32_MCG_CTL
:
2324 if (!(mcg_cap
& MCG_CTL_P
) &&
2325 (data
|| !msr_info
->host_initiated
))
2327 if (data
!= 0 && data
!= ~(u64
)0)
2329 vcpu
->arch
.mcg_ctl
= data
;
2332 if (msr
>= MSR_IA32_MC0_CTL
&&
2333 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2334 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2335 /* only 0 or all 1s can be written to IA32_MCi_CTL
2336 * some Linux kernels though clear bit 10 in bank 4 to
2337 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2338 * this to avoid an uncatched #GP in the guest
2340 if ((offset
& 0x3) == 0 &&
2341 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2345 if (!msr_info
->host_initiated
&&
2346 (offset
& 0x3) == 1 && data
!= 0) {
2347 if (!can_set_mci_status(vcpu
))
2351 vcpu
->arch
.mce_banks
[offset
] = data
;
2359 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2361 struct kvm
*kvm
= vcpu
->kvm
;
2362 int lm
= is_long_mode(vcpu
);
2363 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2364 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2365 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2366 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2367 u32 page_num
= data
& ~PAGE_MASK
;
2368 u64 page_addr
= data
& PAGE_MASK
;
2373 if (page_num
>= blob_size
)
2376 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2381 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2390 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2392 gpa_t gpa
= data
& ~0x3f;
2394 /* Bits 3:5 are reserved, Should be zero */
2398 vcpu
->arch
.apf
.msr_val
= data
;
2400 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2401 kvm_clear_async_pf_completion_queue(vcpu
);
2402 kvm_async_pf_hash_reset(vcpu
);
2406 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2410 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2411 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2412 kvm_async_pf_wakeup_all(vcpu
);
2416 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2418 vcpu
->arch
.pv_time_enabled
= false;
2421 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
, bool invalidate_gpa
)
2423 ++vcpu
->stat
.tlb_flush
;
2424 kvm_x86_ops
->tlb_flush(vcpu
, invalidate_gpa
);
2427 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2429 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2432 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2433 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2437 * Doing a TLB flush here, on the guest's behalf, can avoid
2440 if (xchg(&vcpu
->arch
.st
.steal
.preempted
, 0) & KVM_VCPU_FLUSH_TLB
)
2441 kvm_vcpu_flush_tlb(vcpu
, false);
2443 if (vcpu
->arch
.st
.steal
.version
& 1)
2444 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2446 vcpu
->arch
.st
.steal
.version
+= 1;
2448 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2449 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2453 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2454 vcpu
->arch
.st
.last_steal
;
2455 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2457 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2458 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2462 vcpu
->arch
.st
.steal
.version
+= 1;
2464 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2465 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2468 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2471 u32 msr
= msr_info
->index
;
2472 u64 data
= msr_info
->data
;
2475 case MSR_AMD64_NB_CFG
:
2476 case MSR_IA32_UCODE_WRITE
:
2477 case MSR_VM_HSAVE_PA
:
2478 case MSR_AMD64_PATCH_LOADER
:
2479 case MSR_AMD64_BU_CFG2
:
2480 case MSR_AMD64_DC_CFG
:
2481 case MSR_F15H_EX_CFG
:
2484 case MSR_IA32_UCODE_REV
:
2485 if (msr_info
->host_initiated
)
2486 vcpu
->arch
.microcode_version
= data
;
2488 case MSR_IA32_ARCH_CAPABILITIES
:
2489 if (!msr_info
->host_initiated
)
2491 vcpu
->arch
.arch_capabilities
= data
;
2494 return set_efer(vcpu
, msr_info
);
2496 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2497 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2498 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2500 /* Handle McStatusWrEn */
2501 if (data
== BIT_ULL(18)) {
2502 vcpu
->arch
.msr_hwcr
= data
;
2503 } else if (data
!= 0) {
2504 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2509 case MSR_FAM10H_MMIO_CONF_BASE
:
2511 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2516 case MSR_IA32_DEBUGCTLMSR
:
2518 /* We support the non-activated case already */
2520 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2521 /* Values other than LBR and BTF are vendor-specific,
2522 thus reserved and should throw a #GP */
2525 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2528 case 0x200 ... 0x2ff:
2529 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2530 case MSR_IA32_APICBASE
:
2531 return kvm_set_apic_base(vcpu
, msr_info
);
2532 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2533 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2534 case MSR_IA32_TSCDEADLINE
:
2535 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2537 case MSR_IA32_TSC_ADJUST
:
2538 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2539 if (!msr_info
->host_initiated
) {
2540 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2541 adjust_tsc_offset_guest(vcpu
, adj
);
2543 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2546 case MSR_IA32_MISC_ENABLE
:
2547 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2549 case MSR_IA32_SMBASE
:
2550 if (!msr_info
->host_initiated
)
2552 vcpu
->arch
.smbase
= data
;
2555 kvm_write_tsc(vcpu
, msr_info
);
2558 if (!msr_info
->host_initiated
)
2560 vcpu
->arch
.smi_count
= data
;
2562 case MSR_KVM_WALL_CLOCK_NEW
:
2563 case MSR_KVM_WALL_CLOCK
:
2564 vcpu
->kvm
->arch
.wall_clock
= data
;
2565 kvm_write_wall_clock(vcpu
->kvm
, data
);
2567 case MSR_KVM_SYSTEM_TIME_NEW
:
2568 case MSR_KVM_SYSTEM_TIME
: {
2569 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2571 kvmclock_reset(vcpu
);
2573 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2574 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2576 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2577 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2579 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2582 vcpu
->arch
.time
= data
;
2583 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2585 /* we verify if the enable bit is set... */
2589 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2590 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2591 sizeof(struct pvclock_vcpu_time_info
)))
2592 vcpu
->arch
.pv_time_enabled
= false;
2594 vcpu
->arch
.pv_time_enabled
= true;
2598 case MSR_KVM_ASYNC_PF_EN
:
2599 if (kvm_pv_enable_async_pf(vcpu
, data
))
2602 case MSR_KVM_STEAL_TIME
:
2604 if (unlikely(!sched_info_on()))
2607 if (data
& KVM_STEAL_RESERVED_MASK
)
2610 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2611 data
& KVM_STEAL_VALID_BITS
,
2612 sizeof(struct kvm_steal_time
)))
2615 vcpu
->arch
.st
.msr_val
= data
;
2617 if (!(data
& KVM_MSR_ENABLED
))
2620 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2623 case MSR_KVM_PV_EOI_EN
:
2624 if (kvm_lapic_enable_pv_eoi(vcpu
, data
, sizeof(u8
)))
2628 case MSR_IA32_MCG_CTL
:
2629 case MSR_IA32_MCG_STATUS
:
2630 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2631 return set_msr_mce(vcpu
, msr_info
);
2633 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2634 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2635 pr
= true; /* fall through */
2636 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2637 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2638 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2639 return kvm_pmu_set_msr(vcpu
, msr_info
);
2641 if (pr
|| data
!= 0)
2642 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2643 "0x%x data 0x%llx\n", msr
, data
);
2645 case MSR_K7_CLK_CTL
:
2647 * Ignore all writes to this no longer documented MSR.
2648 * Writes are only relevant for old K7 processors,
2649 * all pre-dating SVM, but a recommended workaround from
2650 * AMD for these chips. It is possible to specify the
2651 * affected processor models on the command line, hence
2652 * the need to ignore the workaround.
2655 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2656 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2657 case HV_X64_MSR_CRASH_CTL
:
2658 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2659 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
2660 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
2661 case HV_X64_MSR_TSC_EMULATION_STATUS
:
2662 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2663 msr_info
->host_initiated
);
2664 case MSR_IA32_BBL_CR_CTL3
:
2665 /* Drop writes to this legacy MSR -- see rdmsr
2666 * counterpart for further detail.
2668 if (report_ignored_msrs
)
2669 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2672 case MSR_AMD64_OSVW_ID_LENGTH
:
2673 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2675 vcpu
->arch
.osvw
.length
= data
;
2677 case MSR_AMD64_OSVW_STATUS
:
2678 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2680 vcpu
->arch
.osvw
.status
= data
;
2682 case MSR_PLATFORM_INFO
:
2683 if (!msr_info
->host_initiated
||
2684 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2685 cpuid_fault_enabled(vcpu
)))
2687 vcpu
->arch
.msr_platform_info
= data
;
2689 case MSR_MISC_FEATURES_ENABLES
:
2690 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2691 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2692 !supports_cpuid_fault(vcpu
)))
2694 vcpu
->arch
.msr_misc_features_enables
= data
;
2697 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2698 return xen_hvm_config(vcpu
, data
);
2699 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2700 return kvm_pmu_set_msr(vcpu
, msr_info
);
2702 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2706 if (report_ignored_msrs
)
2708 "ignored wrmsr: 0x%x data 0x%llx\n",
2715 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2719 * Reads an msr value (of 'msr_index') into 'pdata'.
2720 * Returns 0 on success, non-0 otherwise.
2721 * Assumes vcpu_load() was already called.
2723 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2725 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2727 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2729 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
, bool host
)
2732 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2733 unsigned bank_num
= mcg_cap
& 0xff;
2736 case MSR_IA32_P5_MC_ADDR
:
2737 case MSR_IA32_P5_MC_TYPE
:
2740 case MSR_IA32_MCG_CAP
:
2741 data
= vcpu
->arch
.mcg_cap
;
2743 case MSR_IA32_MCG_CTL
:
2744 if (!(mcg_cap
& MCG_CTL_P
) && !host
)
2746 data
= vcpu
->arch
.mcg_ctl
;
2748 case MSR_IA32_MCG_STATUS
:
2749 data
= vcpu
->arch
.mcg_status
;
2752 if (msr
>= MSR_IA32_MC0_CTL
&&
2753 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2754 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2755 data
= vcpu
->arch
.mce_banks
[offset
];
2764 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2766 switch (msr_info
->index
) {
2767 case MSR_IA32_PLATFORM_ID
:
2768 case MSR_IA32_EBL_CR_POWERON
:
2769 case MSR_IA32_DEBUGCTLMSR
:
2770 case MSR_IA32_LASTBRANCHFROMIP
:
2771 case MSR_IA32_LASTBRANCHTOIP
:
2772 case MSR_IA32_LASTINTFROMIP
:
2773 case MSR_IA32_LASTINTTOIP
:
2775 case MSR_K8_TSEG_ADDR
:
2776 case MSR_K8_TSEG_MASK
:
2777 case MSR_VM_HSAVE_PA
:
2778 case MSR_K8_INT_PENDING_MSG
:
2779 case MSR_AMD64_NB_CFG
:
2780 case MSR_FAM10H_MMIO_CONF_BASE
:
2781 case MSR_AMD64_BU_CFG2
:
2782 case MSR_IA32_PERF_CTL
:
2783 case MSR_AMD64_DC_CFG
:
2784 case MSR_F15H_EX_CFG
:
2787 case MSR_F15H_PERF_CTL0
... MSR_F15H_PERF_CTR5
:
2788 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2789 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2790 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2791 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2792 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2793 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2796 case MSR_IA32_UCODE_REV
:
2797 msr_info
->data
= vcpu
->arch
.microcode_version
;
2799 case MSR_IA32_ARCH_CAPABILITIES
:
2800 if (!msr_info
->host_initiated
&&
2801 !guest_cpuid_has(vcpu
, X86_FEATURE_ARCH_CAPABILITIES
))
2803 msr_info
->data
= vcpu
->arch
.arch_capabilities
;
2806 msr_info
->data
= kvm_scale_tsc(vcpu
, rdtsc()) + vcpu
->arch
.tsc_offset
;
2809 case 0x200 ... 0x2ff:
2810 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2811 case 0xcd: /* fsb frequency */
2815 * MSR_EBC_FREQUENCY_ID
2816 * Conservative value valid for even the basic CPU models.
2817 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2818 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2819 * and 266MHz for model 3, or 4. Set Core Clock
2820 * Frequency to System Bus Frequency Ratio to 1 (bits
2821 * 31:24) even though these are only valid for CPU
2822 * models > 2, however guests may end up dividing or
2823 * multiplying by zero otherwise.
2825 case MSR_EBC_FREQUENCY_ID
:
2826 msr_info
->data
= 1 << 24;
2828 case MSR_IA32_APICBASE
:
2829 msr_info
->data
= kvm_get_apic_base(vcpu
);
2831 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2832 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2834 case MSR_IA32_TSCDEADLINE
:
2835 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2837 case MSR_IA32_TSC_ADJUST
:
2838 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2840 case MSR_IA32_MISC_ENABLE
:
2841 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2843 case MSR_IA32_SMBASE
:
2844 if (!msr_info
->host_initiated
)
2846 msr_info
->data
= vcpu
->arch
.smbase
;
2849 msr_info
->data
= vcpu
->arch
.smi_count
;
2851 case MSR_IA32_PERF_STATUS
:
2852 /* TSC increment by tick */
2853 msr_info
->data
= 1000ULL;
2854 /* CPU multiplier */
2855 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2858 msr_info
->data
= vcpu
->arch
.efer
;
2860 case MSR_KVM_WALL_CLOCK
:
2861 case MSR_KVM_WALL_CLOCK_NEW
:
2862 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2864 case MSR_KVM_SYSTEM_TIME
:
2865 case MSR_KVM_SYSTEM_TIME_NEW
:
2866 msr_info
->data
= vcpu
->arch
.time
;
2868 case MSR_KVM_ASYNC_PF_EN
:
2869 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2871 case MSR_KVM_STEAL_TIME
:
2872 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2874 case MSR_KVM_PV_EOI_EN
:
2875 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2877 case MSR_IA32_P5_MC_ADDR
:
2878 case MSR_IA32_P5_MC_TYPE
:
2879 case MSR_IA32_MCG_CAP
:
2880 case MSR_IA32_MCG_CTL
:
2881 case MSR_IA32_MCG_STATUS
:
2882 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2883 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
,
2884 msr_info
->host_initiated
);
2885 case MSR_K7_CLK_CTL
:
2887 * Provide expected ramp-up count for K7. All other
2888 * are set to zero, indicating minimum divisors for
2891 * This prevents guest kernels on AMD host with CPU
2892 * type 6, model 8 and higher from exploding due to
2893 * the rdmsr failing.
2895 msr_info
->data
= 0x20000000;
2897 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2898 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2899 case HV_X64_MSR_CRASH_CTL
:
2900 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2901 case HV_X64_MSR_REENLIGHTENMENT_CONTROL
:
2902 case HV_X64_MSR_TSC_EMULATION_CONTROL
:
2903 case HV_X64_MSR_TSC_EMULATION_STATUS
:
2904 return kvm_hv_get_msr_common(vcpu
,
2905 msr_info
->index
, &msr_info
->data
,
2906 msr_info
->host_initiated
);
2908 case MSR_IA32_BBL_CR_CTL3
:
2909 /* This legacy MSR exists but isn't fully documented in current
2910 * silicon. It is however accessed by winxp in very narrow
2911 * scenarios where it sets bit #19, itself documented as
2912 * a "reserved" bit. Best effort attempt to source coherent
2913 * read data here should the balance of the register be
2914 * interpreted by the guest:
2916 * L2 cache control register 3: 64GB range, 256KB size,
2917 * enabled, latency 0x1, configured
2919 msr_info
->data
= 0xbe702111;
2921 case MSR_AMD64_OSVW_ID_LENGTH
:
2922 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2924 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2926 case MSR_AMD64_OSVW_STATUS
:
2927 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2929 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2931 case MSR_PLATFORM_INFO
:
2932 if (!msr_info
->host_initiated
&&
2933 !vcpu
->kvm
->arch
.guest_can_read_msr_platform_info
)
2935 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2937 case MSR_MISC_FEATURES_ENABLES
:
2938 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2941 msr_info
->data
= vcpu
->arch
.msr_hwcr
;
2944 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2945 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2947 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2951 if (report_ignored_msrs
)
2952 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n",
2960 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2963 * Read or write a bunch of msrs. All parameters are kernel addresses.
2965 * @return number of msrs set successfully.
2967 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2968 struct kvm_msr_entry
*entries
,
2969 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2970 unsigned index
, u64
*data
))
2974 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2975 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2982 * Read or write a bunch of msrs. Parameters are user addresses.
2984 * @return number of msrs set successfully.
2986 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2987 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2988 unsigned index
, u64
*data
),
2991 struct kvm_msrs msrs
;
2992 struct kvm_msr_entry
*entries
;
2997 if (copy_from_user(&msrs
, user_msrs
, sizeof(msrs
)))
3001 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
3004 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
3005 entries
= memdup_user(user_msrs
->entries
, size
);
3006 if (IS_ERR(entries
)) {
3007 r
= PTR_ERR(entries
);
3011 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
3016 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
3027 static inline bool kvm_can_mwait_in_guest(void)
3029 return boot_cpu_has(X86_FEATURE_MWAIT
) &&
3030 !boot_cpu_has_bug(X86_BUG_MONITOR
) &&
3031 boot_cpu_has(X86_FEATURE_ARAT
);
3034 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
3039 case KVM_CAP_IRQCHIP
:
3041 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
3042 case KVM_CAP_SET_TSS_ADDR
:
3043 case KVM_CAP_EXT_CPUID
:
3044 case KVM_CAP_EXT_EMUL_CPUID
:
3045 case KVM_CAP_CLOCKSOURCE
:
3047 case KVM_CAP_NOP_IO_DELAY
:
3048 case KVM_CAP_MP_STATE
:
3049 case KVM_CAP_SYNC_MMU
:
3050 case KVM_CAP_USER_NMI
:
3051 case KVM_CAP_REINJECT_CONTROL
:
3052 case KVM_CAP_IRQ_INJECT_STATUS
:
3053 case KVM_CAP_IOEVENTFD
:
3054 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
3056 case KVM_CAP_PIT_STATE2
:
3057 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
3058 case KVM_CAP_XEN_HVM
:
3059 case KVM_CAP_VCPU_EVENTS
:
3060 case KVM_CAP_HYPERV
:
3061 case KVM_CAP_HYPERV_VAPIC
:
3062 case KVM_CAP_HYPERV_SPIN
:
3063 case KVM_CAP_HYPERV_SYNIC
:
3064 case KVM_CAP_HYPERV_SYNIC2
:
3065 case KVM_CAP_HYPERV_VP_INDEX
:
3066 case KVM_CAP_HYPERV_EVENTFD
:
3067 case KVM_CAP_HYPERV_TLBFLUSH
:
3068 case KVM_CAP_HYPERV_SEND_IPI
:
3069 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
3070 case KVM_CAP_HYPERV_CPUID
:
3071 case KVM_CAP_PCI_SEGMENT
:
3072 case KVM_CAP_DEBUGREGS
:
3073 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
3075 case KVM_CAP_ASYNC_PF
:
3076 case KVM_CAP_GET_TSC_KHZ
:
3077 case KVM_CAP_KVMCLOCK_CTRL
:
3078 case KVM_CAP_READONLY_MEM
:
3079 case KVM_CAP_HYPERV_TIME
:
3080 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
3081 case KVM_CAP_TSC_DEADLINE_TIMER
:
3082 case KVM_CAP_DISABLE_QUIRKS
:
3083 case KVM_CAP_SET_BOOT_CPU_ID
:
3084 case KVM_CAP_SPLIT_IRQCHIP
:
3085 case KVM_CAP_IMMEDIATE_EXIT
:
3086 case KVM_CAP_GET_MSR_FEATURES
:
3087 case KVM_CAP_MSR_PLATFORM_INFO
:
3088 case KVM_CAP_EXCEPTION_PAYLOAD
:
3091 case KVM_CAP_SYNC_REGS
:
3092 r
= KVM_SYNC_X86_VALID_FIELDS
;
3094 case KVM_CAP_ADJUST_CLOCK
:
3095 r
= KVM_CLOCK_TSC_STABLE
;
3097 case KVM_CAP_X86_DISABLE_EXITS
:
3098 r
|= KVM_X86_DISABLE_EXITS_HLT
| KVM_X86_DISABLE_EXITS_PAUSE
;
3099 if(kvm_can_mwait_in_guest())
3100 r
|= KVM_X86_DISABLE_EXITS_MWAIT
;
3102 case KVM_CAP_X86_SMM
:
3103 /* SMBASE is usually relocated above 1M on modern chipsets,
3104 * and SMM handlers might indeed rely on 4G segment limits,
3105 * so do not report SMM to be available if real mode is
3106 * emulated via vm86 mode. Still, do not go to great lengths
3107 * to avoid userspace's usage of the feature, because it is a
3108 * fringe case that is not enabled except via specific settings
3109 * of the module parameters.
3111 r
= kvm_x86_ops
->has_emulated_msr(MSR_IA32_SMBASE
);
3114 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
3116 case KVM_CAP_NR_VCPUS
:
3117 r
= KVM_SOFT_MAX_VCPUS
;
3119 case KVM_CAP_MAX_VCPUS
:
3122 case KVM_CAP_MAX_VCPU_ID
:
3123 r
= KVM_MAX_VCPU_ID
;
3125 case KVM_CAP_PV_MMU
: /* obsolete */
3129 r
= KVM_MAX_MCE_BANKS
;
3132 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
3134 case KVM_CAP_TSC_CONTROL
:
3135 r
= kvm_has_tsc_control
;
3137 case KVM_CAP_X2APIC_API
:
3138 r
= KVM_X2APIC_API_VALID_FLAGS
;
3140 case KVM_CAP_NESTED_STATE
:
3141 r
= kvm_x86_ops
->get_nested_state
?
3142 kvm_x86_ops
->get_nested_state(NULL
, NULL
, 0) : 0;
3151 long kvm_arch_dev_ioctl(struct file
*filp
,
3152 unsigned int ioctl
, unsigned long arg
)
3154 void __user
*argp
= (void __user
*)arg
;
3158 case KVM_GET_MSR_INDEX_LIST
: {
3159 struct kvm_msr_list __user
*user_msr_list
= argp
;
3160 struct kvm_msr_list msr_list
;
3164 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3167 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
3168 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3171 if (n
< msr_list
.nmsrs
)
3174 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
3175 num_msrs_to_save
* sizeof(u32
)))
3177 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
3179 num_emulated_msrs
* sizeof(u32
)))
3184 case KVM_GET_SUPPORTED_CPUID
:
3185 case KVM_GET_EMULATED_CPUID
: {
3186 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3187 struct kvm_cpuid2 cpuid
;
3190 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3193 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
3199 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
3204 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
3206 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
3207 sizeof(kvm_mce_cap_supported
)))
3211 case KVM_GET_MSR_FEATURE_INDEX_LIST
: {
3212 struct kvm_msr_list __user
*user_msr_list
= argp
;
3213 struct kvm_msr_list msr_list
;
3217 if (copy_from_user(&msr_list
, user_msr_list
, sizeof(msr_list
)))
3220 msr_list
.nmsrs
= num_msr_based_features
;
3221 if (copy_to_user(user_msr_list
, &msr_list
, sizeof(msr_list
)))
3224 if (n
< msr_list
.nmsrs
)
3227 if (copy_to_user(user_msr_list
->indices
, &msr_based_features
,
3228 num_msr_based_features
* sizeof(u32
)))
3234 r
= msr_io(NULL
, argp
, do_get_msr_feature
, 1);
3244 static void wbinvd_ipi(void *garbage
)
3249 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
3251 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
3254 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
3256 /* Address WBINVD may be executed by guest */
3257 if (need_emulate_wbinvd(vcpu
)) {
3258 if (kvm_x86_ops
->has_wbinvd_exit())
3259 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
3260 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
3261 smp_call_function_single(vcpu
->cpu
,
3262 wbinvd_ipi
, NULL
, 1);
3265 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
3267 /* Apply any externally detected TSC adjustments (due to suspend) */
3268 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
3269 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
3270 vcpu
->arch
.tsc_offset_adjustment
= 0;
3271 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3274 if (unlikely(vcpu
->cpu
!= cpu
) || kvm_check_tsc_unstable()) {
3275 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
3276 rdtsc() - vcpu
->arch
.last_host_tsc
;
3278 mark_tsc_unstable("KVM discovered backwards TSC");
3280 if (kvm_check_tsc_unstable()) {
3281 u64 offset
= kvm_compute_tsc_offset(vcpu
,
3282 vcpu
->arch
.last_guest_tsc
);
3283 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
3284 vcpu
->arch
.tsc_catchup
= 1;
3287 if (kvm_lapic_hv_timer_in_use(vcpu
))
3288 kvm_lapic_restart_hv_timer(vcpu
);
3291 * On a host with synchronized TSC, there is no need to update
3292 * kvmclock on vcpu->cpu migration
3294 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
3295 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
3296 if (vcpu
->cpu
!= cpu
)
3297 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
3301 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
3304 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
3306 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
3309 vcpu
->arch
.st
.steal
.preempted
= KVM_VCPU_PREEMPTED
;
3311 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
3312 &vcpu
->arch
.st
.steal
.preempted
,
3313 offsetof(struct kvm_steal_time
, preempted
),
3314 sizeof(vcpu
->arch
.st
.steal
.preempted
));
3317 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
3321 if (vcpu
->preempted
)
3322 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
3325 * Disable page faults because we're in atomic context here.
3326 * kvm_write_guest_offset_cached() would call might_fault()
3327 * that relies on pagefault_disable() to tell if there's a
3328 * bug. NOTE: the write to guest memory may not go through if
3329 * during postcopy live migration or if there's heavy guest
3332 pagefault_disable();
3334 * kvm_memslots() will be called by
3335 * kvm_write_guest_offset_cached() so take the srcu lock.
3337 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3338 kvm_steal_time_set_preempted(vcpu
);
3339 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3341 kvm_x86_ops
->vcpu_put(vcpu
);
3342 vcpu
->arch
.last_host_tsc
= rdtsc();
3344 * If userspace has set any breakpoints or watchpoints, dr6 is restored
3345 * on every vmexit, but if not, we might have a stale dr6 from the
3346 * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3351 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
3352 struct kvm_lapic_state
*s
)
3354 if (vcpu
->arch
.apicv_active
)
3355 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
3357 return kvm_apic_get_state(vcpu
, s
);
3360 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
3361 struct kvm_lapic_state
*s
)
3365 r
= kvm_apic_set_state(vcpu
, s
);
3368 update_cr8_intercept(vcpu
);
3373 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
3375 return (!lapic_in_kernel(vcpu
) ||
3376 kvm_apic_accept_pic_intr(vcpu
));
3380 * if userspace requested an interrupt window, check that the
3381 * interrupt window is open.
3383 * No need to exit to userspace if we already have an interrupt queued.
3385 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
3387 return kvm_arch_interrupt_allowed(vcpu
) &&
3388 !kvm_cpu_has_interrupt(vcpu
) &&
3389 !kvm_event_needs_reinjection(vcpu
) &&
3390 kvm_cpu_accept_dm_intr(vcpu
);
3393 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
3394 struct kvm_interrupt
*irq
)
3396 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
3399 if (!irqchip_in_kernel(vcpu
->kvm
)) {
3400 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
3401 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3406 * With in-kernel LAPIC, we only use this to inject EXTINT, so
3407 * fail for in-kernel 8259.
3409 if (pic_in_kernel(vcpu
->kvm
))
3412 if (vcpu
->arch
.pending_external_vector
!= -1)
3415 vcpu
->arch
.pending_external_vector
= irq
->irq
;
3416 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3420 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
3422 kvm_inject_nmi(vcpu
);
3427 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
3429 kvm_make_request(KVM_REQ_SMI
, vcpu
);
3434 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
3435 struct kvm_tpr_access_ctl
*tac
)
3439 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
3443 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
3447 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3450 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3452 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3455 vcpu
->arch
.mcg_cap
= mcg_cap
;
3456 /* Init IA32_MCG_CTL to all 1s */
3457 if (mcg_cap
& MCG_CTL_P
)
3458 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3459 /* Init IA32_MCi_CTL to all 1s */
3460 for (bank
= 0; bank
< bank_num
; bank
++)
3461 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3463 if (kvm_x86_ops
->setup_mce
)
3464 kvm_x86_ops
->setup_mce(vcpu
);
3469 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3470 struct kvm_x86_mce
*mce
)
3472 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3473 unsigned bank_num
= mcg_cap
& 0xff;
3474 u64
*banks
= vcpu
->arch
.mce_banks
;
3476 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3479 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3480 * reporting is disabled
3482 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3483 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3485 banks
+= 4 * mce
->bank
;
3487 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3488 * reporting is disabled for the bank
3490 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3492 if (mce
->status
& MCI_STATUS_UC
) {
3493 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3494 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3495 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3498 if (banks
[1] & MCI_STATUS_VAL
)
3499 mce
->status
|= MCI_STATUS_OVER
;
3500 banks
[2] = mce
->addr
;
3501 banks
[3] = mce
->misc
;
3502 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3503 banks
[1] = mce
->status
;
3504 kvm_queue_exception(vcpu
, MC_VECTOR
);
3505 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3506 || !(banks
[1] & MCI_STATUS_UC
)) {
3507 if (banks
[1] & MCI_STATUS_VAL
)
3508 mce
->status
|= MCI_STATUS_OVER
;
3509 banks
[2] = mce
->addr
;
3510 banks
[3] = mce
->misc
;
3511 banks
[1] = mce
->status
;
3513 banks
[1] |= MCI_STATUS_OVER
;
3517 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3518 struct kvm_vcpu_events
*events
)
3523 * The API doesn't provide the instruction length for software
3524 * exceptions, so don't report them. As long as the guest RIP
3525 * isn't advanced, we should expect to encounter the exception
3528 if (kvm_exception_is_soft(vcpu
->arch
.exception
.nr
)) {
3529 events
->exception
.injected
= 0;
3530 events
->exception
.pending
= 0;
3532 events
->exception
.injected
= vcpu
->arch
.exception
.injected
;
3533 events
->exception
.pending
= vcpu
->arch
.exception
.pending
;
3535 * For ABI compatibility, deliberately conflate
3536 * pending and injected exceptions when
3537 * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3539 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
3540 events
->exception
.injected
|=
3541 vcpu
->arch
.exception
.pending
;
3543 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3544 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3545 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3546 events
->exception_has_payload
= vcpu
->arch
.exception
.has_payload
;
3547 events
->exception_payload
= vcpu
->arch
.exception
.payload
;
3549 events
->interrupt
.injected
=
3550 vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
;
3551 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3552 events
->interrupt
.soft
= 0;
3553 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3555 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3556 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3557 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3558 events
->nmi
.pad
= 0;
3560 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3562 events
->smi
.smm
= is_smm(vcpu
);
3563 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3564 events
->smi
.smm_inside_nmi
=
3565 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3566 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3568 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3569 | KVM_VCPUEVENT_VALID_SHADOW
3570 | KVM_VCPUEVENT_VALID_SMM
);
3571 if (vcpu
->kvm
->arch
.exception_payload_enabled
)
3572 events
->flags
|= KVM_VCPUEVENT_VALID_PAYLOAD
;
3574 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3577 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
);
3579 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3580 struct kvm_vcpu_events
*events
)
3582 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3583 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3584 | KVM_VCPUEVENT_VALID_SHADOW
3585 | KVM_VCPUEVENT_VALID_SMM
3586 | KVM_VCPUEVENT_VALID_PAYLOAD
))
3589 if (events
->flags
& KVM_VCPUEVENT_VALID_PAYLOAD
) {
3590 if (!vcpu
->kvm
->arch
.exception_payload_enabled
)
3592 if (events
->exception
.pending
)
3593 events
->exception
.injected
= 0;
3595 events
->exception_has_payload
= 0;
3597 events
->exception
.pending
= 0;
3598 events
->exception_has_payload
= 0;
3601 if ((events
->exception
.injected
|| events
->exception
.pending
) &&
3602 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
))
3605 /* INITs are latched while in SMM */
3606 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3607 (events
->smi
.smm
|| events
->smi
.pending
) &&
3608 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3612 vcpu
->arch
.exception
.injected
= events
->exception
.injected
;
3613 vcpu
->arch
.exception
.pending
= events
->exception
.pending
;
3614 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3615 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3616 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3617 vcpu
->arch
.exception
.has_payload
= events
->exception_has_payload
;
3618 vcpu
->arch
.exception
.payload
= events
->exception_payload
;
3620 vcpu
->arch
.interrupt
.injected
= events
->interrupt
.injected
;
3621 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3622 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3623 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3624 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3625 events
->interrupt
.shadow
);
3627 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3628 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3629 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3630 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3632 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3633 lapic_in_kernel(vcpu
))
3634 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3636 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3637 if (!!(vcpu
->arch
.hflags
& HF_SMM_MASK
) != events
->smi
.smm
) {
3638 if (events
->smi
.smm
)
3639 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
3641 vcpu
->arch
.hflags
&= ~HF_SMM_MASK
;
3642 kvm_smm_changed(vcpu
);
3645 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3647 if (events
->smi
.smm
) {
3648 if (events
->smi
.smm_inside_nmi
)
3649 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3651 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3652 if (lapic_in_kernel(vcpu
)) {
3653 if (events
->smi
.latched_init
)
3654 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3656 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3661 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3666 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3667 struct kvm_debugregs
*dbgregs
)
3671 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3672 kvm_get_dr(vcpu
, 6, &val
);
3674 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3676 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3679 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3680 struct kvm_debugregs
*dbgregs
)
3685 if (dbgregs
->dr6
& ~0xffffffffull
)
3687 if (dbgregs
->dr7
& ~0xffffffffull
)
3690 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3691 kvm_update_dr0123(vcpu
);
3692 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3693 kvm_update_dr6(vcpu
);
3694 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3695 kvm_update_dr7(vcpu
);
3700 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3702 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3704 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
3705 u64 xstate_bv
= xsave
->header
.xfeatures
;
3709 * Copy legacy XSAVE area, to avoid complications with CPUID
3710 * leaves 0 and 1 in the loop below.
3712 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3715 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3716 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3719 * Copy each region from the possibly compacted offset to the
3720 * non-compacted offset.
3722 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3724 u64 xfeature_mask
= valid
& -valid
;
3725 int xfeature_nr
= fls64(xfeature_mask
) - 1;
3726 void *src
= get_xsave_addr(xsave
, xfeature_nr
);
3729 u32 size
, offset
, ecx
, edx
;
3730 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
3731 &size
, &offset
, &ecx
, &edx
);
3732 if (xfeature_nr
== XFEATURE_PKRU
)
3733 memcpy(dest
+ offset
, &vcpu
->arch
.pkru
,
3734 sizeof(vcpu
->arch
.pkru
));
3736 memcpy(dest
+ offset
, src
, size
);
3740 valid
-= xfeature_mask
;
3744 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3746 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
->state
.xsave
;
3747 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3751 * Copy legacy XSAVE area, to avoid complications with CPUID
3752 * leaves 0 and 1 in the loop below.
3754 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3756 /* Set XSTATE_BV and possibly XCOMP_BV. */
3757 xsave
->header
.xfeatures
= xstate_bv
;
3758 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3759 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3762 * Copy each region from the non-compacted offset to the
3763 * possibly compacted offset.
3765 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3767 u64 xfeature_mask
= valid
& -valid
;
3768 int xfeature_nr
= fls64(xfeature_mask
) - 1;
3769 void *dest
= get_xsave_addr(xsave
, xfeature_nr
);
3772 u32 size
, offset
, ecx
, edx
;
3773 cpuid_count(XSTATE_CPUID
, xfeature_nr
,
3774 &size
, &offset
, &ecx
, &edx
);
3775 if (xfeature_nr
== XFEATURE_PKRU
)
3776 memcpy(&vcpu
->arch
.pkru
, src
+ offset
,
3777 sizeof(vcpu
->arch
.pkru
));
3779 memcpy(dest
, src
+ offset
, size
);
3782 valid
-= xfeature_mask
;
3786 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3787 struct kvm_xsave
*guest_xsave
)
3789 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3790 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3791 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3793 memcpy(guest_xsave
->region
,
3794 &vcpu
->arch
.guest_fpu
->state
.fxsave
,
3795 sizeof(struct fxregs_state
));
3796 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3797 XFEATURE_MASK_FPSSE
;
3801 #define XSAVE_MXCSR_OFFSET 24
3803 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3804 struct kvm_xsave
*guest_xsave
)
3807 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3808 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3810 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3812 * Here we allow setting states that are not present in
3813 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3814 * with old userspace.
3816 if (xstate_bv
& ~kvm_supported_xcr0() ||
3817 mxcsr
& ~mxcsr_feature_mask
)
3819 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3821 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3822 mxcsr
& ~mxcsr_feature_mask
)
3824 memcpy(&vcpu
->arch
.guest_fpu
->state
.fxsave
,
3825 guest_xsave
->region
, sizeof(struct fxregs_state
));
3830 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3831 struct kvm_xcrs
*guest_xcrs
)
3833 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3834 guest_xcrs
->nr_xcrs
= 0;
3838 guest_xcrs
->nr_xcrs
= 1;
3839 guest_xcrs
->flags
= 0;
3840 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3841 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3844 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3845 struct kvm_xcrs
*guest_xcrs
)
3849 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3852 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3855 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3856 /* Only support XCR0 currently */
3857 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3858 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3859 guest_xcrs
->xcrs
[i
].value
);
3868 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3869 * stopped by the hypervisor. This function will be called from the host only.
3870 * EINVAL is returned when the host attempts to set the flag for a guest that
3871 * does not support pv clocks.
3873 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3875 if (!vcpu
->arch
.pv_time_enabled
)
3877 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3878 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3882 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3883 struct kvm_enable_cap
*cap
)
3886 uint16_t vmcs_version
;
3887 void __user
*user_ptr
;
3893 case KVM_CAP_HYPERV_SYNIC2
:
3898 case KVM_CAP_HYPERV_SYNIC
:
3899 if (!irqchip_in_kernel(vcpu
->kvm
))
3901 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3902 KVM_CAP_HYPERV_SYNIC2
);
3903 case KVM_CAP_HYPERV_ENLIGHTENED_VMCS
:
3904 if (!kvm_x86_ops
->nested_enable_evmcs
)
3906 r
= kvm_x86_ops
->nested_enable_evmcs(vcpu
, &vmcs_version
);
3908 user_ptr
= (void __user
*)(uintptr_t)cap
->args
[0];
3909 if (copy_to_user(user_ptr
, &vmcs_version
,
3910 sizeof(vmcs_version
)))
3920 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3921 unsigned int ioctl
, unsigned long arg
)
3923 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3924 void __user
*argp
= (void __user
*)arg
;
3927 struct kvm_lapic_state
*lapic
;
3928 struct kvm_xsave
*xsave
;
3929 struct kvm_xcrs
*xcrs
;
3937 case KVM_GET_LAPIC
: {
3939 if (!lapic_in_kernel(vcpu
))
3941 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
),
3942 GFP_KERNEL_ACCOUNT
);
3947 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3951 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3956 case KVM_SET_LAPIC
: {
3958 if (!lapic_in_kernel(vcpu
))
3960 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3961 if (IS_ERR(u
.lapic
)) {
3962 r
= PTR_ERR(u
.lapic
);
3966 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3969 case KVM_INTERRUPT
: {
3970 struct kvm_interrupt irq
;
3973 if (copy_from_user(&irq
, argp
, sizeof(irq
)))
3975 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3979 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3983 r
= kvm_vcpu_ioctl_smi(vcpu
);
3986 case KVM_SET_CPUID
: {
3987 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3988 struct kvm_cpuid cpuid
;
3991 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
3993 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3996 case KVM_SET_CPUID2
: {
3997 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3998 struct kvm_cpuid2 cpuid
;
4001 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4003 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
4004 cpuid_arg
->entries
);
4007 case KVM_GET_CPUID2
: {
4008 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4009 struct kvm_cpuid2 cpuid
;
4012 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4014 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
4015 cpuid_arg
->entries
);
4019 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4024 case KVM_GET_MSRS
: {
4025 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4026 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
4027 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4030 case KVM_SET_MSRS
: {
4031 int idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4032 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
4033 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4036 case KVM_TPR_ACCESS_REPORTING
: {
4037 struct kvm_tpr_access_ctl tac
;
4040 if (copy_from_user(&tac
, argp
, sizeof(tac
)))
4042 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
4046 if (copy_to_user(argp
, &tac
, sizeof(tac
)))
4051 case KVM_SET_VAPIC_ADDR
: {
4052 struct kvm_vapic_addr va
;
4056 if (!lapic_in_kernel(vcpu
))
4059 if (copy_from_user(&va
, argp
, sizeof(va
)))
4061 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
4062 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
4063 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
4066 case KVM_X86_SETUP_MCE
: {
4070 if (copy_from_user(&mcg_cap
, argp
, sizeof(mcg_cap
)))
4072 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
4075 case KVM_X86_SET_MCE
: {
4076 struct kvm_x86_mce mce
;
4079 if (copy_from_user(&mce
, argp
, sizeof(mce
)))
4081 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
4084 case KVM_GET_VCPU_EVENTS
: {
4085 struct kvm_vcpu_events events
;
4087 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
4090 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
4095 case KVM_SET_VCPU_EVENTS
: {
4096 struct kvm_vcpu_events events
;
4099 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
4102 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
4105 case KVM_GET_DEBUGREGS
: {
4106 struct kvm_debugregs dbgregs
;
4108 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
4111 if (copy_to_user(argp
, &dbgregs
,
4112 sizeof(struct kvm_debugregs
)))
4117 case KVM_SET_DEBUGREGS
: {
4118 struct kvm_debugregs dbgregs
;
4121 if (copy_from_user(&dbgregs
, argp
,
4122 sizeof(struct kvm_debugregs
)))
4125 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
4128 case KVM_GET_XSAVE
: {
4129 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL_ACCOUNT
);
4134 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
4137 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
4142 case KVM_SET_XSAVE
: {
4143 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
4144 if (IS_ERR(u
.xsave
)) {
4145 r
= PTR_ERR(u
.xsave
);
4149 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
4152 case KVM_GET_XCRS
: {
4153 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL_ACCOUNT
);
4158 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
4161 if (copy_to_user(argp
, u
.xcrs
,
4162 sizeof(struct kvm_xcrs
)))
4167 case KVM_SET_XCRS
: {
4168 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
4169 if (IS_ERR(u
.xcrs
)) {
4170 r
= PTR_ERR(u
.xcrs
);
4174 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
4177 case KVM_SET_TSC_KHZ
: {
4181 user_tsc_khz
= (u32
)arg
;
4183 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
4186 if (user_tsc_khz
== 0)
4187 user_tsc_khz
= tsc_khz
;
4189 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
4194 case KVM_GET_TSC_KHZ
: {
4195 r
= vcpu
->arch
.virtual_tsc_khz
;
4198 case KVM_KVMCLOCK_CTRL
: {
4199 r
= kvm_set_guest_paused(vcpu
);
4202 case KVM_ENABLE_CAP
: {
4203 struct kvm_enable_cap cap
;
4206 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4208 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
4211 case KVM_GET_NESTED_STATE
: {
4212 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4216 if (!kvm_x86_ops
->get_nested_state
)
4219 BUILD_BUG_ON(sizeof(user_data_size
) != sizeof(user_kvm_nested_state
->size
));
4221 if (get_user(user_data_size
, &user_kvm_nested_state
->size
))
4224 r
= kvm_x86_ops
->get_nested_state(vcpu
, user_kvm_nested_state
,
4229 if (r
> user_data_size
) {
4230 if (put_user(r
, &user_kvm_nested_state
->size
))
4240 case KVM_SET_NESTED_STATE
: {
4241 struct kvm_nested_state __user
*user_kvm_nested_state
= argp
;
4242 struct kvm_nested_state kvm_state
;
4245 if (!kvm_x86_ops
->set_nested_state
)
4249 if (copy_from_user(&kvm_state
, user_kvm_nested_state
, sizeof(kvm_state
)))
4253 if (kvm_state
.size
< sizeof(kvm_state
))
4256 if (kvm_state
.flags
&
4257 ~(KVM_STATE_NESTED_RUN_PENDING
| KVM_STATE_NESTED_GUEST_MODE
4258 | KVM_STATE_NESTED_EVMCS
))
4261 /* nested_run_pending implies guest_mode. */
4262 if ((kvm_state
.flags
& KVM_STATE_NESTED_RUN_PENDING
)
4263 && !(kvm_state
.flags
& KVM_STATE_NESTED_GUEST_MODE
))
4266 r
= kvm_x86_ops
->set_nested_state(vcpu
, user_kvm_nested_state
, &kvm_state
);
4269 case KVM_GET_SUPPORTED_HV_CPUID
: {
4270 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
4271 struct kvm_cpuid2 cpuid
;
4274 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof(cpuid
)))
4277 r
= kvm_vcpu_ioctl_get_hv_cpuid(vcpu
, &cpuid
,
4278 cpuid_arg
->entries
);
4283 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof(cpuid
)))
4298 vm_fault_t
kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
4300 return VM_FAULT_SIGBUS
;
4303 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
4307 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
4309 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
4313 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
4316 return kvm_x86_ops
->set_identity_map_addr(kvm
, ident_addr
);
4319 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
4320 unsigned long kvm_nr_mmu_pages
)
4322 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
4325 mutex_lock(&kvm
->slots_lock
);
4327 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
4328 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
4330 mutex_unlock(&kvm
->slots_lock
);
4334 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
4336 return kvm
->arch
.n_max_mmu_pages
;
4339 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
4341 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
4345 switch (chip
->chip_id
) {
4346 case KVM_IRQCHIP_PIC_MASTER
:
4347 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
4348 sizeof(struct kvm_pic_state
));
4350 case KVM_IRQCHIP_PIC_SLAVE
:
4351 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
4352 sizeof(struct kvm_pic_state
));
4354 case KVM_IRQCHIP_IOAPIC
:
4355 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
4364 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
4366 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
4370 switch (chip
->chip_id
) {
4371 case KVM_IRQCHIP_PIC_MASTER
:
4372 spin_lock(&pic
->lock
);
4373 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
4374 sizeof(struct kvm_pic_state
));
4375 spin_unlock(&pic
->lock
);
4377 case KVM_IRQCHIP_PIC_SLAVE
:
4378 spin_lock(&pic
->lock
);
4379 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
4380 sizeof(struct kvm_pic_state
));
4381 spin_unlock(&pic
->lock
);
4383 case KVM_IRQCHIP_IOAPIC
:
4384 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
4390 kvm_pic_update_irq(pic
);
4394 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4396 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
4398 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
4400 mutex_lock(&kps
->lock
);
4401 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
4402 mutex_unlock(&kps
->lock
);
4406 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
4409 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4411 mutex_lock(&pit
->pit_state
.lock
);
4412 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
4413 for (i
= 0; i
< 3; i
++)
4414 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
4415 mutex_unlock(&pit
->pit_state
.lock
);
4419 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4421 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
4422 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
4423 sizeof(ps
->channels
));
4424 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
4425 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
4426 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
4430 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
4434 u32 prev_legacy
, cur_legacy
;
4435 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4437 mutex_lock(&pit
->pit_state
.lock
);
4438 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4439 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
4440 if (!prev_legacy
&& cur_legacy
)
4442 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
4443 sizeof(pit
->pit_state
.channels
));
4444 pit
->pit_state
.flags
= ps
->flags
;
4445 for (i
= 0; i
< 3; i
++)
4446 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
4448 mutex_unlock(&pit
->pit_state
.lock
);
4452 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
4453 struct kvm_reinject_control
*control
)
4455 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
4460 /* pit->pit_state.lock was overloaded to prevent userspace from getting
4461 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4462 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
4464 mutex_lock(&pit
->pit_state
.lock
);
4465 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
4466 mutex_unlock(&pit
->pit_state
.lock
);
4472 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4473 * @kvm: kvm instance
4474 * @log: slot id and address to which we copy the log
4476 * Steps 1-4 below provide general overview of dirty page logging. See
4477 * kvm_get_dirty_log_protect() function description for additional details.
4479 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4480 * always flush the TLB (step 4) even if previous step failed and the dirty
4481 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4482 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4483 * writes will be marked dirty for next log read.
4485 * 1. Take a snapshot of the bit and clear it if needed.
4486 * 2. Write protect the corresponding page.
4487 * 3. Copy the snapshot to the userspace.
4488 * 4. Flush TLB's if needed.
4490 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
4495 mutex_lock(&kvm
->slots_lock
);
4498 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4500 if (kvm_x86_ops
->flush_log_dirty
)
4501 kvm_x86_ops
->flush_log_dirty(kvm
);
4503 r
= kvm_get_dirty_log_protect(kvm
, log
, &flush
);
4506 * All the TLBs can be flushed out of mmu lock, see the comments in
4507 * kvm_mmu_slot_remove_write_access().
4509 lockdep_assert_held(&kvm
->slots_lock
);
4511 kvm_flush_remote_tlbs(kvm
);
4513 mutex_unlock(&kvm
->slots_lock
);
4517 int kvm_vm_ioctl_clear_dirty_log(struct kvm
*kvm
, struct kvm_clear_dirty_log
*log
)
4522 mutex_lock(&kvm
->slots_lock
);
4525 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4527 if (kvm_x86_ops
->flush_log_dirty
)
4528 kvm_x86_ops
->flush_log_dirty(kvm
);
4530 r
= kvm_clear_dirty_log_protect(kvm
, log
, &flush
);
4533 * All the TLBs can be flushed out of mmu lock, see the comments in
4534 * kvm_mmu_slot_remove_write_access().
4536 lockdep_assert_held(&kvm
->slots_lock
);
4538 kvm_flush_remote_tlbs(kvm
);
4540 mutex_unlock(&kvm
->slots_lock
);
4544 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
4547 if (!irqchip_in_kernel(kvm
))
4550 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
4551 irq_event
->irq
, irq_event
->level
,
4556 int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
4557 struct kvm_enable_cap
*cap
)
4565 case KVM_CAP_DISABLE_QUIRKS
:
4566 kvm
->arch
.disabled_quirks
= cap
->args
[0];
4569 case KVM_CAP_SPLIT_IRQCHIP
: {
4570 mutex_lock(&kvm
->lock
);
4572 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
4573 goto split_irqchip_unlock
;
4575 if (irqchip_in_kernel(kvm
))
4576 goto split_irqchip_unlock
;
4577 if (kvm
->created_vcpus
)
4578 goto split_irqchip_unlock
;
4579 r
= kvm_setup_empty_irq_routing(kvm
);
4581 goto split_irqchip_unlock
;
4582 /* Pairs with irqchip_in_kernel. */
4584 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
4585 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
4587 split_irqchip_unlock
:
4588 mutex_unlock(&kvm
->lock
);
4591 case KVM_CAP_X2APIC_API
:
4593 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
4596 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
4597 kvm
->arch
.x2apic_format
= true;
4598 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
4599 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
4603 case KVM_CAP_X86_DISABLE_EXITS
:
4605 if (cap
->args
[0] & ~KVM_X86_DISABLE_VALID_EXITS
)
4608 if ((cap
->args
[0] & KVM_X86_DISABLE_EXITS_MWAIT
) &&
4609 kvm_can_mwait_in_guest())
4610 kvm
->arch
.mwait_in_guest
= true;
4611 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_HLT
)
4612 kvm
->arch
.hlt_in_guest
= true;
4613 if (cap
->args
[0] & KVM_X86_DISABLE_EXITS_PAUSE
)
4614 kvm
->arch
.pause_in_guest
= true;
4617 case KVM_CAP_MSR_PLATFORM_INFO
:
4618 kvm
->arch
.guest_can_read_msr_platform_info
= cap
->args
[0];
4621 case KVM_CAP_EXCEPTION_PAYLOAD
:
4622 kvm
->arch
.exception_payload_enabled
= cap
->args
[0];
4632 long kvm_arch_vm_ioctl(struct file
*filp
,
4633 unsigned int ioctl
, unsigned long arg
)
4635 struct kvm
*kvm
= filp
->private_data
;
4636 void __user
*argp
= (void __user
*)arg
;
4639 * This union makes it completely explicit to gcc-3.x
4640 * that these two variables' stack usage should be
4641 * combined, not added together.
4644 struct kvm_pit_state ps
;
4645 struct kvm_pit_state2 ps2
;
4646 struct kvm_pit_config pit_config
;
4650 case KVM_SET_TSS_ADDR
:
4651 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
4653 case KVM_SET_IDENTITY_MAP_ADDR
: {
4656 mutex_lock(&kvm
->lock
);
4658 if (kvm
->created_vcpus
)
4659 goto set_identity_unlock
;
4661 if (copy_from_user(&ident_addr
, argp
, sizeof(ident_addr
)))
4662 goto set_identity_unlock
;
4663 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4664 set_identity_unlock
:
4665 mutex_unlock(&kvm
->lock
);
4668 case KVM_SET_NR_MMU_PAGES
:
4669 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4671 case KVM_GET_NR_MMU_PAGES
:
4672 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4674 case KVM_CREATE_IRQCHIP
: {
4675 mutex_lock(&kvm
->lock
);
4678 if (irqchip_in_kernel(kvm
))
4679 goto create_irqchip_unlock
;
4682 if (kvm
->created_vcpus
)
4683 goto create_irqchip_unlock
;
4685 r
= kvm_pic_init(kvm
);
4687 goto create_irqchip_unlock
;
4689 r
= kvm_ioapic_init(kvm
);
4691 kvm_pic_destroy(kvm
);
4692 goto create_irqchip_unlock
;
4695 r
= kvm_setup_default_irq_routing(kvm
);
4697 kvm_ioapic_destroy(kvm
);
4698 kvm_pic_destroy(kvm
);
4699 goto create_irqchip_unlock
;
4701 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4703 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4704 create_irqchip_unlock
:
4705 mutex_unlock(&kvm
->lock
);
4708 case KVM_CREATE_PIT
:
4709 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4711 case KVM_CREATE_PIT2
:
4713 if (copy_from_user(&u
.pit_config
, argp
,
4714 sizeof(struct kvm_pit_config
)))
4717 mutex_lock(&kvm
->lock
);
4720 goto create_pit_unlock
;
4722 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4726 mutex_unlock(&kvm
->lock
);
4728 case KVM_GET_IRQCHIP
: {
4729 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4730 struct kvm_irqchip
*chip
;
4732 chip
= memdup_user(argp
, sizeof(*chip
));
4739 if (!irqchip_kernel(kvm
))
4740 goto get_irqchip_out
;
4741 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4743 goto get_irqchip_out
;
4745 if (copy_to_user(argp
, chip
, sizeof(*chip
)))
4746 goto get_irqchip_out
;
4752 case KVM_SET_IRQCHIP
: {
4753 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4754 struct kvm_irqchip
*chip
;
4756 chip
= memdup_user(argp
, sizeof(*chip
));
4763 if (!irqchip_kernel(kvm
))
4764 goto set_irqchip_out
;
4765 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4767 goto set_irqchip_out
;
4775 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4778 if (!kvm
->arch
.vpit
)
4780 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4784 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4791 if (copy_from_user(&u
.ps
, argp
, sizeof(u
.ps
)))
4794 if (!kvm
->arch
.vpit
)
4796 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4799 case KVM_GET_PIT2
: {
4801 if (!kvm
->arch
.vpit
)
4803 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4807 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4812 case KVM_SET_PIT2
: {
4814 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4817 if (!kvm
->arch
.vpit
)
4819 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4822 case KVM_REINJECT_CONTROL
: {
4823 struct kvm_reinject_control control
;
4825 if (copy_from_user(&control
, argp
, sizeof(control
)))
4827 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4830 case KVM_SET_BOOT_CPU_ID
:
4832 mutex_lock(&kvm
->lock
);
4833 if (kvm
->created_vcpus
)
4836 kvm
->arch
.bsp_vcpu_id
= arg
;
4837 mutex_unlock(&kvm
->lock
);
4839 case KVM_XEN_HVM_CONFIG
: {
4840 struct kvm_xen_hvm_config xhc
;
4842 if (copy_from_user(&xhc
, argp
, sizeof(xhc
)))
4847 memcpy(&kvm
->arch
.xen_hvm_config
, &xhc
, sizeof(xhc
));
4851 case KVM_SET_CLOCK
: {
4852 struct kvm_clock_data user_ns
;
4856 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4865 * TODO: userspace has to take care of races with VCPU_RUN, so
4866 * kvm_gen_update_masterclock() can be cut down to locked
4867 * pvclock_update_vm_gtod_copy().
4869 kvm_gen_update_masterclock(kvm
);
4870 now_ns
= get_kvmclock_ns(kvm
);
4871 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4872 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4875 case KVM_GET_CLOCK
: {
4876 struct kvm_clock_data user_ns
;
4879 now_ns
= get_kvmclock_ns(kvm
);
4880 user_ns
.clock
= now_ns
;
4881 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4882 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4885 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4890 case KVM_MEMORY_ENCRYPT_OP
: {
4892 if (kvm_x86_ops
->mem_enc_op
)
4893 r
= kvm_x86_ops
->mem_enc_op(kvm
, argp
);
4896 case KVM_MEMORY_ENCRYPT_REG_REGION
: {
4897 struct kvm_enc_region region
;
4900 if (copy_from_user(®ion
, argp
, sizeof(region
)))
4904 if (kvm_x86_ops
->mem_enc_reg_region
)
4905 r
= kvm_x86_ops
->mem_enc_reg_region(kvm
, ®ion
);
4908 case KVM_MEMORY_ENCRYPT_UNREG_REGION
: {
4909 struct kvm_enc_region region
;
4912 if (copy_from_user(®ion
, argp
, sizeof(region
)))
4916 if (kvm_x86_ops
->mem_enc_unreg_region
)
4917 r
= kvm_x86_ops
->mem_enc_unreg_region(kvm
, ®ion
);
4920 case KVM_HYPERV_EVENTFD
: {
4921 struct kvm_hyperv_eventfd hvevfd
;
4924 if (copy_from_user(&hvevfd
, argp
, sizeof(hvevfd
)))
4926 r
= kvm_vm_ioctl_hv_eventfd(kvm
, &hvevfd
);
4936 static void kvm_init_msr_list(void)
4941 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4942 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4946 * Even MSRs that are valid in the host may not be exposed
4947 * to the guests in some cases.
4949 switch (msrs_to_save
[i
]) {
4950 case MSR_IA32_BNDCFGS
:
4951 if (!kvm_mpx_supported())
4955 if (!kvm_x86_ops
->rdtscp_supported())
4958 case MSR_IA32_RTIT_CTL
:
4959 case MSR_IA32_RTIT_STATUS
:
4960 if (!kvm_x86_ops
->pt_supported())
4963 case MSR_IA32_RTIT_CR3_MATCH
:
4964 if (!kvm_x86_ops
->pt_supported() ||
4965 !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering
))
4968 case MSR_IA32_RTIT_OUTPUT_BASE
:
4969 case MSR_IA32_RTIT_OUTPUT_MASK
:
4970 if (!kvm_x86_ops
->pt_supported() ||
4971 (!intel_pt_validate_hw_cap(PT_CAP_topa_output
) &&
4972 !intel_pt_validate_hw_cap(PT_CAP_single_range_output
)))
4975 case MSR_IA32_RTIT_ADDR0_A
... MSR_IA32_RTIT_ADDR3_B
: {
4976 if (!kvm_x86_ops
->pt_supported() ||
4977 msrs_to_save
[i
] - MSR_IA32_RTIT_ADDR0_A
>=
4978 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges
) * 2)
4987 msrs_to_save
[j
] = msrs_to_save
[i
];
4990 num_msrs_to_save
= j
;
4992 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4993 if (!kvm_x86_ops
->has_emulated_msr(emulated_msrs
[i
]))
4997 emulated_msrs
[j
] = emulated_msrs
[i
];
5000 num_emulated_msrs
= j
;
5002 for (i
= j
= 0; i
< ARRAY_SIZE(msr_based_features
); i
++) {
5003 struct kvm_msr_entry msr
;
5005 msr
.index
= msr_based_features
[i
];
5006 if (kvm_get_msr_feature(&msr
))
5010 msr_based_features
[j
] = msr_based_features
[i
];
5013 num_msr_based_features
= j
;
5016 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
5024 if (!(lapic_in_kernel(vcpu
) &&
5025 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
5026 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5037 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
5044 if (!(lapic_in_kernel(vcpu
) &&
5045 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
5047 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
5049 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, v
);
5059 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
5060 struct kvm_segment
*var
, int seg
)
5062 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
5065 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
5066 struct kvm_segment
*var
, int seg
)
5068 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
5071 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
5072 struct x86_exception
*exception
)
5076 BUG_ON(!mmu_is_nested(vcpu
));
5078 /* NPT walks are always user-walks */
5079 access
|= PFERR_USER_MASK
;
5080 t_gpa
= vcpu
->arch
.mmu
->gva_to_gpa(vcpu
, gpa
, access
, exception
);
5085 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
5086 struct x86_exception
*exception
)
5088 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5089 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5092 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
5093 struct x86_exception
*exception
)
5095 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5096 access
|= PFERR_FETCH_MASK
;
5097 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5100 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
5101 struct x86_exception
*exception
)
5103 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5104 access
|= PFERR_WRITE_MASK
;
5105 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5108 /* uses this to access any guest's mapped memory without checking CPL */
5109 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
5110 struct x86_exception
*exception
)
5112 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
5115 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
5116 struct kvm_vcpu
*vcpu
, u32 access
,
5117 struct x86_exception
*exception
)
5120 int r
= X86EMUL_CONTINUE
;
5123 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
5125 unsigned offset
= addr
& (PAGE_SIZE
-1);
5126 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
5129 if (gpa
== UNMAPPED_GVA
)
5130 return X86EMUL_PROPAGATE_FAULT
;
5131 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
5134 r
= X86EMUL_IO_NEEDED
;
5146 /* used for instruction fetching */
5147 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
5148 gva_t addr
, void *val
, unsigned int bytes
,
5149 struct x86_exception
*exception
)
5151 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5152 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5156 /* Inline kvm_read_guest_virt_helper for speed. */
5157 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
5159 if (unlikely(gpa
== UNMAPPED_GVA
))
5160 return X86EMUL_PROPAGATE_FAULT
;
5162 offset
= addr
& (PAGE_SIZE
-1);
5163 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
5164 bytes
= (unsigned)PAGE_SIZE
- offset
;
5165 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
5167 if (unlikely(ret
< 0))
5168 return X86EMUL_IO_NEEDED
;
5170 return X86EMUL_CONTINUE
;
5173 int kvm_read_guest_virt(struct kvm_vcpu
*vcpu
,
5174 gva_t addr
, void *val
, unsigned int bytes
,
5175 struct x86_exception
*exception
)
5177 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
5180 * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5181 * is returned, but our callers are not ready for that and they blindly
5182 * call kvm_inject_page_fault. Ensure that they at least do not leak
5183 * uninitialized kernel stack memory into cr2 and error code.
5185 memset(exception
, 0, sizeof(*exception
));
5186 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
5189 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
5191 static int emulator_read_std(struct x86_emulate_ctxt
*ctxt
,
5192 gva_t addr
, void *val
, unsigned int bytes
,
5193 struct x86_exception
*exception
, bool system
)
5195 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5198 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
5199 access
|= PFERR_USER_MASK
;
5201 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
, exception
);
5204 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
5205 unsigned long addr
, void *val
, unsigned int bytes
)
5207 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5208 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
5210 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
5213 static int kvm_write_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
5214 struct kvm_vcpu
*vcpu
, u32 access
,
5215 struct x86_exception
*exception
)
5218 int r
= X86EMUL_CONTINUE
;
5221 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
5224 unsigned offset
= addr
& (PAGE_SIZE
-1);
5225 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
5228 if (gpa
== UNMAPPED_GVA
)
5229 return X86EMUL_PROPAGATE_FAULT
;
5230 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
5232 r
= X86EMUL_IO_NEEDED
;
5244 static int emulator_write_std(struct x86_emulate_ctxt
*ctxt
, gva_t addr
, void *val
,
5245 unsigned int bytes
, struct x86_exception
*exception
,
5248 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5249 u32 access
= PFERR_WRITE_MASK
;
5251 if (!system
&& kvm_x86_ops
->get_cpl(vcpu
) == 3)
5252 access
|= PFERR_USER_MASK
;
5254 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
5258 int kvm_write_guest_virt_system(struct kvm_vcpu
*vcpu
, gva_t addr
, void *val
,
5259 unsigned int bytes
, struct x86_exception
*exception
)
5261 /* kvm_write_guest_virt_system can pull in tons of pages. */
5262 vcpu
->arch
.l1tf_flush_l1d
= true;
5264 return kvm_write_guest_virt_helper(addr
, val
, bytes
, vcpu
,
5265 PFERR_WRITE_MASK
, exception
);
5267 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
5269 int handle_ud(struct kvm_vcpu
*vcpu
)
5271 int emul_type
= EMULTYPE_TRAP_UD
;
5272 enum emulation_result er
;
5273 char sig
[5]; /* ud2; .ascii "kvm" */
5274 struct x86_exception e
;
5276 if (force_emulation_prefix
&&
5277 kvm_read_guest_virt(vcpu
, kvm_get_linear_rip(vcpu
),
5278 sig
, sizeof(sig
), &e
) == 0 &&
5279 memcmp(sig
, "\xf\xbkvm", sizeof(sig
)) == 0) {
5280 kvm_rip_write(vcpu
, kvm_rip_read(vcpu
) + sizeof(sig
));
5284 er
= kvm_emulate_instruction(vcpu
, emul_type
);
5285 if (er
== EMULATE_USER_EXIT
)
5287 if (er
!= EMULATE_DONE
)
5288 kvm_queue_exception(vcpu
, UD_VECTOR
);
5291 EXPORT_SYMBOL_GPL(handle_ud
);
5293 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
5294 gpa_t gpa
, bool write
)
5296 /* For APIC access vmexit */
5297 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5300 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
5301 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
5308 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
5309 gpa_t
*gpa
, struct x86_exception
*exception
,
5312 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
5313 | (write
? PFERR_WRITE_MASK
: 0);
5316 * currently PKRU is only applied to ept enabled guest so
5317 * there is no pkey in EPT page table for L1 guest or EPT
5318 * shadow page table for L2 guest.
5320 if (vcpu_match_mmio_gva(vcpu
, gva
)
5321 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
5322 vcpu
->arch
.access
, 0, access
)) {
5323 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
5324 (gva
& (PAGE_SIZE
- 1));
5325 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
5329 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
5331 if (*gpa
== UNMAPPED_GVA
)
5334 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
5337 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5338 const void *val
, int bytes
)
5342 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
5345 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
5349 struct read_write_emulator_ops
{
5350 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
5352 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5353 void *val
, int bytes
);
5354 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5355 int bytes
, void *val
);
5356 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5357 void *val
, int bytes
);
5361 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
5363 if (vcpu
->mmio_read_completed
) {
5364 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
5365 vcpu
->mmio_fragments
[0].gpa
, val
);
5366 vcpu
->mmio_read_completed
= 0;
5373 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5374 void *val
, int bytes
)
5376 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
5379 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5380 void *val
, int bytes
)
5382 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
5385 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
5387 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, val
);
5388 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
5391 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5392 void *val
, int bytes
)
5394 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, NULL
);
5395 return X86EMUL_IO_NEEDED
;
5398 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
5399 void *val
, int bytes
)
5401 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
5403 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
5404 return X86EMUL_CONTINUE
;
5407 static const struct read_write_emulator_ops read_emultor
= {
5408 .read_write_prepare
= read_prepare
,
5409 .read_write_emulate
= read_emulate
,
5410 .read_write_mmio
= vcpu_mmio_read
,
5411 .read_write_exit_mmio
= read_exit_mmio
,
5414 static const struct read_write_emulator_ops write_emultor
= {
5415 .read_write_emulate
= write_emulate
,
5416 .read_write_mmio
= write_mmio
,
5417 .read_write_exit_mmio
= write_exit_mmio
,
5421 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
5423 struct x86_exception
*exception
,
5424 struct kvm_vcpu
*vcpu
,
5425 const struct read_write_emulator_ops
*ops
)
5429 bool write
= ops
->write
;
5430 struct kvm_mmio_fragment
*frag
;
5431 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5434 * If the exit was due to a NPF we may already have a GPA.
5435 * If the GPA is present, use it to avoid the GVA to GPA table walk.
5436 * Note, this cannot be used on string operations since string
5437 * operation using rep will only have the initial GPA from the NPF
5440 if (vcpu
->arch
.gpa_available
&&
5441 emulator_can_use_gpa(ctxt
) &&
5442 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
5443 gpa
= vcpu
->arch
.gpa_val
;
5444 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
5446 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
5448 return X86EMUL_PROPAGATE_FAULT
;
5451 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
5452 return X86EMUL_CONTINUE
;
5455 * Is this MMIO handled locally?
5457 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
5458 if (handled
== bytes
)
5459 return X86EMUL_CONTINUE
;
5465 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
5466 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
5470 return X86EMUL_CONTINUE
;
5473 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
5475 void *val
, unsigned int bytes
,
5476 struct x86_exception
*exception
,
5477 const struct read_write_emulator_ops
*ops
)
5479 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5483 if (ops
->read_write_prepare
&&
5484 ops
->read_write_prepare(vcpu
, val
, bytes
))
5485 return X86EMUL_CONTINUE
;
5487 vcpu
->mmio_nr_fragments
= 0;
5489 /* Crossing a page boundary? */
5490 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
5493 now
= -addr
& ~PAGE_MASK
;
5494 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
5497 if (rc
!= X86EMUL_CONTINUE
)
5500 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
5506 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
5508 if (rc
!= X86EMUL_CONTINUE
)
5511 if (!vcpu
->mmio_nr_fragments
)
5514 gpa
= vcpu
->mmio_fragments
[0].gpa
;
5516 vcpu
->mmio_needed
= 1;
5517 vcpu
->mmio_cur_fragment
= 0;
5519 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
5520 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
5521 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
5522 vcpu
->run
->mmio
.phys_addr
= gpa
;
5524 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
5527 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
5531 struct x86_exception
*exception
)
5533 return emulator_read_write(ctxt
, addr
, val
, bytes
,
5534 exception
, &read_emultor
);
5537 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
5541 struct x86_exception
*exception
)
5543 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
5544 exception
, &write_emultor
);
5547 #define CMPXCHG_TYPE(t, ptr, old, new) \
5548 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5550 #ifdef CONFIG_X86_64
5551 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5553 # define CMPXCHG64(ptr, old, new) \
5554 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5557 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
5562 struct x86_exception
*exception
)
5564 struct kvm_host_map map
;
5565 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5570 /* guests cmpxchg8b have to be emulated atomically */
5571 if (bytes
> 8 || (bytes
& (bytes
- 1)))
5574 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
5576 if (gpa
== UNMAPPED_GVA
||
5577 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
5580 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
5583 if (kvm_vcpu_map(vcpu
, gpa_to_gfn(gpa
), &map
))
5586 kaddr
= map
.hva
+ offset_in_page(gpa
);
5590 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
5593 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
5596 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
5599 exchanged
= CMPXCHG64(kaddr
, old
, new);
5605 kvm_vcpu_unmap(vcpu
, &map
, true);
5608 return X86EMUL_CMPXCHG_FAILED
;
5610 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
5612 return X86EMUL_CONTINUE
;
5615 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
5617 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
5620 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
5624 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
5625 if (vcpu
->arch
.pio
.in
)
5626 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
5627 vcpu
->arch
.pio
.size
, pd
);
5629 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
5630 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
5634 pd
+= vcpu
->arch
.pio
.size
;
5639 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
5640 unsigned short port
, void *val
,
5641 unsigned int count
, bool in
)
5643 vcpu
->arch
.pio
.port
= port
;
5644 vcpu
->arch
.pio
.in
= in
;
5645 vcpu
->arch
.pio
.count
= count
;
5646 vcpu
->arch
.pio
.size
= size
;
5648 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
5649 vcpu
->arch
.pio
.count
= 0;
5653 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
5654 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
5655 vcpu
->run
->io
.size
= size
;
5656 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
5657 vcpu
->run
->io
.count
= count
;
5658 vcpu
->run
->io
.port
= port
;
5663 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
5664 int size
, unsigned short port
, void *val
,
5667 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5670 if (vcpu
->arch
.pio
.count
)
5673 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
5675 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
5678 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
5679 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
5680 vcpu
->arch
.pio
.count
= 0;
5687 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
5688 int size
, unsigned short port
,
5689 const void *val
, unsigned int count
)
5691 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5693 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
5694 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
5695 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
5698 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
5700 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
5703 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
5705 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
5708 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
5710 if (!need_emulate_wbinvd(vcpu
))
5711 return X86EMUL_CONTINUE
;
5713 if (kvm_x86_ops
->has_wbinvd_exit()) {
5714 int cpu
= get_cpu();
5716 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
5717 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
5718 wbinvd_ipi
, NULL
, 1);
5720 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
5723 return X86EMUL_CONTINUE
;
5726 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
5728 kvm_emulate_wbinvd_noskip(vcpu
);
5729 return kvm_skip_emulated_instruction(vcpu
);
5731 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
5735 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
5737 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
5740 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5741 unsigned long *dest
)
5743 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
5746 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
5747 unsigned long value
)
5750 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
5753 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
5755 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
5758 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
5760 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5761 unsigned long value
;
5765 value
= kvm_read_cr0(vcpu
);
5768 value
= vcpu
->arch
.cr2
;
5771 value
= kvm_read_cr3(vcpu
);
5774 value
= kvm_read_cr4(vcpu
);
5777 value
= kvm_get_cr8(vcpu
);
5780 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5787 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5789 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5794 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5797 vcpu
->arch
.cr2
= val
;
5800 res
= kvm_set_cr3(vcpu
, val
);
5803 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5806 res
= kvm_set_cr8(vcpu
, val
);
5809 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5816 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5818 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5821 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5823 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5826 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5828 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5831 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5833 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5836 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5838 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5841 static unsigned long emulator_get_cached_segment_base(
5842 struct x86_emulate_ctxt
*ctxt
, int seg
)
5844 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5847 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5848 struct desc_struct
*desc
, u32
*base3
,
5851 struct kvm_segment var
;
5853 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5854 *selector
= var
.selector
;
5857 memset(desc
, 0, sizeof(*desc
));
5865 set_desc_limit(desc
, var
.limit
);
5866 set_desc_base(desc
, (unsigned long)var
.base
);
5867 #ifdef CONFIG_X86_64
5869 *base3
= var
.base
>> 32;
5871 desc
->type
= var
.type
;
5873 desc
->dpl
= var
.dpl
;
5874 desc
->p
= var
.present
;
5875 desc
->avl
= var
.avl
;
5883 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5884 struct desc_struct
*desc
, u32 base3
,
5887 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5888 struct kvm_segment var
;
5890 var
.selector
= selector
;
5891 var
.base
= get_desc_base(desc
);
5892 #ifdef CONFIG_X86_64
5893 var
.base
|= ((u64
)base3
) << 32;
5895 var
.limit
= get_desc_limit(desc
);
5897 var
.limit
= (var
.limit
<< 12) | 0xfff;
5898 var
.type
= desc
->type
;
5899 var
.dpl
= desc
->dpl
;
5904 var
.avl
= desc
->avl
;
5905 var
.present
= desc
->p
;
5906 var
.unusable
= !var
.present
;
5909 kvm_set_segment(vcpu
, &var
, seg
);
5913 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5914 u32 msr_index
, u64
*pdata
)
5916 struct msr_data msr
;
5919 msr
.index
= msr_index
;
5920 msr
.host_initiated
= false;
5921 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5929 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5930 u32 msr_index
, u64 data
)
5932 struct msr_data msr
;
5935 msr
.index
= msr_index
;
5936 msr
.host_initiated
= false;
5937 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5940 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5942 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5944 return vcpu
->arch
.smbase
;
5947 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5949 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5951 vcpu
->arch
.smbase
= smbase
;
5954 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5957 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5960 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5961 u32 pmc
, u64
*pdata
)
5963 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5966 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5968 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5971 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5972 struct x86_instruction_info
*info
,
5973 enum x86_intercept_stage stage
)
5975 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5978 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5979 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5981 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5984 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5986 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5989 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5991 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5994 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5996 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5999 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
6001 return emul_to_vcpu(ctxt
)->arch
.hflags
;
6004 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
6006 emul_to_vcpu(ctxt
)->arch
.hflags
= emul_flags
;
6009 static int emulator_pre_leave_smm(struct x86_emulate_ctxt
*ctxt
,
6010 const char *smstate
)
6012 return kvm_x86_ops
->pre_leave_smm(emul_to_vcpu(ctxt
), smstate
);
6015 static void emulator_post_leave_smm(struct x86_emulate_ctxt
*ctxt
)
6017 kvm_smm_changed(emul_to_vcpu(ctxt
));
6020 static const struct x86_emulate_ops emulate_ops
= {
6021 .read_gpr
= emulator_read_gpr
,
6022 .write_gpr
= emulator_write_gpr
,
6023 .read_std
= emulator_read_std
,
6024 .write_std
= emulator_write_std
,
6025 .read_phys
= kvm_read_guest_phys_system
,
6026 .fetch
= kvm_fetch_guest_virt
,
6027 .read_emulated
= emulator_read_emulated
,
6028 .write_emulated
= emulator_write_emulated
,
6029 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
6030 .invlpg
= emulator_invlpg
,
6031 .pio_in_emulated
= emulator_pio_in_emulated
,
6032 .pio_out_emulated
= emulator_pio_out_emulated
,
6033 .get_segment
= emulator_get_segment
,
6034 .set_segment
= emulator_set_segment
,
6035 .get_cached_segment_base
= emulator_get_cached_segment_base
,
6036 .get_gdt
= emulator_get_gdt
,
6037 .get_idt
= emulator_get_idt
,
6038 .set_gdt
= emulator_set_gdt
,
6039 .set_idt
= emulator_set_idt
,
6040 .get_cr
= emulator_get_cr
,
6041 .set_cr
= emulator_set_cr
,
6042 .cpl
= emulator_get_cpl
,
6043 .get_dr
= emulator_get_dr
,
6044 .set_dr
= emulator_set_dr
,
6045 .get_smbase
= emulator_get_smbase
,
6046 .set_smbase
= emulator_set_smbase
,
6047 .set_msr
= emulator_set_msr
,
6048 .get_msr
= emulator_get_msr
,
6049 .check_pmc
= emulator_check_pmc
,
6050 .read_pmc
= emulator_read_pmc
,
6051 .halt
= emulator_halt
,
6052 .wbinvd
= emulator_wbinvd
,
6053 .fix_hypercall
= emulator_fix_hypercall
,
6054 .intercept
= emulator_intercept
,
6055 .get_cpuid
= emulator_get_cpuid
,
6056 .set_nmi_mask
= emulator_set_nmi_mask
,
6057 .get_hflags
= emulator_get_hflags
,
6058 .set_hflags
= emulator_set_hflags
,
6059 .pre_leave_smm
= emulator_pre_leave_smm
,
6060 .post_leave_smm
= emulator_post_leave_smm
,
6063 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
6065 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
6067 * an sti; sti; sequence only disable interrupts for the first
6068 * instruction. So, if the last instruction, be it emulated or
6069 * not, left the system with the INT_STI flag enabled, it
6070 * means that the last instruction is an sti. We should not
6071 * leave the flag on in this case. The same goes for mov ss
6073 if (int_shadow
& mask
)
6075 if (unlikely(int_shadow
|| mask
)) {
6076 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
6078 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6082 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
6084 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6085 if (ctxt
->exception
.vector
== PF_VECTOR
)
6086 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
6088 if (ctxt
->exception
.error_code_valid
)
6089 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
6090 ctxt
->exception
.error_code
);
6092 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
6096 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
6098 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6101 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
6103 ctxt
->eflags
= kvm_get_rflags(vcpu
);
6104 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
6106 ctxt
->eip
= kvm_rip_read(vcpu
);
6107 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
6108 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
6109 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
6110 cs_db
? X86EMUL_MODE_PROT32
:
6111 X86EMUL_MODE_PROT16
;
6112 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
6113 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
6114 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
6116 init_decode_cache(ctxt
);
6117 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
6120 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
6122 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6125 init_emulate_ctxt(vcpu
);
6129 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
6130 ret
= emulate_int_real(ctxt
, irq
);
6132 if (ret
!= X86EMUL_CONTINUE
)
6133 return EMULATE_FAIL
;
6135 ctxt
->eip
= ctxt
->_eip
;
6136 kvm_rip_write(vcpu
, ctxt
->eip
);
6137 kvm_set_rflags(vcpu
, ctxt
->eflags
);
6139 return EMULATE_DONE
;
6141 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
6143 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
, int emulation_type
)
6145 int r
= EMULATE_DONE
;
6147 ++vcpu
->stat
.insn_emulation_fail
;
6148 trace_kvm_emulate_insn_failed(vcpu
);
6150 if (emulation_type
& EMULTYPE_NO_UD_ON_FAIL
)
6151 return EMULATE_FAIL
;
6153 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
6154 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
6155 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
6156 vcpu
->run
->internal
.ndata
= 0;
6157 r
= EMULATE_USER_EXIT
;
6160 kvm_queue_exception(vcpu
, UD_VECTOR
);
6165 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
6166 bool write_fault_to_shadow_pgtable
,
6172 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY
))
6175 if (WARN_ON_ONCE(is_guest_mode(vcpu
)))
6178 if (!vcpu
->arch
.mmu
->direct_map
) {
6180 * Write permission should be allowed since only
6181 * write access need to be emulated.
6183 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
6186 * If the mapping is invalid in guest, let cpu retry
6187 * it to generate fault.
6189 if (gpa
== UNMAPPED_GVA
)
6194 * Do not retry the unhandleable instruction if it faults on the
6195 * readonly host memory, otherwise it will goto a infinite loop:
6196 * retry instruction -> write #PF -> emulation fail -> retry
6197 * instruction -> ...
6199 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
6202 * If the instruction failed on the error pfn, it can not be fixed,
6203 * report the error to userspace.
6205 if (is_error_noslot_pfn(pfn
))
6208 kvm_release_pfn_clean(pfn
);
6210 /* The instructions are well-emulated on direct mmu. */
6211 if (vcpu
->arch
.mmu
->direct_map
) {
6212 unsigned int indirect_shadow_pages
;
6214 spin_lock(&vcpu
->kvm
->mmu_lock
);
6215 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
6216 spin_unlock(&vcpu
->kvm
->mmu_lock
);
6218 if (indirect_shadow_pages
)
6219 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
6225 * if emulation was due to access to shadowed page table
6226 * and it failed try to unshadow page and re-enter the
6227 * guest to let CPU execute the instruction.
6229 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
6232 * If the access faults on its page table, it can not
6233 * be fixed by unprotecting shadow page and it should
6234 * be reported to userspace.
6236 return !write_fault_to_shadow_pgtable
;
6239 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
6240 unsigned long cr2
, int emulation_type
)
6242 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6243 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
6245 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
6246 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
6249 * If the emulation is caused by #PF and it is non-page_table
6250 * writing instruction, it means the VM-EXIT is caused by shadow
6251 * page protected, we can zap the shadow page and retry this
6252 * instruction directly.
6254 * Note: if the guest uses a non-page-table modifying instruction
6255 * on the PDE that points to the instruction, then we will unmap
6256 * the instruction and go to an infinite loop. So, we cache the
6257 * last retried eip and the last fault address, if we meet the eip
6258 * and the address again, we can break out of the potential infinite
6261 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
6263 if (!(emulation_type
& EMULTYPE_ALLOW_RETRY
))
6266 if (WARN_ON_ONCE(is_guest_mode(vcpu
)))
6269 if (x86_page_table_writing_insn(ctxt
))
6272 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
6275 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
6276 vcpu
->arch
.last_retry_addr
= cr2
;
6278 if (!vcpu
->arch
.mmu
->direct_map
)
6279 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
6281 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
6286 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
6287 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
6289 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
6291 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
6292 /* This is a good place to trace that we are exiting SMM. */
6293 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
6295 /* Process a latched INIT or SMI, if any. */
6296 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6299 kvm_mmu_reset_context(vcpu
);
6302 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
6311 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
6312 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
6317 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
6319 struct kvm_run
*kvm_run
= vcpu
->run
;
6321 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
6322 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
6323 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
6324 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
6325 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
6326 *r
= EMULATE_USER_EXIT
;
6328 kvm_queue_exception_p(vcpu
, DB_VECTOR
, DR6_BS
);
6332 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
6334 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6335 int r
= EMULATE_DONE
;
6337 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
6340 * rflags is the old, "raw" value of the flags. The new value has
6341 * not been saved yet.
6343 * This is correct even for TF set by the guest, because "the
6344 * processor will not generate this exception after the instruction
6345 * that sets the TF flag".
6347 if (unlikely(rflags
& X86_EFLAGS_TF
))
6348 kvm_vcpu_do_singlestep(vcpu
, &r
);
6349 return r
== EMULATE_DONE
;
6351 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
6353 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
6355 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
6356 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
6357 struct kvm_run
*kvm_run
= vcpu
->run
;
6358 unsigned long eip
= kvm_get_linear_rip(vcpu
);
6359 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
6360 vcpu
->arch
.guest_debug_dr7
,
6364 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
6365 kvm_run
->debug
.arch
.pc
= eip
;
6366 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
6367 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
6368 *r
= EMULATE_USER_EXIT
;
6373 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
6374 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
6375 unsigned long eip
= kvm_get_linear_rip(vcpu
);
6376 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
6381 vcpu
->arch
.dr6
&= ~15;
6382 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
6383 kvm_queue_exception(vcpu
, DB_VECTOR
);
6392 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt
*ctxt
)
6394 switch (ctxt
->opcode_len
) {
6401 case 0xe6: /* OUT */
6405 case 0x6c: /* INS */
6407 case 0x6e: /* OUTS */
6414 case 0x33: /* RDPMC */
6423 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
6430 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
6431 bool writeback
= true;
6432 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
6434 vcpu
->arch
.l1tf_flush_l1d
= true;
6437 * Clear write_fault_to_shadow_pgtable here to ensure it is
6440 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
6441 kvm_clear_exception_queue(vcpu
);
6443 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
6444 init_emulate_ctxt(vcpu
);
6447 * We will reenter on the same instruction since
6448 * we do not set complete_userspace_io. This does not
6449 * handle watchpoints yet, those would be handled in
6452 if (!(emulation_type
& EMULTYPE_SKIP
) &&
6453 kvm_vcpu_check_breakpoint(vcpu
, &r
))
6456 ctxt
->interruptibility
= 0;
6457 ctxt
->have_exception
= false;
6458 ctxt
->exception
.vector
= -1;
6459 ctxt
->perm_ok
= false;
6461 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
6463 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
6465 trace_kvm_emulate_insn_start(vcpu
);
6466 ++vcpu
->stat
.insn_emulation
;
6467 if (r
!= EMULATION_OK
) {
6468 if (emulation_type
& EMULTYPE_TRAP_UD
)
6469 return EMULATE_FAIL
;
6470 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
6472 return EMULATE_DONE
;
6473 if (ctxt
->have_exception
&& inject_emulated_exception(vcpu
))
6474 return EMULATE_DONE
;
6475 if (emulation_type
& EMULTYPE_SKIP
)
6476 return EMULATE_FAIL
;
6477 return handle_emulation_failure(vcpu
, emulation_type
);
6481 if ((emulation_type
& EMULTYPE_VMWARE
) &&
6482 !is_vmware_backdoor_opcode(ctxt
))
6483 return EMULATE_FAIL
;
6485 if (emulation_type
& EMULTYPE_SKIP
) {
6486 kvm_rip_write(vcpu
, ctxt
->_eip
);
6487 if (ctxt
->eflags
& X86_EFLAGS_RF
)
6488 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
6489 return EMULATE_DONE
;
6492 if (retry_instruction(ctxt
, cr2
, emulation_type
))
6493 return EMULATE_DONE
;
6495 /* this is needed for vmware backdoor interface to work since it
6496 changes registers values during IO operation */
6497 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
6498 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
6499 emulator_invalidate_register_cache(ctxt
);
6503 /* Save the faulting GPA (cr2) in the address field */
6504 ctxt
->exception
.address
= cr2
;
6506 r
= x86_emulate_insn(ctxt
);
6508 if (r
== EMULATION_INTERCEPTED
)
6509 return EMULATE_DONE
;
6511 if (r
== EMULATION_FAILED
) {
6512 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
6514 return EMULATE_DONE
;
6516 return handle_emulation_failure(vcpu
, emulation_type
);
6519 if (ctxt
->have_exception
) {
6521 if (inject_emulated_exception(vcpu
))
6523 } else if (vcpu
->arch
.pio
.count
) {
6524 if (!vcpu
->arch
.pio
.in
) {
6525 /* FIXME: return into emulator if single-stepping. */
6526 vcpu
->arch
.pio
.count
= 0;
6529 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
6531 r
= EMULATE_USER_EXIT
;
6532 } else if (vcpu
->mmio_needed
) {
6533 if (!vcpu
->mmio_is_write
)
6535 r
= EMULATE_USER_EXIT
;
6536 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
6537 } else if (r
== EMULATION_RESTART
)
6543 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
6544 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
6545 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
6546 kvm_rip_write(vcpu
, ctxt
->eip
);
6547 if (r
== EMULATE_DONE
&& ctxt
->tf
)
6548 kvm_vcpu_do_singlestep(vcpu
, &r
);
6549 if (!ctxt
->have_exception
||
6550 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
6551 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
6554 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6555 * do nothing, and it will be requested again as soon as
6556 * the shadow expires. But we still need to check here,
6557 * because POPF has no interrupt shadow.
6559 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
6560 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6562 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
6567 int kvm_emulate_instruction(struct kvm_vcpu
*vcpu
, int emulation_type
)
6569 return x86_emulate_instruction(vcpu
, 0, emulation_type
, NULL
, 0);
6571 EXPORT_SYMBOL_GPL(kvm_emulate_instruction
);
6573 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu
*vcpu
,
6574 void *insn
, int insn_len
)
6576 return x86_emulate_instruction(vcpu
, 0, 0, insn
, insn_len
);
6578 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer
);
6580 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu
*vcpu
)
6582 vcpu
->arch
.pio
.count
= 0;
6586 static int complete_fast_pio_out(struct kvm_vcpu
*vcpu
)
6588 vcpu
->arch
.pio
.count
= 0;
6590 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
)))
6593 return kvm_skip_emulated_instruction(vcpu
);
6596 static int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
,
6597 unsigned short port
)
6599 unsigned long val
= kvm_rax_read(vcpu
);
6600 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
6601 size
, port
, &val
, 1);
6606 * Workaround userspace that relies on old KVM behavior of %rip being
6607 * incremented prior to exiting to userspace to handle "OUT 0x7e".
6610 kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_OUT_7E_INC_RIP
)) {
6611 vcpu
->arch
.complete_userspace_io
=
6612 complete_fast_pio_out_port_0x7e
;
6613 kvm_skip_emulated_instruction(vcpu
);
6615 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
6616 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_out
;
6621 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
6625 /* We should only ever be called with arch.pio.count equal to 1 */
6626 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
6628 if (unlikely(!kvm_is_linear_rip(vcpu
, vcpu
->arch
.pio
.linear_rip
))) {
6629 vcpu
->arch
.pio
.count
= 0;
6633 /* For size less than 4 we merge, else we zero extend */
6634 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_rax_read(vcpu
) : 0;
6637 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6638 * the copy and tracing
6640 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
6641 vcpu
->arch
.pio
.port
, &val
, 1);
6642 kvm_rax_write(vcpu
, val
);
6644 return kvm_skip_emulated_instruction(vcpu
);
6647 static int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
,
6648 unsigned short port
)
6653 /* For size less than 4 we merge, else we zero extend */
6654 val
= (size
< 4) ? kvm_rax_read(vcpu
) : 0;
6656 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
6659 kvm_rax_write(vcpu
, val
);
6663 vcpu
->arch
.pio
.linear_rip
= kvm_get_linear_rip(vcpu
);
6664 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
6669 int kvm_fast_pio(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
, int in
)
6674 ret
= kvm_fast_pio_in(vcpu
, size
, port
);
6676 ret
= kvm_fast_pio_out(vcpu
, size
, port
);
6677 return ret
&& kvm_skip_emulated_instruction(vcpu
);
6679 EXPORT_SYMBOL_GPL(kvm_fast_pio
);
6681 static int kvmclock_cpu_down_prep(unsigned int cpu
)
6683 __this_cpu_write(cpu_tsc_khz
, 0);
6687 static void tsc_khz_changed(void *data
)
6689 struct cpufreq_freqs
*freq
= data
;
6690 unsigned long khz
= 0;
6694 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6695 khz
= cpufreq_quick_get(raw_smp_processor_id());
6698 __this_cpu_write(cpu_tsc_khz
, khz
);
6701 #ifdef CONFIG_X86_64
6702 static void kvm_hyperv_tsc_notifier(void)
6705 struct kvm_vcpu
*vcpu
;
6708 spin_lock(&kvm_lock
);
6709 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6710 kvm_make_mclock_inprogress_request(kvm
);
6712 hyperv_stop_tsc_emulation();
6714 /* TSC frequency always matches when on Hyper-V */
6715 for_each_present_cpu(cpu
)
6716 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
6717 kvm_max_guest_tsc_khz
= tsc_khz
;
6719 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6720 struct kvm_arch
*ka
= &kvm
->arch
;
6722 spin_lock(&ka
->pvclock_gtod_sync_lock
);
6724 pvclock_update_vm_gtod_copy(kvm
);
6726 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
6727 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6729 kvm_for_each_vcpu(cpu
, vcpu
, kvm
)
6730 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
6732 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
6734 spin_unlock(&kvm_lock
);
6738 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs
*freq
, int cpu
)
6741 struct kvm_vcpu
*vcpu
;
6742 int i
, send_ipi
= 0;
6745 * We allow guests to temporarily run on slowing clocks,
6746 * provided we notify them after, or to run on accelerating
6747 * clocks, provided we notify them before. Thus time never
6750 * However, we have a problem. We can't atomically update
6751 * the frequency of a given CPU from this function; it is
6752 * merely a notifier, which can be called from any CPU.
6753 * Changing the TSC frequency at arbitrary points in time
6754 * requires a recomputation of local variables related to
6755 * the TSC for each VCPU. We must flag these local variables
6756 * to be updated and be sure the update takes place with the
6757 * new frequency before any guests proceed.
6759 * Unfortunately, the combination of hotplug CPU and frequency
6760 * change creates an intractable locking scenario; the order
6761 * of when these callouts happen is undefined with respect to
6762 * CPU hotplug, and they can race with each other. As such,
6763 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6764 * undefined; you can actually have a CPU frequency change take
6765 * place in between the computation of X and the setting of the
6766 * variable. To protect against this problem, all updates of
6767 * the per_cpu tsc_khz variable are done in an interrupt
6768 * protected IPI, and all callers wishing to update the value
6769 * must wait for a synchronous IPI to complete (which is trivial
6770 * if the caller is on the CPU already). This establishes the
6771 * necessary total order on variable updates.
6773 * Note that because a guest time update may take place
6774 * anytime after the setting of the VCPU's request bit, the
6775 * correct TSC value must be set before the request. However,
6776 * to ensure the update actually makes it to any guest which
6777 * starts running in hardware virtualization between the set
6778 * and the acquisition of the spinlock, we must also ping the
6779 * CPU after setting the request bit.
6783 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
6785 spin_lock(&kvm_lock
);
6786 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
6787 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
6788 if (vcpu
->cpu
!= cpu
)
6790 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6791 if (vcpu
->cpu
!= smp_processor_id())
6795 spin_unlock(&kvm_lock
);
6797 if (freq
->old
< freq
->new && send_ipi
) {
6799 * We upscale the frequency. Must make the guest
6800 * doesn't see old kvmclock values while running with
6801 * the new frequency, otherwise we risk the guest sees
6802 * time go backwards.
6804 * In case we update the frequency for another cpu
6805 * (which might be in guest context) send an interrupt
6806 * to kick the cpu out of guest context. Next time
6807 * guest context is entered kvmclock will be updated,
6808 * so the guest will not see stale values.
6810 smp_call_function_single(cpu
, tsc_khz_changed
, freq
, 1);
6814 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
6817 struct cpufreq_freqs
*freq
= data
;
6820 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
6822 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
6825 for_each_cpu(cpu
, freq
->policy
->cpus
)
6826 __kvmclock_cpufreq_notifier(freq
, cpu
);
6831 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
6832 .notifier_call
= kvmclock_cpufreq_notifier
6835 static int kvmclock_cpu_online(unsigned int cpu
)
6837 tsc_khz_changed(NULL
);
6841 static void kvm_timer_init(void)
6843 max_tsc_khz
= tsc_khz
;
6845 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
6846 #ifdef CONFIG_CPU_FREQ
6847 struct cpufreq_policy policy
;
6850 memset(&policy
, 0, sizeof(policy
));
6852 cpufreq_get_policy(&policy
, cpu
);
6853 if (policy
.cpuinfo
.max_freq
)
6854 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
6857 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
6858 CPUFREQ_TRANSITION_NOTIFIER
);
6860 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
6862 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
6863 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
6866 DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
6867 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu
);
6869 int kvm_is_in_guest(void)
6871 return __this_cpu_read(current_vcpu
) != NULL
;
6874 static int kvm_is_user_mode(void)
6878 if (__this_cpu_read(current_vcpu
))
6879 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
6881 return user_mode
!= 0;
6884 static unsigned long kvm_get_guest_ip(void)
6886 unsigned long ip
= 0;
6888 if (__this_cpu_read(current_vcpu
))
6889 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
6894 static void kvm_handle_intel_pt_intr(void)
6896 struct kvm_vcpu
*vcpu
= __this_cpu_read(current_vcpu
);
6898 kvm_make_request(KVM_REQ_PMI
, vcpu
);
6899 __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT
,
6900 (unsigned long *)&vcpu
->arch
.pmu
.global_status
);
6903 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
6904 .is_in_guest
= kvm_is_in_guest
,
6905 .is_user_mode
= kvm_is_user_mode
,
6906 .get_guest_ip
= kvm_get_guest_ip
,
6907 .handle_intel_pt_intr
= kvm_handle_intel_pt_intr
,
6910 static void kvm_set_mmio_spte_mask(void)
6913 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6916 * Set the reserved bits and the present bit of an paging-structure
6917 * entry to generate page fault with PFER.RSV = 1.
6921 * Mask the uppermost physical address bit, which would be reserved as
6922 * long as the supported physical address width is less than 52.
6926 /* Set the present bit. */
6930 * If reserved bit is not supported, clear the present bit to disable
6933 if (IS_ENABLED(CONFIG_X86_64
) && maxphyaddr
== 52)
6936 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6939 #ifdef CONFIG_X86_64
6940 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6944 struct kvm_vcpu
*vcpu
;
6947 spin_lock(&kvm_lock
);
6948 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6949 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6950 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6951 atomic_set(&kvm_guest_has_master_clock
, 0);
6952 spin_unlock(&kvm_lock
);
6955 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6958 * Notification about pvclock gtod data update.
6960 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6963 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6964 struct timekeeper
*tk
= priv
;
6966 update_pvclock_gtod(tk
);
6968 /* disable master clock if host does not trust, or does not
6969 * use, TSC based clocksource.
6971 if (!gtod_is_based_on_tsc(gtod
->clock
.vclock_mode
) &&
6972 atomic_read(&kvm_guest_has_master_clock
) != 0)
6973 queue_work(system_long_wq
, &pvclock_gtod_work
);
6978 static struct notifier_block pvclock_gtod_notifier
= {
6979 .notifier_call
= pvclock_gtod_notify
,
6983 int kvm_arch_init(void *opaque
)
6986 struct kvm_x86_ops
*ops
= opaque
;
6989 printk(KERN_ERR
"kvm: already loaded the other module\n");
6994 if (!ops
->cpu_has_kvm_support()) {
6995 printk(KERN_ERR
"kvm: no hardware support\n");
6999 if (ops
->disabled_by_bios()) {
7000 printk(KERN_ERR
"kvm: disabled by bios\n");
7006 * KVM explicitly assumes that the guest has an FPU and
7007 * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7008 * vCPU's FPU state as a fxregs_state struct.
7010 if (!boot_cpu_has(X86_FEATURE_FPU
) || !boot_cpu_has(X86_FEATURE_FXSR
)) {
7011 printk(KERN_ERR
"kvm: inadequate fpu\n");
7017 x86_fpu_cache
= kmem_cache_create("x86_fpu", sizeof(struct fpu
),
7018 __alignof__(struct fpu
), SLAB_ACCOUNT
,
7020 if (!x86_fpu_cache
) {
7021 printk(KERN_ERR
"kvm: failed to allocate cache for x86 fpu\n");
7025 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
7027 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
7028 goto out_free_x86_fpu_cache
;
7031 r
= kvm_mmu_module_init();
7033 goto out_free_percpu
;
7035 kvm_set_mmio_spte_mask();
7039 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
7040 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
7041 PT_PRESENT_MASK
, 0, sme_me_mask
);
7044 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
7046 if (boot_cpu_has(X86_FEATURE_XSAVE
))
7047 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
7050 #ifdef CONFIG_X86_64
7051 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
7053 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7054 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier
);
7060 free_percpu(shared_msrs
);
7061 out_free_x86_fpu_cache
:
7062 kmem_cache_destroy(x86_fpu_cache
);
7067 void kvm_arch_exit(void)
7069 #ifdef CONFIG_X86_64
7070 if (hypervisor_is_type(X86_HYPER_MS_HYPERV
))
7071 clear_hv_tscchange_cb();
7074 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
7076 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
7077 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
7078 CPUFREQ_TRANSITION_NOTIFIER
);
7079 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
7080 #ifdef CONFIG_X86_64
7081 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
7084 kvm_mmu_module_exit();
7085 free_percpu(shared_msrs
);
7086 kmem_cache_destroy(x86_fpu_cache
);
7089 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
7091 ++vcpu
->stat
.halt_exits
;
7092 if (lapic_in_kernel(vcpu
)) {
7093 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
7096 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
7100 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
7102 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
7104 int ret
= kvm_skip_emulated_instruction(vcpu
);
7106 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7107 * KVM_EXIT_DEBUG here.
7109 return kvm_vcpu_halt(vcpu
) && ret
;
7111 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
7113 #ifdef CONFIG_X86_64
7114 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
7115 unsigned long clock_type
)
7117 struct kvm_clock_pairing clock_pairing
;
7118 struct timespec64 ts
;
7122 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
7123 return -KVM_EOPNOTSUPP
;
7125 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
7126 return -KVM_EOPNOTSUPP
;
7128 clock_pairing
.sec
= ts
.tv_sec
;
7129 clock_pairing
.nsec
= ts
.tv_nsec
;
7130 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
7131 clock_pairing
.flags
= 0;
7132 memset(&clock_pairing
.pad
, 0, sizeof(clock_pairing
.pad
));
7135 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
7136 sizeof(struct kvm_clock_pairing
)))
7144 * kvm_pv_kick_cpu_op: Kick a vcpu.
7146 * @apicid - apicid of vcpu to be kicked.
7148 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
7150 struct kvm_lapic_irq lapic_irq
;
7152 lapic_irq
.shorthand
= 0;
7153 lapic_irq
.dest_mode
= 0;
7154 lapic_irq
.level
= 0;
7155 lapic_irq
.dest_id
= apicid
;
7156 lapic_irq
.msi_redir_hint
= false;
7158 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
7159 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
7162 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
7164 if (!lapic_in_kernel(vcpu
)) {
7165 WARN_ON_ONCE(vcpu
->arch
.apicv_active
);
7168 if (!vcpu
->arch
.apicv_active
)
7171 vcpu
->arch
.apicv_active
= false;
7172 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
7175 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
7177 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
7180 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
7181 return kvm_hv_hypercall(vcpu
);
7183 nr
= kvm_rax_read(vcpu
);
7184 a0
= kvm_rbx_read(vcpu
);
7185 a1
= kvm_rcx_read(vcpu
);
7186 a2
= kvm_rdx_read(vcpu
);
7187 a3
= kvm_rsi_read(vcpu
);
7189 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
7191 op_64_bit
= is_64_bit_mode(vcpu
);
7200 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
7206 case KVM_HC_VAPIC_POLL_IRQ
:
7209 case KVM_HC_KICK_CPU
:
7210 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
7213 #ifdef CONFIG_X86_64
7214 case KVM_HC_CLOCK_PAIRING
:
7215 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
7218 case KVM_HC_SEND_IPI
:
7219 ret
= kvm_pv_send_ipi(vcpu
->kvm
, a0
, a1
, a2
, a3
, op_64_bit
);
7228 kvm_rax_write(vcpu
, ret
);
7230 ++vcpu
->stat
.hypercalls
;
7231 return kvm_skip_emulated_instruction(vcpu
);
7233 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
7235 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
7237 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
7238 char instruction
[3];
7239 unsigned long rip
= kvm_rip_read(vcpu
);
7241 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
7243 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
7247 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
7249 return vcpu
->run
->request_interrupt_window
&&
7250 likely(!pic_in_kernel(vcpu
->kvm
));
7253 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
7255 struct kvm_run
*kvm_run
= vcpu
->run
;
7257 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
7258 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
7259 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
7260 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
7261 kvm_run
->ready_for_interrupt_injection
=
7262 pic_in_kernel(vcpu
->kvm
) ||
7263 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
7266 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
7270 if (!kvm_x86_ops
->update_cr8_intercept
)
7273 if (!lapic_in_kernel(vcpu
))
7276 if (vcpu
->arch
.apicv_active
)
7279 if (!vcpu
->arch
.apic
->vapic_addr
)
7280 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
7287 tpr
= kvm_lapic_get_cr8(vcpu
);
7289 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
7292 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
7296 /* try to reinject previous events if any */
7298 if (vcpu
->arch
.exception
.injected
)
7299 kvm_x86_ops
->queue_exception(vcpu
);
7301 * Do not inject an NMI or interrupt if there is a pending
7302 * exception. Exceptions and interrupts are recognized at
7303 * instruction boundaries, i.e. the start of an instruction.
7304 * Trap-like exceptions, e.g. #DB, have higher priority than
7305 * NMIs and interrupts, i.e. traps are recognized before an
7306 * NMI/interrupt that's pending on the same instruction.
7307 * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7308 * priority, but are only generated (pended) during instruction
7309 * execution, i.e. a pending fault-like exception means the
7310 * fault occurred on the *previous* instruction and must be
7311 * serviced prior to recognizing any new events in order to
7312 * fully complete the previous instruction.
7314 else if (!vcpu
->arch
.exception
.pending
) {
7315 if (vcpu
->arch
.nmi_injected
)
7316 kvm_x86_ops
->set_nmi(vcpu
);
7317 else if (vcpu
->arch
.interrupt
.injected
)
7318 kvm_x86_ops
->set_irq(vcpu
);
7322 * Call check_nested_events() even if we reinjected a previous event
7323 * in order for caller to determine if it should require immediate-exit
7324 * from L2 to L1 due to pending L1 events which require exit
7327 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
7328 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
7333 /* try to inject new event if pending */
7334 if (vcpu
->arch
.exception
.pending
) {
7335 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
7336 vcpu
->arch
.exception
.has_error_code
,
7337 vcpu
->arch
.exception
.error_code
);
7339 WARN_ON_ONCE(vcpu
->arch
.exception
.injected
);
7340 vcpu
->arch
.exception
.pending
= false;
7341 vcpu
->arch
.exception
.injected
= true;
7343 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
7344 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
7347 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
) {
7349 * This code assumes that nSVM doesn't use
7350 * check_nested_events(). If it does, the
7351 * DR6/DR7 changes should happen before L1
7352 * gets a #VMEXIT for an intercepted #DB in
7353 * L2. (Under VMX, on the other hand, the
7354 * DR6/DR7 changes should not happen in the
7355 * event of a VM-exit to L1 for an intercepted
7358 kvm_deliver_exception_payload(vcpu
);
7359 if (vcpu
->arch
.dr7
& DR7_GD
) {
7360 vcpu
->arch
.dr7
&= ~DR7_GD
;
7361 kvm_update_dr7(vcpu
);
7365 kvm_x86_ops
->queue_exception(vcpu
);
7368 /* Don't consider new event if we re-injected an event */
7369 if (kvm_event_needs_reinjection(vcpu
))
7372 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
) &&
7373 kvm_x86_ops
->smi_allowed(vcpu
)) {
7374 vcpu
->arch
.smi_pending
= false;
7375 ++vcpu
->arch
.smi_count
;
7377 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
7378 --vcpu
->arch
.nmi_pending
;
7379 vcpu
->arch
.nmi_injected
= true;
7380 kvm_x86_ops
->set_nmi(vcpu
);
7381 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
7383 * Because interrupts can be injected asynchronously, we are
7384 * calling check_nested_events again here to avoid a race condition.
7385 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7386 * proposal and current concerns. Perhaps we should be setting
7387 * KVM_REQ_EVENT only on certain events and not unconditionally?
7389 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
7390 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
7394 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
7395 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
7397 kvm_x86_ops
->set_irq(vcpu
);
7404 static void process_nmi(struct kvm_vcpu
*vcpu
)
7409 * x86 is limited to one NMI running, and one NMI pending after it.
7410 * If an NMI is already in progress, limit further NMIs to just one.
7411 * Otherwise, allow two (and we'll inject the first one immediately).
7413 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
7416 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
7417 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
7418 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7421 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
7424 flags
|= seg
->g
<< 23;
7425 flags
|= seg
->db
<< 22;
7426 flags
|= seg
->l
<< 21;
7427 flags
|= seg
->avl
<< 20;
7428 flags
|= seg
->present
<< 15;
7429 flags
|= seg
->dpl
<< 13;
7430 flags
|= seg
->s
<< 12;
7431 flags
|= seg
->type
<< 8;
7435 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
7437 struct kvm_segment seg
;
7440 kvm_get_segment(vcpu
, &seg
, n
);
7441 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
7444 offset
= 0x7f84 + n
* 12;
7446 offset
= 0x7f2c + (n
- 3) * 12;
7448 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
7449 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
7450 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
7453 #ifdef CONFIG_X86_64
7454 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
7456 struct kvm_segment seg
;
7460 kvm_get_segment(vcpu
, &seg
, n
);
7461 offset
= 0x7e00 + n
* 16;
7463 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
7464 put_smstate(u16
, buf
, offset
, seg
.selector
);
7465 put_smstate(u16
, buf
, offset
+ 2, flags
);
7466 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
7467 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
7471 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
7474 struct kvm_segment seg
;
7478 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
7479 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
7480 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
7481 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
7483 for (i
= 0; i
< 8; i
++)
7484 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
7486 kvm_get_dr(vcpu
, 6, &val
);
7487 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
7488 kvm_get_dr(vcpu
, 7, &val
);
7489 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
7491 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
7492 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
7493 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
7494 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
7495 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
7497 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
7498 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
7499 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
7500 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
7501 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
7503 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7504 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
7505 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
7507 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7508 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
7509 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
7511 for (i
= 0; i
< 6; i
++)
7512 enter_smm_save_seg_32(vcpu
, buf
, i
);
7514 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
7517 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
7518 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
7521 #ifdef CONFIG_X86_64
7522 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
7525 struct kvm_segment seg
;
7529 for (i
= 0; i
< 16; i
++)
7530 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
7532 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
7533 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
7535 kvm_get_dr(vcpu
, 6, &val
);
7536 put_smstate(u64
, buf
, 0x7f68, val
);
7537 kvm_get_dr(vcpu
, 7, &val
);
7538 put_smstate(u64
, buf
, 0x7f60, val
);
7540 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
7541 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
7542 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
7544 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
7547 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
7549 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
7551 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
7552 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
7553 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
7554 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
7555 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
7557 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7558 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
7559 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
7561 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
7562 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
7563 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
7564 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
7565 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
7567 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7568 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
7569 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
7571 for (i
= 0; i
< 6; i
++)
7572 enter_smm_save_seg_64(vcpu
, buf
, i
);
7576 static void enter_smm(struct kvm_vcpu
*vcpu
)
7578 struct kvm_segment cs
, ds
;
7583 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
7584 memset(buf
, 0, 512);
7585 #ifdef CONFIG_X86_64
7586 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
7587 enter_smm_save_state_64(vcpu
, buf
);
7590 enter_smm_save_state_32(vcpu
, buf
);
7593 * Give pre_enter_smm() a chance to make ISA-specific changes to the
7594 * vCPU state (e.g. leave guest mode) after we've saved the state into
7595 * the SMM state-save area.
7597 kvm_x86_ops
->pre_enter_smm(vcpu
, buf
);
7599 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
7600 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
7602 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
7603 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
7605 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
7607 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
7608 kvm_rip_write(vcpu
, 0x8000);
7610 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
7611 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
7612 vcpu
->arch
.cr0
= cr0
;
7614 kvm_x86_ops
->set_cr4(vcpu
, 0);
7616 /* Undocumented: IDT limit is set to zero on entry to SMM. */
7617 dt
.address
= dt
.size
= 0;
7618 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7620 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
7622 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
7623 cs
.base
= vcpu
->arch
.smbase
;
7628 cs
.limit
= ds
.limit
= 0xffffffff;
7629 cs
.type
= ds
.type
= 0x3;
7630 cs
.dpl
= ds
.dpl
= 0;
7635 cs
.avl
= ds
.avl
= 0;
7636 cs
.present
= ds
.present
= 1;
7637 cs
.unusable
= ds
.unusable
= 0;
7638 cs
.padding
= ds
.padding
= 0;
7640 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7641 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
7642 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
7643 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
7644 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
7645 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
7647 #ifdef CONFIG_X86_64
7648 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
7649 kvm_x86_ops
->set_efer(vcpu
, 0);
7652 kvm_update_cpuid(vcpu
);
7653 kvm_mmu_reset_context(vcpu
);
7656 static void process_smi(struct kvm_vcpu
*vcpu
)
7658 vcpu
->arch
.smi_pending
= true;
7659 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7662 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
7664 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
7667 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
7669 if (!kvm_apic_present(vcpu
))
7672 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
7674 if (irqchip_split(vcpu
->kvm
))
7675 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
7677 if (vcpu
->arch
.apicv_active
)
7678 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7679 if (ioapic_in_kernel(vcpu
->kvm
))
7680 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
7683 if (is_guest_mode(vcpu
))
7684 vcpu
->arch
.load_eoi_exitmap_pending
= true;
7686 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
);
7689 static void vcpu_load_eoi_exitmap(struct kvm_vcpu
*vcpu
)
7691 u64 eoi_exit_bitmap
[4];
7693 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
7696 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
7697 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
7698 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
7701 int kvm_arch_mmu_notifier_invalidate_range(struct kvm
*kvm
,
7702 unsigned long start
, unsigned long end
,
7705 unsigned long apic_address
;
7708 * The physical address of apic access page is stored in the VMCS.
7709 * Update it when it becomes invalid.
7711 apic_address
= gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7712 if (start
<= apic_address
&& apic_address
< end
)
7713 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
7718 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
7720 struct page
*page
= NULL
;
7722 if (!lapic_in_kernel(vcpu
))
7725 if (!kvm_x86_ops
->set_apic_access_page_addr
)
7728 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
7729 if (is_error_page(page
))
7731 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
7734 * Do not pin apic access page in memory, the MMU notifier
7735 * will call us again if it is migrated or swapped out.
7739 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
7741 void __kvm_request_immediate_exit(struct kvm_vcpu
*vcpu
)
7743 smp_send_reschedule(vcpu
->cpu
);
7745 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit
);
7748 * Returns 1 to let vcpu_run() continue the guest execution loop without
7749 * exiting to the userspace. Otherwise, the value will be returned to the
7752 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
7756 dm_request_for_irq_injection(vcpu
) &&
7757 kvm_cpu_accept_dm_intr(vcpu
);
7759 bool req_immediate_exit
= false;
7761 if (kvm_request_pending(vcpu
)) {
7762 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES
, vcpu
))
7763 kvm_x86_ops
->get_vmcs12_pages(vcpu
);
7764 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
7765 kvm_mmu_unload(vcpu
);
7766 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
7767 __kvm_migrate_timers(vcpu
);
7768 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
7769 kvm_gen_update_masterclock(vcpu
->kvm
);
7770 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
7771 kvm_gen_kvmclock_update(vcpu
);
7772 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
7773 r
= kvm_guest_time_update(vcpu
);
7777 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
7778 kvm_mmu_sync_roots(vcpu
);
7779 if (kvm_check_request(KVM_REQ_LOAD_CR3
, vcpu
))
7780 kvm_mmu_load_cr3(vcpu
);
7781 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
7782 kvm_vcpu_flush_tlb(vcpu
, true);
7783 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
7784 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
7788 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
7789 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
7790 vcpu
->mmio_needed
= 0;
7794 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
7795 /* Page is swapped out. Do synthetic halt */
7796 vcpu
->arch
.apf
.halted
= true;
7800 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
7801 record_steal_time(vcpu
);
7802 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
7804 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
7806 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
7807 kvm_pmu_handle_event(vcpu
);
7808 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
7809 kvm_pmu_deliver_pmi(vcpu
);
7810 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
7811 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
7812 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
7813 vcpu
->arch
.ioapic_handled_vectors
)) {
7814 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
7815 vcpu
->run
->eoi
.vector
=
7816 vcpu
->arch
.pending_ioapic_eoi
;
7821 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
7822 vcpu_scan_ioapic(vcpu
);
7823 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP
, vcpu
))
7824 vcpu_load_eoi_exitmap(vcpu
);
7825 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
7826 kvm_vcpu_reload_apic_access_page(vcpu
);
7827 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
7828 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7829 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
7833 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
7834 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
7835 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
7839 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
7840 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
7841 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
7847 * KVM_REQ_HV_STIMER has to be processed after
7848 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7849 * depend on the guest clock being up-to-date
7851 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
7852 kvm_hv_process_stimers(vcpu
);
7855 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
7856 ++vcpu
->stat
.req_event
;
7857 kvm_apic_accept_events(vcpu
);
7858 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
7863 if (inject_pending_event(vcpu
, req_int_win
) != 0)
7864 req_immediate_exit
= true;
7866 /* Enable SMI/NMI/IRQ window open exits if needed.
7868 * SMIs have three cases:
7869 * 1) They can be nested, and then there is nothing to
7870 * do here because RSM will cause a vmexit anyway.
7871 * 2) There is an ISA-specific reason why SMI cannot be
7872 * injected, and the moment when this changes can be
7874 * 3) Or the SMI can be pending because
7875 * inject_pending_event has completed the injection
7876 * of an IRQ or NMI from the previous vmexit, and
7877 * then we request an immediate exit to inject the
7880 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
7881 if (!kvm_x86_ops
->enable_smi_window(vcpu
))
7882 req_immediate_exit
= true;
7883 if (vcpu
->arch
.nmi_pending
)
7884 kvm_x86_ops
->enable_nmi_window(vcpu
);
7885 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
7886 kvm_x86_ops
->enable_irq_window(vcpu
);
7887 WARN_ON(vcpu
->arch
.exception
.pending
);
7890 if (kvm_lapic_enabled(vcpu
)) {
7891 update_cr8_intercept(vcpu
);
7892 kvm_lapic_sync_to_vapic(vcpu
);
7896 r
= kvm_mmu_reload(vcpu
);
7898 goto cancel_injection
;
7903 kvm_x86_ops
->prepare_guest_switch(vcpu
);
7906 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
7907 * IPI are then delayed after guest entry, which ensures that they
7908 * result in virtual interrupt delivery.
7910 local_irq_disable();
7911 vcpu
->mode
= IN_GUEST_MODE
;
7913 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7916 * 1) We should set ->mode before checking ->requests. Please see
7917 * the comment in kvm_vcpu_exiting_guest_mode().
7919 * 2) For APICv, we should set ->mode before checking PID.ON. This
7920 * pairs with the memory barrier implicit in pi_test_and_set_on
7921 * (see vmx_deliver_posted_interrupt).
7923 * 3) This also orders the write to mode from any reads to the page
7924 * tables done while the VCPU is running. Please see the comment
7925 * in kvm_flush_remote_tlbs.
7927 smp_mb__after_srcu_read_unlock();
7930 * This handles the case where a posted interrupt was
7931 * notified with kvm_vcpu_kick.
7933 if (kvm_lapic_enabled(vcpu
) && vcpu
->arch
.apicv_active
)
7934 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
7936 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
7937 || need_resched() || signal_pending(current
)) {
7938 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
7942 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7944 goto cancel_injection
;
7947 if (req_immediate_exit
) {
7948 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7949 kvm_x86_ops
->request_immediate_exit(vcpu
);
7952 trace_kvm_entry(vcpu
->vcpu_id
);
7953 if (lapic_in_kernel(vcpu
) &&
7954 vcpu
->arch
.apic
->lapic_timer
.timer_advance_ns
)
7955 wait_lapic_expire(vcpu
);
7956 guest_enter_irqoff();
7958 fpregs_assert_state_consistent();
7959 if (test_thread_flag(TIF_NEED_FPU_LOAD
))
7960 switch_fpu_return();
7962 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
7964 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
7965 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
7966 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
7967 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
7968 set_debugreg(vcpu
->arch
.dr6
, 6);
7969 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7972 kvm_x86_ops
->run(vcpu
);
7975 * Do this here before restoring debug registers on the host. And
7976 * since we do this before handling the vmexit, a DR access vmexit
7977 * can (a) read the correct value of the debug registers, (b) set
7978 * KVM_DEBUGREG_WONT_EXIT again.
7980 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
7981 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
7982 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
7983 kvm_update_dr0123(vcpu
);
7984 kvm_update_dr6(vcpu
);
7985 kvm_update_dr7(vcpu
);
7986 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
7990 * If the guest has used debug registers, at least dr7
7991 * will be disabled while returning to the host.
7992 * If we don't have active breakpoints in the host, we don't
7993 * care about the messed up debug address registers. But if
7994 * we have some of them active, restore the old state.
7996 if (hw_breakpoint_active())
7997 hw_breakpoint_restore();
7999 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
8001 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
8004 kvm_before_interrupt(vcpu
);
8005 kvm_x86_ops
->handle_external_intr(vcpu
);
8006 kvm_after_interrupt(vcpu
);
8010 guest_exit_irqoff();
8015 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8018 * Profile KVM exit RIPs:
8020 if (unlikely(prof_on
== KVM_PROFILING
)) {
8021 unsigned long rip
= kvm_rip_read(vcpu
);
8022 profile_hit(KVM_PROFILING
, (void *)rip
);
8025 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
8026 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
8028 if (vcpu
->arch
.apic_attention
)
8029 kvm_lapic_sync_from_vapic(vcpu
);
8031 vcpu
->arch
.gpa_available
= false;
8032 r
= kvm_x86_ops
->handle_exit(vcpu
);
8036 kvm_x86_ops
->cancel_injection(vcpu
);
8037 if (unlikely(vcpu
->arch
.apic_attention
))
8038 kvm_lapic_sync_from_vapic(vcpu
);
8043 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
8045 if (!kvm_arch_vcpu_runnable(vcpu
) &&
8046 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
8047 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
8048 kvm_vcpu_block(vcpu
);
8049 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
8051 if (kvm_x86_ops
->post_block
)
8052 kvm_x86_ops
->post_block(vcpu
);
8054 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
8058 kvm_apic_accept_events(vcpu
);
8059 switch(vcpu
->arch
.mp_state
) {
8060 case KVM_MP_STATE_HALTED
:
8061 vcpu
->arch
.pv
.pv_unhalted
= false;
8062 vcpu
->arch
.mp_state
=
8063 KVM_MP_STATE_RUNNABLE
;
8065 case KVM_MP_STATE_RUNNABLE
:
8066 vcpu
->arch
.apf
.halted
= false;
8068 case KVM_MP_STATE_INIT_RECEIVED
:
8077 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
8079 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
8080 kvm_x86_ops
->check_nested_events(vcpu
, false);
8082 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
8083 !vcpu
->arch
.apf
.halted
);
8086 static int vcpu_run(struct kvm_vcpu
*vcpu
)
8089 struct kvm
*kvm
= vcpu
->kvm
;
8091 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
8092 vcpu
->arch
.l1tf_flush_l1d
= true;
8095 if (kvm_vcpu_running(vcpu
)) {
8096 r
= vcpu_enter_guest(vcpu
);
8098 r
= vcpu_block(kvm
, vcpu
);
8104 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
8105 if (kvm_cpu_has_pending_timer(vcpu
))
8106 kvm_inject_pending_timer_irqs(vcpu
);
8108 if (dm_request_for_irq_injection(vcpu
) &&
8109 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
8111 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
8112 ++vcpu
->stat
.request_irq_exits
;
8116 kvm_check_async_pf_completion(vcpu
);
8118 if (signal_pending(current
)) {
8120 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
8121 ++vcpu
->stat
.signal_exits
;
8124 if (need_resched()) {
8125 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
8127 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
8131 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
8136 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
8139 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8140 r
= kvm_emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
8141 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
8142 if (r
!= EMULATE_DONE
)
8147 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
8149 BUG_ON(!vcpu
->arch
.pio
.count
);
8151 return complete_emulated_io(vcpu
);
8155 * Implements the following, as a state machine:
8159 * for each mmio piece in the fragment
8167 * for each mmio piece in the fragment
8172 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
8174 struct kvm_run
*run
= vcpu
->run
;
8175 struct kvm_mmio_fragment
*frag
;
8178 BUG_ON(!vcpu
->mmio_needed
);
8180 /* Complete previous fragment */
8181 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
8182 len
= min(8u, frag
->len
);
8183 if (!vcpu
->mmio_is_write
)
8184 memcpy(frag
->data
, run
->mmio
.data
, len
);
8186 if (frag
->len
<= 8) {
8187 /* Switch to the next fragment. */
8189 vcpu
->mmio_cur_fragment
++;
8191 /* Go forward to the next mmio piece. */
8197 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
8198 vcpu
->mmio_needed
= 0;
8200 /* FIXME: return into emulator if single-stepping. */
8201 if (vcpu
->mmio_is_write
)
8203 vcpu
->mmio_read_completed
= 1;
8204 return complete_emulated_io(vcpu
);
8207 run
->exit_reason
= KVM_EXIT_MMIO
;
8208 run
->mmio
.phys_addr
= frag
->gpa
;
8209 if (vcpu
->mmio_is_write
)
8210 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
8211 run
->mmio
.len
= min(8u, frag
->len
);
8212 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
8213 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
8217 /* Swap (qemu) user FPU context for the guest FPU context. */
8218 static void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
8222 copy_fpregs_to_fpstate(¤t
->thread
.fpu
);
8223 /* PKRU is separately restored in kvm_x86_ops->run. */
8224 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
->state
,
8225 ~XFEATURE_MASK_PKRU
);
8227 fpregs_mark_activate();
8233 /* When vcpu_run ends, restore user space FPU context. */
8234 static void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
8238 copy_fpregs_to_fpstate(vcpu
->arch
.guest_fpu
);
8239 copy_kernel_to_fpregs(¤t
->thread
.fpu
.state
);
8241 fpregs_mark_activate();
8244 ++vcpu
->stat
.fpu_reload
;
8248 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
8253 kvm_sigset_activate(vcpu
);
8254 kvm_load_guest_fpu(vcpu
);
8256 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
8257 if (kvm_run
->immediate_exit
) {
8261 kvm_vcpu_block(vcpu
);
8262 kvm_apic_accept_events(vcpu
);
8263 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
8265 if (signal_pending(current
)) {
8267 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
8268 ++vcpu
->stat
.signal_exits
;
8273 if (vcpu
->run
->kvm_valid_regs
& ~KVM_SYNC_X86_VALID_FIELDS
) {
8278 if (vcpu
->run
->kvm_dirty_regs
) {
8279 r
= sync_regs(vcpu
);
8284 /* re-sync apic's tpr */
8285 if (!lapic_in_kernel(vcpu
)) {
8286 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
8292 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
8293 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
8294 vcpu
->arch
.complete_userspace_io
= NULL
;
8299 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
8301 if (kvm_run
->immediate_exit
)
8307 kvm_put_guest_fpu(vcpu
);
8308 if (vcpu
->run
->kvm_valid_regs
)
8310 post_kvm_run_save(vcpu
);
8311 kvm_sigset_deactivate(vcpu
);
8317 static void __get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8319 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
8321 * We are here if userspace calls get_regs() in the middle of
8322 * instruction emulation. Registers state needs to be copied
8323 * back from emulation context to vcpu. Userspace shouldn't do
8324 * that usually, but some bad designed PV devices (vmware
8325 * backdoor interface) need this to work
8327 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
8328 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8330 regs
->rax
= kvm_rax_read(vcpu
);
8331 regs
->rbx
= kvm_rbx_read(vcpu
);
8332 regs
->rcx
= kvm_rcx_read(vcpu
);
8333 regs
->rdx
= kvm_rdx_read(vcpu
);
8334 regs
->rsi
= kvm_rsi_read(vcpu
);
8335 regs
->rdi
= kvm_rdi_read(vcpu
);
8336 regs
->rsp
= kvm_rsp_read(vcpu
);
8337 regs
->rbp
= kvm_rbp_read(vcpu
);
8338 #ifdef CONFIG_X86_64
8339 regs
->r8
= kvm_r8_read(vcpu
);
8340 regs
->r9
= kvm_r9_read(vcpu
);
8341 regs
->r10
= kvm_r10_read(vcpu
);
8342 regs
->r11
= kvm_r11_read(vcpu
);
8343 regs
->r12
= kvm_r12_read(vcpu
);
8344 regs
->r13
= kvm_r13_read(vcpu
);
8345 regs
->r14
= kvm_r14_read(vcpu
);
8346 regs
->r15
= kvm_r15_read(vcpu
);
8349 regs
->rip
= kvm_rip_read(vcpu
);
8350 regs
->rflags
= kvm_get_rflags(vcpu
);
8353 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8356 __get_regs(vcpu
, regs
);
8361 static void __set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8363 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
8364 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
8366 kvm_rax_write(vcpu
, regs
->rax
);
8367 kvm_rbx_write(vcpu
, regs
->rbx
);
8368 kvm_rcx_write(vcpu
, regs
->rcx
);
8369 kvm_rdx_write(vcpu
, regs
->rdx
);
8370 kvm_rsi_write(vcpu
, regs
->rsi
);
8371 kvm_rdi_write(vcpu
, regs
->rdi
);
8372 kvm_rsp_write(vcpu
, regs
->rsp
);
8373 kvm_rbp_write(vcpu
, regs
->rbp
);
8374 #ifdef CONFIG_X86_64
8375 kvm_r8_write(vcpu
, regs
->r8
);
8376 kvm_r9_write(vcpu
, regs
->r9
);
8377 kvm_r10_write(vcpu
, regs
->r10
);
8378 kvm_r11_write(vcpu
, regs
->r11
);
8379 kvm_r12_write(vcpu
, regs
->r12
);
8380 kvm_r13_write(vcpu
, regs
->r13
);
8381 kvm_r14_write(vcpu
, regs
->r14
);
8382 kvm_r15_write(vcpu
, regs
->r15
);
8385 kvm_rip_write(vcpu
, regs
->rip
);
8386 kvm_set_rflags(vcpu
, regs
->rflags
| X86_EFLAGS_FIXED
);
8388 vcpu
->arch
.exception
.pending
= false;
8390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8393 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
8396 __set_regs(vcpu
, regs
);
8401 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
8403 struct kvm_segment cs
;
8405 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8409 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
8411 static void __get_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
8415 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
8416 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
8417 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
8418 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
8419 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
8420 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
8422 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
8423 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
8425 kvm_x86_ops
->get_idt(vcpu
, &dt
);
8426 sregs
->idt
.limit
= dt
.size
;
8427 sregs
->idt
.base
= dt
.address
;
8428 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
8429 sregs
->gdt
.limit
= dt
.size
;
8430 sregs
->gdt
.base
= dt
.address
;
8432 sregs
->cr0
= kvm_read_cr0(vcpu
);
8433 sregs
->cr2
= vcpu
->arch
.cr2
;
8434 sregs
->cr3
= kvm_read_cr3(vcpu
);
8435 sregs
->cr4
= kvm_read_cr4(vcpu
);
8436 sregs
->cr8
= kvm_get_cr8(vcpu
);
8437 sregs
->efer
= vcpu
->arch
.efer
;
8438 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
8440 memset(sregs
->interrupt_bitmap
, 0, sizeof(sregs
->interrupt_bitmap
));
8442 if (vcpu
->arch
.interrupt
.injected
&& !vcpu
->arch
.interrupt
.soft
)
8443 set_bit(vcpu
->arch
.interrupt
.nr
,
8444 (unsigned long *)sregs
->interrupt_bitmap
);
8447 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
8448 struct kvm_sregs
*sregs
)
8451 __get_sregs(vcpu
, sregs
);
8456 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
8457 struct kvm_mp_state
*mp_state
)
8461 kvm_apic_accept_events(vcpu
);
8462 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
8463 vcpu
->arch
.pv
.pv_unhalted
)
8464 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
8466 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
8472 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
8473 struct kvm_mp_state
*mp_state
)
8479 if (!lapic_in_kernel(vcpu
) &&
8480 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
8483 /* INITs are latched while in SMM */
8484 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
8485 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
8486 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
8489 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
8490 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
8491 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
8493 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
8494 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8502 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
8503 int reason
, bool has_error_code
, u32 error_code
)
8505 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
8508 init_emulate_ctxt(vcpu
);
8510 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
8511 has_error_code
, error_code
);
8514 return EMULATE_FAIL
;
8516 kvm_rip_write(vcpu
, ctxt
->eip
);
8517 kvm_set_rflags(vcpu
, ctxt
->eflags
);
8518 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8519 return EMULATE_DONE
;
8521 EXPORT_SYMBOL_GPL(kvm_task_switch
);
8523 static int kvm_valid_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
8525 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
8526 (sregs
->cr4
& X86_CR4_OSXSAVE
))
8529 if ((sregs
->efer
& EFER_LME
) && (sregs
->cr0
& X86_CR0_PG
)) {
8531 * When EFER.LME and CR0.PG are set, the processor is in
8532 * 64-bit mode (though maybe in a 32-bit code segment).
8533 * CR4.PAE and EFER.LMA must be set.
8535 if (!(sregs
->cr4
& X86_CR4_PAE
)
8536 || !(sregs
->efer
& EFER_LMA
))
8540 * Not in 64-bit mode: EFER.LMA is clear and the code
8541 * segment cannot be 64-bit.
8543 if (sregs
->efer
& EFER_LMA
|| sregs
->cs
.l
)
8550 static int __set_sregs(struct kvm_vcpu
*vcpu
, struct kvm_sregs
*sregs
)
8552 struct msr_data apic_base_msr
;
8553 int mmu_reset_needed
= 0;
8554 int cpuid_update_needed
= 0;
8555 int pending_vec
, max_bits
, idx
;
8559 if (kvm_valid_sregs(vcpu
, sregs
))
8562 apic_base_msr
.data
= sregs
->apic_base
;
8563 apic_base_msr
.host_initiated
= true;
8564 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
8567 dt
.size
= sregs
->idt
.limit
;
8568 dt
.address
= sregs
->idt
.base
;
8569 kvm_x86_ops
->set_idt(vcpu
, &dt
);
8570 dt
.size
= sregs
->gdt
.limit
;
8571 dt
.address
= sregs
->gdt
.base
;
8572 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
8574 vcpu
->arch
.cr2
= sregs
->cr2
;
8575 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
8576 vcpu
->arch
.cr3
= sregs
->cr3
;
8577 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
8579 kvm_set_cr8(vcpu
, sregs
->cr8
);
8581 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
8582 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
8584 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
8585 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
8586 vcpu
->arch
.cr0
= sregs
->cr0
;
8588 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
8589 cpuid_update_needed
|= ((kvm_read_cr4(vcpu
) ^ sregs
->cr4
) &
8590 (X86_CR4_OSXSAVE
| X86_CR4_PKE
));
8591 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
8592 if (cpuid_update_needed
)
8593 kvm_update_cpuid(vcpu
);
8595 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8596 if (!is_long_mode(vcpu
) && is_pae(vcpu
) && is_paging(vcpu
)) {
8597 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
8598 mmu_reset_needed
= 1;
8600 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8602 if (mmu_reset_needed
)
8603 kvm_mmu_reset_context(vcpu
);
8605 max_bits
= KVM_NR_INTERRUPTS
;
8606 pending_vec
= find_first_bit(
8607 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
8608 if (pending_vec
< max_bits
) {
8609 kvm_queue_interrupt(vcpu
, pending_vec
, false);
8610 pr_debug("Set back pending irq %d\n", pending_vec
);
8613 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
8614 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
8615 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
8616 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
8617 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
8618 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
8620 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
8621 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
8623 update_cr8_intercept(vcpu
);
8625 /* Older userspace won't unhalt the vcpu on reset. */
8626 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
8627 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
8629 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8631 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8638 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
8639 struct kvm_sregs
*sregs
)
8644 ret
= __set_sregs(vcpu
, sregs
);
8649 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
8650 struct kvm_guest_debug
*dbg
)
8652 unsigned long rflags
;
8657 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
8659 if (vcpu
->arch
.exception
.pending
)
8661 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
8662 kvm_queue_exception(vcpu
, DB_VECTOR
);
8664 kvm_queue_exception(vcpu
, BP_VECTOR
);
8668 * Read rflags as long as potentially injected trace flags are still
8671 rflags
= kvm_get_rflags(vcpu
);
8673 vcpu
->guest_debug
= dbg
->control
;
8674 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
8675 vcpu
->guest_debug
= 0;
8677 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
8678 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
8679 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
8680 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
8682 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
8683 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
8685 kvm_update_dr7(vcpu
);
8687 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8688 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
8689 get_segment_base(vcpu
, VCPU_SREG_CS
);
8692 * Trigger an rflags update that will inject or remove the trace
8695 kvm_set_rflags(vcpu
, rflags
);
8697 kvm_x86_ops
->update_bp_intercept(vcpu
);
8707 * Translate a guest virtual address to a guest physical address.
8709 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
8710 struct kvm_translation
*tr
)
8712 unsigned long vaddr
= tr
->linear_address
;
8718 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8719 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
8720 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8721 tr
->physical_address
= gpa
;
8722 tr
->valid
= gpa
!= UNMAPPED_GVA
;
8730 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
8732 struct fxregs_state
*fxsave
;
8736 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
8737 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
8738 fpu
->fcw
= fxsave
->cwd
;
8739 fpu
->fsw
= fxsave
->swd
;
8740 fpu
->ftwx
= fxsave
->twd
;
8741 fpu
->last_opcode
= fxsave
->fop
;
8742 fpu
->last_ip
= fxsave
->rip
;
8743 fpu
->last_dp
= fxsave
->rdp
;
8744 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof(fxsave
->xmm_space
));
8750 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
8752 struct fxregs_state
*fxsave
;
8756 fxsave
= &vcpu
->arch
.guest_fpu
->state
.fxsave
;
8758 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
8759 fxsave
->cwd
= fpu
->fcw
;
8760 fxsave
->swd
= fpu
->fsw
;
8761 fxsave
->twd
= fpu
->ftwx
;
8762 fxsave
->fop
= fpu
->last_opcode
;
8763 fxsave
->rip
= fpu
->last_ip
;
8764 fxsave
->rdp
= fpu
->last_dp
;
8765 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof(fxsave
->xmm_space
));
8771 static void store_regs(struct kvm_vcpu
*vcpu
)
8773 BUILD_BUG_ON(sizeof(struct kvm_sync_regs
) > SYNC_REGS_SIZE_BYTES
);
8775 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_REGS
)
8776 __get_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
8778 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_SREGS
)
8779 __get_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
);
8781 if (vcpu
->run
->kvm_valid_regs
& KVM_SYNC_X86_EVENTS
)
8782 kvm_vcpu_ioctl_x86_get_vcpu_events(
8783 vcpu
, &vcpu
->run
->s
.regs
.events
);
8786 static int sync_regs(struct kvm_vcpu
*vcpu
)
8788 if (vcpu
->run
->kvm_dirty_regs
& ~KVM_SYNC_X86_VALID_FIELDS
)
8791 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_REGS
) {
8792 __set_regs(vcpu
, &vcpu
->run
->s
.regs
.regs
);
8793 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_REGS
;
8795 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_SREGS
) {
8796 if (__set_sregs(vcpu
, &vcpu
->run
->s
.regs
.sregs
))
8798 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_SREGS
;
8800 if (vcpu
->run
->kvm_dirty_regs
& KVM_SYNC_X86_EVENTS
) {
8801 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8802 vcpu
, &vcpu
->run
->s
.regs
.events
))
8804 vcpu
->run
->kvm_dirty_regs
&= ~KVM_SYNC_X86_EVENTS
;
8810 static void fx_init(struct kvm_vcpu
*vcpu
)
8812 fpstate_init(&vcpu
->arch
.guest_fpu
->state
);
8813 if (boot_cpu_has(X86_FEATURE_XSAVES
))
8814 vcpu
->arch
.guest_fpu
->state
.xsave
.header
.xcomp_bv
=
8815 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
8818 * Ensure guest xcr0 is valid for loading
8820 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8822 vcpu
->arch
.cr0
|= X86_CR0_ET
;
8825 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
8827 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
8829 kvmclock_reset(vcpu
);
8831 kvm_x86_ops
->vcpu_free(vcpu
);
8832 free_cpumask_var(wbinvd_dirty_mask
);
8835 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
8838 struct kvm_vcpu
*vcpu
;
8840 if (kvm_check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
8841 printk_once(KERN_WARNING
8842 "kvm: SMP vm created on host with unstable TSC; "
8843 "guest TSC will not be reliable\n");
8845 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
8850 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
8852 vcpu
->arch
.arch_capabilities
= kvm_get_arch_capabilities();
8853 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
8854 kvm_vcpu_mtrr_init(vcpu
);
8856 kvm_vcpu_reset(vcpu
, false);
8857 kvm_init_mmu(vcpu
, false);
8862 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
8864 struct msr_data msr
;
8865 struct kvm
*kvm
= vcpu
->kvm
;
8867 kvm_hv_vcpu_postcreate(vcpu
);
8869 if (mutex_lock_killable(&vcpu
->mutex
))
8873 msr
.index
= MSR_IA32_TSC
;
8874 msr
.host_initiated
= true;
8875 kvm_write_tsc(vcpu
, &msr
);
8877 mutex_unlock(&vcpu
->mutex
);
8879 if (!kvmclock_periodic_sync
)
8882 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
8883 KVMCLOCK_SYNC_PERIOD
);
8886 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
8888 vcpu
->arch
.apf
.msr_val
= 0;
8891 kvm_mmu_unload(vcpu
);
8894 kvm_x86_ops
->vcpu_free(vcpu
);
8897 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
8899 kvm_lapic_reset(vcpu
, init_event
);
8901 vcpu
->arch
.hflags
= 0;
8903 vcpu
->arch
.smi_pending
= 0;
8904 vcpu
->arch
.smi_count
= 0;
8905 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
8906 vcpu
->arch
.nmi_pending
= 0;
8907 vcpu
->arch
.nmi_injected
= false;
8908 kvm_clear_interrupt_queue(vcpu
);
8909 kvm_clear_exception_queue(vcpu
);
8910 vcpu
->arch
.exception
.pending
= false;
8912 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
8913 kvm_update_dr0123(vcpu
);
8914 vcpu
->arch
.dr6
= DR6_INIT
;
8915 kvm_update_dr6(vcpu
);
8916 vcpu
->arch
.dr7
= DR7_FIXED_1
;
8917 kvm_update_dr7(vcpu
);
8921 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8922 vcpu
->arch
.apf
.msr_val
= 0;
8923 vcpu
->arch
.st
.msr_val
= 0;
8925 kvmclock_reset(vcpu
);
8927 kvm_clear_async_pf_completion_queue(vcpu
);
8928 kvm_async_pf_hash_reset(vcpu
);
8929 vcpu
->arch
.apf
.halted
= false;
8931 if (kvm_mpx_supported()) {
8932 void *mpx_state_buffer
;
8935 * To avoid have the INIT path from kvm_apic_has_events() that be
8936 * called with loaded FPU and does not let userspace fix the state.
8939 kvm_put_guest_fpu(vcpu
);
8940 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
8942 if (mpx_state_buffer
)
8943 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndreg_state
));
8944 mpx_state_buffer
= get_xsave_addr(&vcpu
->arch
.guest_fpu
->state
.xsave
,
8946 if (mpx_state_buffer
)
8947 memset(mpx_state_buffer
, 0, sizeof(struct mpx_bndcsr
));
8949 kvm_load_guest_fpu(vcpu
);
8953 kvm_pmu_reset(vcpu
);
8954 vcpu
->arch
.smbase
= 0x30000;
8956 vcpu
->arch
.msr_misc_features_enables
= 0;
8958 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
8961 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
8962 vcpu
->arch
.regs_avail
= ~0;
8963 vcpu
->arch
.regs_dirty
= ~0;
8965 vcpu
->arch
.ia32_xss
= 0;
8967 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
8970 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
8972 struct kvm_segment cs
;
8974 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8975 cs
.selector
= vector
<< 8;
8976 cs
.base
= vector
<< 12;
8977 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
8978 kvm_rip_write(vcpu
, 0);
8981 int kvm_arch_hardware_enable(void)
8984 struct kvm_vcpu
*vcpu
;
8989 bool stable
, backwards_tsc
= false;
8991 kvm_shared_msr_cpu_online();
8992 ret
= kvm_x86_ops
->hardware_enable();
8996 local_tsc
= rdtsc();
8997 stable
= !kvm_check_tsc_unstable();
8998 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
8999 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9000 if (!stable
&& vcpu
->cpu
== smp_processor_id())
9001 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
9002 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
9003 backwards_tsc
= true;
9004 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
9005 max_tsc
= vcpu
->arch
.last_host_tsc
;
9011 * Sometimes, even reliable TSCs go backwards. This happens on
9012 * platforms that reset TSC during suspend or hibernate actions, but
9013 * maintain synchronization. We must compensate. Fortunately, we can
9014 * detect that condition here, which happens early in CPU bringup,
9015 * before any KVM threads can be running. Unfortunately, we can't
9016 * bring the TSCs fully up to date with real time, as we aren't yet far
9017 * enough into CPU bringup that we know how much real time has actually
9018 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
9019 * variables that haven't been updated yet.
9021 * So we simply find the maximum observed TSC above, then record the
9022 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
9023 * the adjustment will be applied. Note that we accumulate
9024 * adjustments, in case multiple suspend cycles happen before some VCPU
9025 * gets a chance to run again. In the event that no KVM threads get a
9026 * chance to run, we will miss the entire elapsed period, as we'll have
9027 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9028 * loose cycle time. This isn't too big a deal, since the loss will be
9029 * uniform across all VCPUs (not to mention the scenario is extremely
9030 * unlikely). It is possible that a second hibernate recovery happens
9031 * much faster than a first, causing the observed TSC here to be
9032 * smaller; this would require additional padding adjustment, which is
9033 * why we set last_host_tsc to the local tsc observed here.
9035 * N.B. - this code below runs only on platforms with reliable TSC,
9036 * as that is the only way backwards_tsc is set above. Also note
9037 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9038 * have the same delta_cyc adjustment applied if backwards_tsc
9039 * is detected. Note further, this adjustment is only done once,
9040 * as we reset last_host_tsc on all VCPUs to stop this from being
9041 * called multiple times (one for each physical CPU bringup).
9043 * Platforms with unreliable TSCs don't have to deal with this, they
9044 * will be compensated by the logic in vcpu_load, which sets the TSC to
9045 * catchup mode. This will catchup all VCPUs to real time, but cannot
9046 * guarantee that they stay in perfect synchronization.
9048 if (backwards_tsc
) {
9049 u64 delta_cyc
= max_tsc
- local_tsc
;
9050 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
9051 kvm
->arch
.backwards_tsc_observed
= true;
9052 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9053 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
9054 vcpu
->arch
.last_host_tsc
= local_tsc
;
9055 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
9059 * We have to disable TSC offset matching.. if you were
9060 * booting a VM while issuing an S4 host suspend....
9061 * you may have some problem. Solving this issue is
9062 * left as an exercise to the reader.
9064 kvm
->arch
.last_tsc_nsec
= 0;
9065 kvm
->arch
.last_tsc_write
= 0;
9072 void kvm_arch_hardware_disable(void)
9074 kvm_x86_ops
->hardware_disable();
9075 drop_user_return_notifiers();
9078 int kvm_arch_hardware_setup(void)
9082 r
= kvm_x86_ops
->hardware_setup();
9086 if (kvm_has_tsc_control
) {
9088 * Make sure the user can only configure tsc_khz values that
9089 * fit into a signed integer.
9090 * A min value is not calculated because it will always
9091 * be 1 on all machines.
9093 u64 max
= min(0x7fffffffULL
,
9094 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
9095 kvm_max_guest_tsc_khz
= max
;
9097 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
9100 kvm_init_msr_list();
9104 void kvm_arch_hardware_unsetup(void)
9106 kvm_x86_ops
->hardware_unsetup();
9109 void kvm_arch_check_processor_compat(void *rtn
)
9111 kvm_x86_ops
->check_processor_compatibility(rtn
);
9114 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
9116 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
9118 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
9120 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
9122 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
9125 struct static_key kvm_no_apic_vcpu __read_mostly
;
9126 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
9128 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
9133 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
9134 if (!irqchip_in_kernel(vcpu
->kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
9135 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9137 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
9139 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
9144 vcpu
->arch
.pio_data
= page_address(page
);
9146 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
9148 r
= kvm_mmu_create(vcpu
);
9150 goto fail_free_pio_data
;
9152 if (irqchip_in_kernel(vcpu
->kvm
)) {
9153 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv(vcpu
);
9154 r
= kvm_create_lapic(vcpu
, lapic_timer_advance_ns
);
9156 goto fail_mmu_destroy
;
9158 static_key_slow_inc(&kvm_no_apic_vcpu
);
9160 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
9161 GFP_KERNEL_ACCOUNT
);
9162 if (!vcpu
->arch
.mce_banks
) {
9164 goto fail_free_lapic
;
9166 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
9168 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
,
9169 GFP_KERNEL_ACCOUNT
)) {
9171 goto fail_free_mce_banks
;
9176 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
9178 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
9180 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
9182 kvm_async_pf_hash_reset(vcpu
);
9185 vcpu
->arch
.pending_external_vector
= -1;
9186 vcpu
->arch
.preempted_in_kernel
= false;
9188 kvm_hv_vcpu_init(vcpu
);
9192 fail_free_mce_banks
:
9193 kfree(vcpu
->arch
.mce_banks
);
9195 kvm_free_lapic(vcpu
);
9197 kvm_mmu_destroy(vcpu
);
9199 free_page((unsigned long)vcpu
->arch
.pio_data
);
9204 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
9208 kvm_hv_vcpu_uninit(vcpu
);
9209 kvm_pmu_destroy(vcpu
);
9210 kfree(vcpu
->arch
.mce_banks
);
9211 kvm_free_lapic(vcpu
);
9212 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
9213 kvm_mmu_destroy(vcpu
);
9214 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
9215 free_page((unsigned long)vcpu
->arch
.pio_data
);
9216 if (!lapic_in_kernel(vcpu
))
9217 static_key_slow_dec(&kvm_no_apic_vcpu
);
9220 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
9222 vcpu
->arch
.l1tf_flush_l1d
= true;
9223 kvm_x86_ops
->sched_in(vcpu
, cpu
);
9226 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
9231 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
9232 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
9233 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
9234 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
9236 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9237 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
9238 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9239 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
9240 &kvm
->arch
.irq_sources_bitmap
);
9242 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
9243 mutex_init(&kvm
->arch
.apic_map_lock
);
9244 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
9246 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
9247 pvclock_update_vm_gtod_copy(kvm
);
9249 kvm
->arch
.guest_can_read_msr_platform_info
= true;
9251 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
9252 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
9254 kvm_hv_init_vm(kvm
);
9255 kvm_page_track_init(kvm
);
9256 kvm_mmu_init_vm(kvm
);
9258 if (kvm_x86_ops
->vm_init
)
9259 return kvm_x86_ops
->vm_init(kvm
);
9264 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
9267 kvm_mmu_unload(vcpu
);
9271 static void kvm_free_vcpus(struct kvm
*kvm
)
9274 struct kvm_vcpu
*vcpu
;
9277 * Unpin any mmu pages first.
9279 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
9280 kvm_clear_async_pf_completion_queue(vcpu
);
9281 kvm_unload_vcpu_mmu(vcpu
);
9283 kvm_for_each_vcpu(i
, vcpu
, kvm
)
9284 kvm_arch_vcpu_free(vcpu
);
9286 mutex_lock(&kvm
->lock
);
9287 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
9288 kvm
->vcpus
[i
] = NULL
;
9290 atomic_set(&kvm
->online_vcpus
, 0);
9291 mutex_unlock(&kvm
->lock
);
9294 void kvm_arch_sync_events(struct kvm
*kvm
)
9296 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
9297 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
9301 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
9305 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
9306 struct kvm_memory_slot
*slot
, old
;
9308 /* Called with kvm->slots_lock held. */
9309 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
9312 slot
= id_to_memslot(slots
, id
);
9318 * MAP_SHARED to prevent internal slot pages from being moved
9321 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
9322 MAP_SHARED
| MAP_ANONYMOUS
, 0);
9323 if (IS_ERR((void *)hva
))
9324 return PTR_ERR((void *)hva
);
9333 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
9334 struct kvm_userspace_memory_region m
;
9336 m
.slot
= id
| (i
<< 16);
9338 m
.guest_phys_addr
= gpa
;
9339 m
.userspace_addr
= hva
;
9340 m
.memory_size
= size
;
9341 r
= __kvm_set_memory_region(kvm
, &m
);
9347 vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
9351 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
9353 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
9357 mutex_lock(&kvm
->slots_lock
);
9358 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
9359 mutex_unlock(&kvm
->slots_lock
);
9363 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
9365 void kvm_arch_destroy_vm(struct kvm
*kvm
)
9367 if (current
->mm
== kvm
->mm
) {
9369 * Free memory regions allocated on behalf of userspace,
9370 * unless the the memory map has changed due to process exit
9373 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
9374 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
9375 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
9377 if (kvm_x86_ops
->vm_destroy
)
9378 kvm_x86_ops
->vm_destroy(kvm
);
9379 kvm_pic_destroy(kvm
);
9380 kvm_ioapic_destroy(kvm
);
9381 kvm_free_vcpus(kvm
);
9382 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
9383 kvm_mmu_uninit_vm(kvm
);
9384 kvm_page_track_cleanup(kvm
);
9385 kvm_hv_destroy_vm(kvm
);
9388 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
9389 struct kvm_memory_slot
*dont
)
9393 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
9394 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
9395 kvfree(free
->arch
.rmap
[i
]);
9396 free
->arch
.rmap
[i
] = NULL
;
9401 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
9402 dont
->arch
.lpage_info
[i
- 1]) {
9403 kvfree(free
->arch
.lpage_info
[i
- 1]);
9404 free
->arch
.lpage_info
[i
- 1] = NULL
;
9408 kvm_page_track_free_memslot(free
, dont
);
9411 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
9412 unsigned long npages
)
9416 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
9417 struct kvm_lpage_info
*linfo
;
9422 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
9423 slot
->base_gfn
, level
) + 1;
9425 slot
->arch
.rmap
[i
] =
9426 kvcalloc(lpages
, sizeof(*slot
->arch
.rmap
[i
]),
9427 GFP_KERNEL_ACCOUNT
);
9428 if (!slot
->arch
.rmap
[i
])
9433 linfo
= kvcalloc(lpages
, sizeof(*linfo
), GFP_KERNEL_ACCOUNT
);
9437 slot
->arch
.lpage_info
[i
- 1] = linfo
;
9439 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
9440 linfo
[0].disallow_lpage
= 1;
9441 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
9442 linfo
[lpages
- 1].disallow_lpage
= 1;
9443 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
9445 * If the gfn and userspace address are not aligned wrt each
9446 * other, or if explicitly asked to, disable large page
9447 * support for this slot
9449 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
9450 !kvm_largepages_enabled()) {
9453 for (j
= 0; j
< lpages
; ++j
)
9454 linfo
[j
].disallow_lpage
= 1;
9458 if (kvm_page_track_create_memslot(slot
, npages
))
9464 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
9465 kvfree(slot
->arch
.rmap
[i
]);
9466 slot
->arch
.rmap
[i
] = NULL
;
9470 kvfree(slot
->arch
.lpage_info
[i
- 1]);
9471 slot
->arch
.lpage_info
[i
- 1] = NULL
;
9476 void kvm_arch_memslots_updated(struct kvm
*kvm
, u64 gen
)
9479 * memslots->generation has been incremented.
9480 * mmio generation may have reached its maximum value.
9482 kvm_mmu_invalidate_mmio_sptes(kvm
, gen
);
9485 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
9486 struct kvm_memory_slot
*memslot
,
9487 const struct kvm_userspace_memory_region
*mem
,
9488 enum kvm_mr_change change
)
9493 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
9494 struct kvm_memory_slot
*new)
9496 /* Still write protect RO slot */
9497 if (new->flags
& KVM_MEM_READONLY
) {
9498 kvm_mmu_slot_remove_write_access(kvm
, new);
9503 * Call kvm_x86_ops dirty logging hooks when they are valid.
9505 * kvm_x86_ops->slot_disable_log_dirty is called when:
9507 * - KVM_MR_CREATE with dirty logging is disabled
9508 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9510 * The reason is, in case of PML, we need to set D-bit for any slots
9511 * with dirty logging disabled in order to eliminate unnecessary GPA
9512 * logging in PML buffer (and potential PML buffer full VMEXT). This
9513 * guarantees leaving PML enabled during guest's lifetime won't have
9514 * any additional overhead from PML when guest is running with dirty
9515 * logging disabled for memory slots.
9517 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9518 * to dirty logging mode.
9520 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9522 * In case of write protect:
9524 * Write protect all pages for dirty logging.
9526 * All the sptes including the large sptes which point to this
9527 * slot are set to readonly. We can not create any new large
9528 * spte on this slot until the end of the logging.
9530 * See the comments in fast_page_fault().
9532 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
9533 if (kvm_x86_ops
->slot_enable_log_dirty
)
9534 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
9536 kvm_mmu_slot_remove_write_access(kvm
, new);
9538 if (kvm_x86_ops
->slot_disable_log_dirty
)
9539 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
9543 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
9544 const struct kvm_userspace_memory_region
*mem
,
9545 const struct kvm_memory_slot
*old
,
9546 const struct kvm_memory_slot
*new,
9547 enum kvm_mr_change change
)
9549 if (!kvm
->arch
.n_requested_mmu_pages
)
9550 kvm_mmu_change_mmu_pages(kvm
,
9551 kvm_mmu_calculate_default_mmu_pages(kvm
));
9554 * Dirty logging tracks sptes in 4k granularity, meaning that large
9555 * sptes have to be split. If live migration is successful, the guest
9556 * in the source machine will be destroyed and large sptes will be
9557 * created in the destination. However, if the guest continues to run
9558 * in the source machine (for example if live migration fails), small
9559 * sptes will remain around and cause bad performance.
9561 * Scan sptes if dirty logging has been stopped, dropping those
9562 * which can be collapsed into a single large-page spte. Later
9563 * page faults will create the large-page sptes.
9565 if ((change
!= KVM_MR_DELETE
) &&
9566 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
9567 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
9568 kvm_mmu_zap_collapsible_sptes(kvm
, new);
9571 * Set up write protection and/or dirty logging for the new slot.
9573 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9574 * been zapped so no dirty logging staff is needed for old slot. For
9575 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9576 * new and it's also covered when dealing with the new slot.
9578 * FIXME: const-ify all uses of struct kvm_memory_slot.
9580 if (change
!= KVM_MR_DELETE
)
9581 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
9584 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
9586 kvm_mmu_zap_all(kvm
);
9589 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
9590 struct kvm_memory_slot
*slot
)
9592 kvm_page_track_flush_slot(kvm
, slot
);
9595 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu
*vcpu
)
9597 return (is_guest_mode(vcpu
) &&
9598 kvm_x86_ops
->guest_apic_has_interrupt
&&
9599 kvm_x86_ops
->guest_apic_has_interrupt(vcpu
));
9602 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
9604 if (!list_empty_careful(&vcpu
->async_pf
.done
))
9607 if (kvm_apic_has_events(vcpu
))
9610 if (vcpu
->arch
.pv
.pv_unhalted
)
9613 if (vcpu
->arch
.exception
.pending
)
9616 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
9617 (vcpu
->arch
.nmi_pending
&&
9618 kvm_x86_ops
->nmi_allowed(vcpu
)))
9621 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
9622 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
9625 if (kvm_arch_interrupt_allowed(vcpu
) &&
9626 (kvm_cpu_has_interrupt(vcpu
) ||
9627 kvm_guest_apic_has_interrupt(vcpu
)))
9630 if (kvm_hv_has_stimer_pending(vcpu
))
9636 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
9638 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
9641 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
9643 return vcpu
->arch
.preempted_in_kernel
;
9646 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
9648 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
9651 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
9653 return kvm_x86_ops
->interrupt_allowed(vcpu
);
9656 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
9658 if (is_64_bit_mode(vcpu
))
9659 return kvm_rip_read(vcpu
);
9660 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
9661 kvm_rip_read(vcpu
));
9663 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
9665 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
9667 return kvm_get_linear_rip(vcpu
) == linear_rip
;
9669 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
9671 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
9673 unsigned long rflags
;
9675 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
9676 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
9677 rflags
&= ~X86_EFLAGS_TF
;
9680 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
9682 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
9684 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
9685 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
9686 rflags
|= X86_EFLAGS_TF
;
9687 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
9690 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
9692 __kvm_set_rflags(vcpu
, rflags
);
9693 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
9695 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
9697 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
9701 if ((vcpu
->arch
.mmu
->direct_map
!= work
->arch
.direct_map
) ||
9705 r
= kvm_mmu_reload(vcpu
);
9709 if (!vcpu
->arch
.mmu
->direct_map
&&
9710 work
->arch
.cr3
!= vcpu
->arch
.mmu
->get_cr3(vcpu
))
9713 vcpu
->arch
.mmu
->page_fault(vcpu
, work
->gva
, 0, true);
9716 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
9718 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
9721 static inline u32
kvm_async_pf_next_probe(u32 key
)
9723 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
9726 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9728 u32 key
= kvm_async_pf_hash_fn(gfn
);
9730 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
9731 key
= kvm_async_pf_next_probe(key
);
9733 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
9736 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9739 u32 key
= kvm_async_pf_hash_fn(gfn
);
9741 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
9742 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
9743 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
9744 key
= kvm_async_pf_next_probe(key
);
9749 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9751 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
9754 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
9758 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
9760 vcpu
->arch
.apf
.gfns
[i
] = ~0;
9762 j
= kvm_async_pf_next_probe(j
);
9763 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
9765 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
9767 * k lies cyclically in ]i,j]
9769 * |....j i.k.| or |.k..j i...|
9771 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
9772 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
9777 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
9780 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
9784 static int apf_get_user(struct kvm_vcpu
*vcpu
, u32
*val
)
9787 return kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, val
,
9791 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
9792 struct kvm_async_pf
*work
)
9794 struct x86_exception fault
;
9796 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
9797 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
9799 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
9800 (vcpu
->arch
.apf
.send_user_only
&&
9801 kvm_x86_ops
->get_cpl(vcpu
) == 0))
9802 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
9803 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
9804 fault
.vector
= PF_VECTOR
;
9805 fault
.error_code_valid
= true;
9806 fault
.error_code
= 0;
9807 fault
.nested_page_fault
= false;
9808 fault
.address
= work
->arch
.token
;
9809 fault
.async_page_fault
= true;
9810 kvm_inject_page_fault(vcpu
, &fault
);
9814 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
9815 struct kvm_async_pf
*work
)
9817 struct x86_exception fault
;
9820 if (work
->wakeup_all
)
9821 work
->arch
.token
= ~0; /* broadcast wakeup */
9823 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
9824 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
9826 if (vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
&&
9827 !apf_get_user(vcpu
, &val
)) {
9828 if (val
== KVM_PV_REASON_PAGE_NOT_PRESENT
&&
9829 vcpu
->arch
.exception
.pending
&&
9830 vcpu
->arch
.exception
.nr
== PF_VECTOR
&&
9831 !apf_put_user(vcpu
, 0)) {
9832 vcpu
->arch
.exception
.injected
= false;
9833 vcpu
->arch
.exception
.pending
= false;
9834 vcpu
->arch
.exception
.nr
= 0;
9835 vcpu
->arch
.exception
.has_error_code
= false;
9836 vcpu
->arch
.exception
.error_code
= 0;
9837 vcpu
->arch
.exception
.has_payload
= false;
9838 vcpu
->arch
.exception
.payload
= 0;
9839 } else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
9840 fault
.vector
= PF_VECTOR
;
9841 fault
.error_code_valid
= true;
9842 fault
.error_code
= 0;
9843 fault
.nested_page_fault
= false;
9844 fault
.address
= work
->arch
.token
;
9845 fault
.async_page_fault
= true;
9846 kvm_inject_page_fault(vcpu
, &fault
);
9849 vcpu
->arch
.apf
.halted
= false;
9850 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
9853 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
9855 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
9858 return kvm_can_do_async_pf(vcpu
);
9861 void kvm_arch_start_assignment(struct kvm
*kvm
)
9863 atomic_inc(&kvm
->arch
.assigned_device_count
);
9865 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
9867 void kvm_arch_end_assignment(struct kvm
*kvm
)
9869 atomic_dec(&kvm
->arch
.assigned_device_count
);
9871 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
9873 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
9875 return atomic_read(&kvm
->arch
.assigned_device_count
);
9877 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
9879 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
9881 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
9883 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
9885 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
9887 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
9889 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
9891 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
9893 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
9895 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
9897 bool kvm_arch_has_irq_bypass(void)
9899 return kvm_x86_ops
->update_pi_irte
!= NULL
;
9902 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
9903 struct irq_bypass_producer
*prod
)
9905 struct kvm_kernel_irqfd
*irqfd
=
9906 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9908 irqfd
->producer
= prod
;
9910 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
9911 prod
->irq
, irqfd
->gsi
, 1);
9914 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
9915 struct irq_bypass_producer
*prod
)
9918 struct kvm_kernel_irqfd
*irqfd
=
9919 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
9921 WARN_ON(irqfd
->producer
!= prod
);
9922 irqfd
->producer
= NULL
;
9925 * When producer of consumer is unregistered, we change back to
9926 * remapped mode, so we can re-use the current implementation
9927 * when the irq is masked/disabled or the consumer side (KVM
9928 * int this case doesn't want to receive the interrupts.
9930 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
9932 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
9933 " fails: %d\n", irqfd
->consumer
.token
, ret
);
9936 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
9937 uint32_t guest_irq
, bool set
)
9939 if (!kvm_x86_ops
->update_pi_irte
)
9942 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
9945 bool kvm_vector_hashing_enabled(void)
9947 return vector_hashing
;
9949 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
9951 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
9952 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
9953 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
9954 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
9955 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
9956 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
9957 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
9958 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
9959 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
9960 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
9961 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
9962 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
9963 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
9964 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
9965 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
9966 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
9967 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
9968 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
9969 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);