]> git.ipfire.org Git - thirdparty/kernel/stable.git/blob - drivers/staging/olpc_dcon/olpc_dcon_xo_1.c
Merge tag 'clang-format-for-linus-v5.1-rc5' of git://github.com/ojeda/linux
[thirdparty/kernel/stable.git] / drivers / staging / olpc_dcon / olpc_dcon_xo_1.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Mainly by David Woodhouse, somewhat modified by Jordan Crouse
4 *
5 * Copyright © 2006-2007 Red Hat, Inc.
6 * Copyright © 2006-2007 Advanced Micro Devices, Inc.
7 * Copyright © 2009 VIA Technology, Inc.
8 * Copyright (c) 2010 Andres Salomon <dilinger@queued.net>
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/cs5535.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/delay.h>
16 #include <linux/i2c.h>
17 #include <asm/olpc.h>
18
19 #include "olpc_dcon.h"
20
21 enum dcon_gpios {
22 OLPC_DCON_STAT0,
23 OLPC_DCON_STAT1,
24 OLPC_DCON_IRQ,
25 OLPC_DCON_LOAD,
26 OLPC_DCON_BLANK,
27 };
28
29 struct dcon_gpio {
30 const char *name;
31 unsigned long flags;
32 };
33
34 static const struct dcon_gpio gpios_asis[] = {
35 [OLPC_DCON_STAT0] = { .name = "dcon_stat0", .flags = GPIOD_ASIS },
36 [OLPC_DCON_STAT1] = { .name = "dcon_stat1", .flags = GPIOD_ASIS },
37 [OLPC_DCON_IRQ] = { .name = "dcon_irq", .flags = GPIOD_ASIS },
38 [OLPC_DCON_LOAD] = { .name = "dcon_load", .flags = GPIOD_ASIS },
39 [OLPC_DCON_BLANK] = { .name = "dcon_blank", .flags = GPIOD_ASIS },
40 };
41
42 struct gpio_desc *gpios[5];
43
44 static int dcon_init_xo_1(struct dcon_priv *dcon)
45 {
46 unsigned char lob;
47 int ret, i;
48 const struct dcon_gpio *pin = &gpios_asis[0];
49
50 for (i = 0; i < ARRAY_SIZE(gpios_asis); i++) {
51 gpios[i] = devm_gpiod_get(&dcon->client->dev, pin[i].name,
52 pin[i].flags);
53 if (IS_ERR(gpios[i])) {
54 ret = PTR_ERR(gpios[i]);
55 pr_err("failed to request %s GPIO: %d\n", pin[i].name,
56 ret);
57 return ret;
58 }
59 }
60
61 /* Turn off the event enable for GPIO7 just to be safe */
62 cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_EVENTS_ENABLE);
63
64 /*
65 * Determine the current state by reading the GPIO bit; earlier
66 * stages of the boot process have established the state.
67 *
68 * Note that we read GPIO_OUTPUT_VAL rather than GPIO_READ_BACK here;
69 * this is because OFW will disable input for the pin and set a value..
70 * READ_BACK will only contain a valid value if input is enabled and
71 * then a value is set. So, future readings of the pin can use
72 * READ_BACK, but the first one cannot. Awesome, huh?
73 */
74 dcon->curr_src = cs5535_gpio_isset(OLPC_GPIO_DCON_LOAD, GPIO_OUTPUT_VAL)
75 ? DCON_SOURCE_CPU
76 : DCON_SOURCE_DCON;
77 dcon->pending_src = dcon->curr_src;
78
79 /* Set the directions for the GPIO pins */
80 gpiod_direction_input(gpios[OLPC_DCON_STAT0]);
81 gpiod_direction_input(gpios[OLPC_DCON_STAT1]);
82 gpiod_direction_input(gpios[OLPC_DCON_IRQ]);
83 gpiod_direction_input(gpios[OLPC_DCON_BLANK]);
84 gpiod_direction_output(gpios[OLPC_DCON_LOAD],
85 dcon->curr_src == DCON_SOURCE_CPU);
86
87 /* Set up the interrupt mappings */
88
89 /* Set the IRQ to pair 2 */
90 cs5535_gpio_setup_event(OLPC_GPIO_DCON_IRQ, 2, 0);
91
92 /* Enable group 2 to trigger the DCON interrupt */
93 cs5535_gpio_set_irq(2, DCON_IRQ);
94
95 /* Select edge level for interrupt (in PIC) */
96 lob = inb(0x4d0);
97 lob &= ~(1 << DCON_IRQ);
98 outb(lob, 0x4d0);
99
100 /* Register the interrupt handler */
101 if (request_irq(DCON_IRQ, &dcon_interrupt, 0, "DCON", dcon)) {
102 pr_err("failed to request DCON's irq\n");
103 return -EIO;
104 }
105
106 /* Clear INV_EN for GPIO7 (DCONIRQ) */
107 cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_INPUT_INVERT);
108
109 /* Enable filter for GPIO12 (DCONBLANK) */
110 cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_INPUT_FILTER);
111
112 /* Disable filter for GPIO7 */
113 cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_INPUT_FILTER);
114
115 /* Disable event counter for GPIO7 (DCONIRQ) and GPIO12 (DCONBLANK) */
116 cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_INPUT_EVENT_COUNT);
117 cs5535_gpio_clear(OLPC_GPIO_DCON_BLANK, GPIO_INPUT_EVENT_COUNT);
118
119 /* Add GPIO12 to the Filter Event Pair #7 */
120 cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_FE7_SEL);
121
122 /* Turn off negative Edge Enable for GPIO12 */
123 cs5535_gpio_clear(OLPC_GPIO_DCON_BLANK, GPIO_NEGATIVE_EDGE_EN);
124
125 /* Enable negative Edge Enable for GPIO7 */
126 cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_EN);
127
128 /* Zero the filter amount for Filter Event Pair #7 */
129 cs5535_gpio_set(0, GPIO_FLTR7_AMOUNT);
130
131 /* Clear the negative edge status for GPIO7 and GPIO12 */
132 cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_STS);
133 cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_NEGATIVE_EDGE_STS);
134
135 /* FIXME: Clear the positive status as well, just to be sure */
136 cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_POSITIVE_EDGE_STS);
137 cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_POSITIVE_EDGE_STS);
138
139 /* Enable events for GPIO7 (DCONIRQ) and GPIO12 (DCONBLANK) */
140 cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_EVENTS_ENABLE);
141 cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_EVENTS_ENABLE);
142
143 return 0;
144 }
145
146 static void dcon_wiggle_xo_1(void)
147 {
148 int x;
149
150 /*
151 * According to HiMax, when powering the DCON up we should hold
152 * SMB_DATA high for 8 SMB_CLK cycles. This will force the DCON
153 * state machine to reset to a (sane) initial state. Mitch Bradley
154 * did some testing and discovered that holding for 16 SMB_CLK cycles
155 * worked a lot more reliably, so that's what we do here.
156 *
157 * According to the cs5536 spec, to set GPIO14 to SMB_CLK we must
158 * simultaneously set AUX1 IN/OUT to GPIO14; ditto for SMB_DATA and
159 * GPIO15.
160 */
161 cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_VAL);
162 cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_VAL);
163 cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_ENABLE);
164 cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_ENABLE);
165 cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_AUX1);
166 cs5535_gpio_clear(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_AUX1);
167 cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_AUX2);
168 cs5535_gpio_clear(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_AUX2);
169 cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_INPUT_AUX1);
170 cs5535_gpio_clear(OLPC_GPIO_SMB_DATA, GPIO_INPUT_AUX1);
171
172 for (x = 0; x < 16; x++) {
173 udelay(5);
174 cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_VAL);
175 udelay(5);
176 cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_VAL);
177 }
178 udelay(5);
179 cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_AUX1);
180 cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_AUX1);
181 cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_INPUT_AUX1);
182 cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_INPUT_AUX1);
183 }
184
185 static void dcon_set_dconload_1(int val)
186 {
187 gpiod_set_value(gpios[OLPC_DCON_LOAD], val);
188 }
189
190 static int dcon_read_status_xo_1(u8 *status)
191 {
192 *status = gpiod_get_value(gpios[OLPC_DCON_STAT0]);
193 *status |= gpiod_get_value(gpios[OLPC_DCON_STAT1]) << 1;
194
195 /* Clear the negative edge status for GPIO7 */
196 cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_STS);
197
198 return 0;
199 }
200
201 struct dcon_platform_data dcon_pdata_xo_1 = {
202 .init = dcon_init_xo_1,
203 .bus_stabilize_wiggle = dcon_wiggle_xo_1,
204 .set_dconload = dcon_set_dconload_1,
205 .read_status = dcon_read_status_xo_1,
206 };