platform: mellanox: Modify reset causes description

For system of classes VMOD0005, VMOD0010:
- remove "reset_from_comex", since this cause doesn't define specific
  reason.
- add more specific reason "reset_sw_reset", which is set along with
  removed "reset_from_comex".

Signed-off-by: Vadim Pasternak <vadimp@nvidia.com>
Reviewed-by: Michael Shych <michaelsh@nvidia.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20230822113451.13785-4-vadimp@nvidia.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 647a10252c2f6128279134e2b2d11305d12f9e4d..5b0579752afb6439457eabf95fc399223fe95575 100644 (file)
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -3556,12 +3556,6 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
                .mask = GENMASK(7, 0) & ~BIT(2),
                .mode = 0444,
        },
-       {
-               .label = "reset_from_comex",
-               .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
-               .mask = GENMASK(7, 0) & ~BIT(4),
-               .mode = 0444,
-       },
        {
                .label = "reset_from_asic",
                .reg = MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET,
@@ -3580,6 +3574,12 @@ static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_regs_io_data[] = {
                .mask = GENMASK(7, 0) & ~BIT(7),
                .mode = 0444,
        },
+       {
+               .label = "reset_sw_reset",
+               .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET,
+               .mask = GENMASK(7, 0) & ~BIT(0),
+               .mode = 0444,
+       },
        {
                .label = "reset_comex_pwr_fail",
                .reg = MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET,