arch/arm64/include/uapi/asm/ptrace.h

   1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
   2 /*
   3  * Based on arch/arm/include/asm/ptrace.h
   4  *
   5  * Copyright (C) 1996-2003 Russell King
   6  * Copyright (C) 2012 ARM Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #ifndef _UAPI__ASM_PTRACE_H
  21 #define _UAPI__ASM_PTRACE_H
  22
  23 #include <linux/types.h>
  24
  25 #include <asm/hwcap.h>
  26 #include <asm/sve_context.h>
  27
  28
  29 /*
  30  * PSR bits
  31  */
  32 #define PSR_MODE_EL0t   0x00000000
  33 #define PSR_MODE_EL1t   0x00000004
  34 #define PSR_MODE_EL1h   0x00000005
  35 #define PSR_MODE_EL2t   0x00000008
  36 #define PSR_MODE_EL2h   0x00000009
  37 #define PSR_MODE_EL3t   0x0000000c
  38 #define PSR_MODE_EL3h   0x0000000d
  39 #define PSR_MODE_MASK   0x0000000f
  40
  41 /* AArch32 CPSR bits */
  42 #define PSR_MODE32_BIT          0x00000010
  43
  44 /* AArch64 SPSR bits */
  45 #define PSR_F_BIT       0x00000040
  46 #define PSR_I_BIT       0x00000080
  47 #define PSR_A_BIT       0x00000100
  48 #define PSR_D_BIT       0x00000200
  49 #define PSR_SSBS_BIT    0x00001000
  50 #define PSR_PAN_BIT     0x00400000
  51 #define PSR_UAO_BIT     0x00800000
  52 #define PSR_V_BIT       0x10000000
  53 #define PSR_C_BIT       0x20000000
  54 #define PSR_Z_BIT       0x40000000
  55 #define PSR_N_BIT       0x80000000
  56
  57 /*
  58  * Groups of PSR bits
  59  */
  60 #define PSR_f           0xff000000      /* Flags                */
  61 #define PSR_s           0x00ff0000      /* Status               */
  62 #define PSR_x           0x0000ff00      /* Extension            */
  63 #define PSR_c           0x000000ff      /* Control              */
  64
  65
  66 #ifndef __ASSEMBLY__
  67
  68 #include <linux/prctl.h>
  69
  70 /*
  71  * User structures for general purpose, floating point and debug registers.
  72  */
  73 struct user_pt_regs {
  74         __u64           regs[31];
  75         __u64           sp;
  76         __u64           pc;
  77         __u64           pstate;
  78 };
  79
  80 struct user_fpsimd_state {
  81         __uint128_t     vregs[32];
  82         __u32           fpsr;
  83         __u32           fpcr;
  84         __u32           __reserved[2];
  85 };
  86
  87 struct user_hwdebug_state {
  88         __u32           dbg_info;
  89         __u32           pad;
  90         struct {
  91                 __u64   addr;
  92                 __u32   ctrl;
  93                 __u32   pad;
  94         }               dbg_regs[16];
  95 };
  96
  97 /* SVE/FP/SIMD state (NT_ARM_SVE) */
  98
  99 struct user_sve_header {
 100         __u32 size; /* total meaningful regset content in bytes */
 101         __u32 max_size; /* maxmium possible size for this thread */
 102         __u16 vl; /* current vector length */
 103         __u16 max_vl; /* maximum possible vector length */
 104         __u16 flags;
 105         __u16 __reserved;
 106 };
 107
 108 /* Definitions for user_sve_header.flags: */
 109 #define SVE_PT_REGS_MASK                (1 << 0)
 110
 111 #define SVE_PT_REGS_FPSIMD              0
 112 #define SVE_PT_REGS_SVE                 SVE_PT_REGS_MASK
 113
 114 /*
 115  * Common SVE_PT_* flags:
 116  * These must be kept in sync with prctl interface in <linux/ptrace.h>
 117  */
 118 #define SVE_PT_VL_INHERIT               (PR_SVE_VL_INHERIT >> 16)
 119 #define SVE_PT_VL_ONEXEC                (PR_SVE_SET_VL_ONEXEC >> 16)
 120
 121
 122 /*
 123  * The remainder of the SVE state follows struct user_sve_header.  The
 124  * total size of the SVE state (including header) depends on the
 125  * metadata in the header:  SVE_PT_SIZE(vq, flags) gives the total size
 126  * of the state in bytes, including the header.
 127  *
 128  * Refer to <asm/sigcontext.h> for details of how to pass the correct
 129  * "vq" argument to these macros.
 130  */
 131
 132 /* Offset from the start of struct user_sve_header to the register data */
 133 #define SVE_PT_REGS_OFFSET                                              \
 134         ((sizeof(struct user_sve_header) + (__SVE_VQ_BYTES - 1))        \
 135                 / __SVE_VQ_BYTES * __SVE_VQ_BYTES)
 136
 137 /*
 138  * The register data content and layout depends on the value of the
 139  * flags field.
 140  */
 141
 142 /*
 143  * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD case:
 144  *
 145  * The payload starts at offset SVE_PT_FPSIMD_OFFSET, and is of type
 146  * struct user_fpsimd_state.  Additional data might be appended in the
 147  * future: use SVE_PT_FPSIMD_SIZE(vq, flags) to compute the total size.
 148  * SVE_PT_FPSIMD_SIZE(vq, flags) will never be less than
 149  * sizeof(struct user_fpsimd_state).
 150  */
 151
 152 #define SVE_PT_FPSIMD_OFFSET            SVE_PT_REGS_OFFSET
 153
 154 #define SVE_PT_FPSIMD_SIZE(vq, flags)   (sizeof(struct user_fpsimd_state))
 155
 156 /*
 157  * (flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE case:
 158  *
 159  * The payload starts at offset SVE_PT_SVE_OFFSET, and is of size
 160  * SVE_PT_SVE_SIZE(vq, flags).
 161  *
 162  * Additional macros describe the contents and layout of the payload.
 163  * For each, SVE_PT_SVE_x_OFFSET(args) is the start offset relative to
 164  * the start of struct user_sve_header, and SVE_PT_SVE_x_SIZE(args) is
 165  * the size in bytes:
 166  *
 167  *      x       type                            description
 168  *      -       ----                            -----------
 169  *      ZREGS           \
 170  *      ZREG            |
 171  *      PREGS           | refer to <asm/sigcontext.h>
 172  *      PREG            |
 173  *      FFR             /
 174  *
 175  *      FPSR    uint32_t                        FPSR
 176  *      FPCR    uint32_t                        FPCR
 177  *
 178  * Additional data might be appended in the future.
 179  *
 180  * The Z-, P- and FFR registers are represented in memory in an endianness-
 181  * invariant layout which differs from the layout used for the FPSIMD
 182  * V-registers on big-endian systems: see sigcontext.h for more explanation.
 183  */
 184
 185 #define SVE_PT_SVE_ZREG_SIZE(vq)        __SVE_ZREG_SIZE(vq)
 186 #define SVE_PT_SVE_PREG_SIZE(vq)        __SVE_PREG_SIZE(vq)
 187 #define SVE_PT_SVE_FFR_SIZE(vq)         __SVE_FFR_SIZE(vq)
 188 #define SVE_PT_SVE_FPSR_SIZE            sizeof(__u32)
 189 #define SVE_PT_SVE_FPCR_SIZE            sizeof(__u32)
 190
 191 #define SVE_PT_SVE_OFFSET               SVE_PT_REGS_OFFSET
 192
 193 #define SVE_PT_SVE_ZREGS_OFFSET \
 194         (SVE_PT_REGS_OFFSET + __SVE_ZREGS_OFFSET)
 195 #define SVE_PT_SVE_ZREG_OFFSET(vq, n) \
 196         (SVE_PT_REGS_OFFSET + __SVE_ZREG_OFFSET(vq, n))
 197 #define SVE_PT_SVE_ZREGS_SIZE(vq) \
 198         (SVE_PT_SVE_ZREG_OFFSET(vq, __SVE_NUM_ZREGS) - SVE_PT_SVE_ZREGS_OFFSET)
 199
 200 #define SVE_PT_SVE_PREGS_OFFSET(vq) \
 201         (SVE_PT_REGS_OFFSET + __SVE_PREGS_OFFSET(vq))
 202 #define SVE_PT_SVE_PREG_OFFSET(vq, n) \
 203         (SVE_PT_REGS_OFFSET + __SVE_PREG_OFFSET(vq, n))
 204 #define SVE_PT_SVE_PREGS_SIZE(vq) \
 205         (SVE_PT_SVE_PREG_OFFSET(vq, __SVE_NUM_PREGS) - \
 206                 SVE_PT_SVE_PREGS_OFFSET(vq))
 207
 208 #define SVE_PT_SVE_FFR_OFFSET(vq) \
 209         (SVE_PT_REGS_OFFSET + __SVE_FFR_OFFSET(vq))
 210
 211 #define SVE_PT_SVE_FPSR_OFFSET(vq)                              \
 212         ((SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq) + \
 213                         (__SVE_VQ_BYTES - 1))                   \
 214                 / __SVE_VQ_BYTES * __SVE_VQ_BYTES)
 215 #define SVE_PT_SVE_FPCR_OFFSET(vq) \
 216         (SVE_PT_SVE_FPSR_OFFSET(vq) + SVE_PT_SVE_FPSR_SIZE)
 217
 218 /*
 219  * Any future extension appended after FPCR must be aligned to the next
 220  * 128-bit boundary.
 221  */
 222
 223 #define SVE_PT_SVE_SIZE(vq, flags)                                      \
 224         ((SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE             \
 225                         - SVE_PT_SVE_OFFSET + (__SVE_VQ_BYTES - 1))     \
 226                 / __SVE_VQ_BYTES * __SVE_VQ_BYTES)
 227
 228 #define SVE_PT_SIZE(vq, flags)                                          \
 229          (((flags) & SVE_PT_REGS_MASK) == SVE_PT_REGS_SVE ?             \
 230                   SVE_PT_SVE_OFFSET + SVE_PT_SVE_SIZE(vq, flags)        \
 231                 : SVE_PT_FPSIMD_OFFSET + SVE_PT_FPSIMD_SIZE(vq, flags))
 232
 233 /* pointer authentication masks (NT_ARM_PAC_MASK) */
 234
 235 struct user_pac_mask {
 236         __u64           data_mask;
 237         __u64           insn_mask;
 238 };
 239
 240 /* pointer authentication keys (NT_ARM_PACA_KEYS, NT_ARM_PACG_KEYS) */
 241
 242 struct user_pac_address_keys {
 243         __uint128_t     apiakey;
 244         __uint128_t     apibkey;
 245         __uint128_t     apdakey;
 246         __uint128_t     apdbkey;
 247 };
 248
 249 struct user_pac_generic_keys {
 250         __uint128_t     apgakey;
 251 };
 252
 253 #endif /* __ASSEMBLY__ */
 254
 255 #endif /* _UAPI__ASM_PTRACE_H */