drivers/gpu/drm/ast/ast_mode.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  * Parts based on xf86-video-ast
   4  * Copyright (c) 2005 ASPEED Technology Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  *
  26  */
  27 /*
  28  * Authors: Dave Airlie <airlied@redhat.com>
  29  */
  30 #include <linux/export.h>
  31 #include <drm/drmP.h>
  32 #include <drm/drm_crtc.h>
  33 #include <drm/drm_crtc_helper.h>
  34 #include <drm/drm_plane_helper.h>
  35 #include <drm/drm_probe_helper.h>
  36 #include "ast_drv.h"
  37
  38 #include "ast_tables.h"
  39
  40 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev);
  41 static void ast_i2c_destroy(struct ast_i2c_chan *i2c);
  42 static int ast_cursor_set(struct drm_crtc *crtc,
  43                           struct drm_file *file_priv,
  44                           uint32_t handle,
  45                           uint32_t width,
  46                           uint32_t height);
  47 static int ast_cursor_move(struct drm_crtc *crtc,
  48                            int x, int y);
  49
  50 static inline void ast_load_palette_index(struct ast_private *ast,
  51                                      u8 index, u8 red, u8 green,
  52                                      u8 blue)
  53 {
  54         ast_io_write8(ast, AST_IO_DAC_INDEX_WRITE, index);
  55         ast_io_read8(ast, AST_IO_SEQ_PORT);
  56         ast_io_write8(ast, AST_IO_DAC_DATA, red);
  57         ast_io_read8(ast, AST_IO_SEQ_PORT);
  58         ast_io_write8(ast, AST_IO_DAC_DATA, green);
  59         ast_io_read8(ast, AST_IO_SEQ_PORT);
  60         ast_io_write8(ast, AST_IO_DAC_DATA, blue);
  61         ast_io_read8(ast, AST_IO_SEQ_PORT);
  62 }
  63
  64 static void ast_crtc_load_lut(struct drm_crtc *crtc)
  65 {
  66         struct ast_private *ast = crtc->dev->dev_private;
  67         u16 *r, *g, *b;
  68         int i;
  69
  70         if (!crtc->enabled)
  71                 return;
  72
  73         r = crtc->gamma_store;
  74         g = r + crtc->gamma_size;
  75         b = g + crtc->gamma_size;
  76
  77         for (i = 0; i < 256; i++)
  78                 ast_load_palette_index(ast, i, *r++ >> 8, *g++ >> 8, *b++ >> 8);
  79 }
  80
  81 static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mode *mode,
  82                                     struct drm_display_mode *adjusted_mode,
  83                                     struct ast_vbios_mode_info *vbios_mode)
  84 {
  85         struct ast_private *ast = crtc->dev->dev_private;
  86         const struct drm_framebuffer *fb = crtc->primary->fb;
  87         u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
  88         const struct ast_vbios_enhtable *best = NULL;
  89         u32 hborder, vborder;
  90         bool check_sync;
  91
  92         switch (fb->format->cpp[0] * 8) {
  93         case 8:
  94                 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
  95                 color_index = VGAModeIndex - 1;
  96                 break;
  97         case 16:
  98                 vbios_mode->std_table = &vbios_stdtable[HiCModeIndex];
  99                 color_index = HiCModeIndex;
 100                 break;
 101         case 24:
 102         case 32:
 103                 vbios_mode->std_table = &vbios_stdtable[TrueCModeIndex];
 104                 color_index = TrueCModeIndex;
 105                 break;
 106         default:
 107                 return false;
 108         }
 109
 110         switch (crtc->mode.crtc_hdisplay) {
 111         case 640:
 112                 vbios_mode->enh_table = &res_640x480[refresh_rate_index];
 113                 break;
 114         case 800:
 115                 vbios_mode->enh_table = &res_800x600[refresh_rate_index];
 116                 break;
 117         case 1024:
 118                 vbios_mode->enh_table = &res_1024x768[refresh_rate_index];
 119                 break;
 120         case 1280:
 121                 if (crtc->mode.crtc_vdisplay == 800)
 122                         vbios_mode->enh_table = &res_1280x800[refresh_rate_index];
 123                 else
 124                         vbios_mode->enh_table = &res_1280x1024[refresh_rate_index];
 125                 break;
 126         case 1360:
 127                 vbios_mode->enh_table = &res_1360x768[refresh_rate_index];
 128                 break;
 129         case 1440:
 130                 vbios_mode->enh_table = &res_1440x900[refresh_rate_index];
 131                 break;
 132         case 1600:
 133                 if (crtc->mode.crtc_vdisplay == 900)
 134                         vbios_mode->enh_table = &res_1600x900[refresh_rate_index];
 135                 else
 136                         vbios_mode->enh_table = &res_1600x1200[refresh_rate_index];
 137                 break;
 138         case 1680:
 139                 vbios_mode->enh_table = &res_1680x1050[refresh_rate_index];
 140                 break;
 141         case 1920:
 142                 if (crtc->mode.crtc_vdisplay == 1080)
 143                         vbios_mode->enh_table = &res_1920x1080[refresh_rate_index];
 144                 else
 145                         vbios_mode->enh_table = &res_1920x1200[refresh_rate_index];
 146                 break;
 147         default:
 148                 return false;
 149         }
 150
 151         refresh_rate = drm_mode_vrefresh(mode);
 152         check_sync = vbios_mode->enh_table->flags & WideScreenMode;
 153         do {
 154                 const struct ast_vbios_enhtable *loop = vbios_mode->enh_table;
 155
 156                 while (loop->refresh_rate != 0xff) {
 157                         if ((check_sync) &&
 158                             (((mode->flags & DRM_MODE_FLAG_NVSYNC)  &&
 159                               (loop->flags & PVSync))  ||
 160                              ((mode->flags & DRM_MODE_FLAG_PVSYNC)  &&
 161                               (loop->flags & NVSync))  ||
 162                              ((mode->flags & DRM_MODE_FLAG_NHSYNC)  &&
 163                               (loop->flags & PHSync))  ||
 164                              ((mode->flags & DRM_MODE_FLAG_PHSYNC)  &&
 165                               (loop->flags & NHSync)))) {
 166                                 loop++;
 167                                 continue;
 168                         }
 169                         if (loop->refresh_rate <= refresh_rate
 170                             && (!best || loop->refresh_rate > best->refresh_rate))
 171                                 best = loop;
 172                         loop++;
 173                 }
 174                 if (best || !check_sync)
 175                         break;
 176                 check_sync = 0;
 177         } while (1);
 178         if (best)
 179                 vbios_mode->enh_table = best;
 180
 181         hborder = (vbios_mode->enh_table->flags & HBorder) ? 8 : 0;
 182         vborder = (vbios_mode->enh_table->flags & VBorder) ? 8 : 0;
 183
 184         adjusted_mode->crtc_htotal = vbios_mode->enh_table->ht;
 185         adjusted_mode->crtc_hblank_start = vbios_mode->enh_table->hde + hborder;
 186         adjusted_mode->crtc_hblank_end = vbios_mode->enh_table->ht - hborder;
 187         adjusted_mode->crtc_hsync_start = vbios_mode->enh_table->hde + hborder +
 188                 vbios_mode->enh_table->hfp;
 189         adjusted_mode->crtc_hsync_end = (vbios_mode->enh_table->hde + hborder +
 190                                          vbios_mode->enh_table->hfp +
 191                                          vbios_mode->enh_table->hsync);
 192
 193         adjusted_mode->crtc_vtotal = vbios_mode->enh_table->vt;
 194         adjusted_mode->crtc_vblank_start = vbios_mode->enh_table->vde + vborder;
 195         adjusted_mode->crtc_vblank_end = vbios_mode->enh_table->vt - vborder;
 196         adjusted_mode->crtc_vsync_start = vbios_mode->enh_table->vde + vborder +
 197                 vbios_mode->enh_table->vfp;
 198         adjusted_mode->crtc_vsync_end = (vbios_mode->enh_table->vde + vborder +
 199                                          vbios_mode->enh_table->vfp +
 200                                          vbios_mode->enh_table->vsync);
 201
 202         refresh_rate_index = vbios_mode->enh_table->refresh_rate_index;
 203         mode_id = vbios_mode->enh_table->mode_id;
 204
 205         if (ast->chip == AST1180) {
 206                 /* TODO 1180 */
 207         } else {
 208                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0xf) << 4));
 209                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);
 210                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
 211
 212                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);
 213                 if (vbios_mode->enh_table->flags & NewModeInfo) {
 214                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
 215                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92,
 216                                           fb->format->cpp[0] * 8);
 217                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
 218                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
 219                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
 220
 221                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);
 222                         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);
 223                 }
 224         }
 225
 226         return true;
 227
 228
 229 }
 230 static void ast_set_std_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 231                             struct ast_vbios_mode_info *vbios_mode)
 232 {
 233         struct ast_private *ast = crtc->dev->dev_private;
 234         const struct ast_vbios_stdtable *stdtable;
 235         u32 i;
 236         u8 jreg;
 237
 238         stdtable = vbios_mode->std_table;
 239
 240         jreg = stdtable->misc;
 241         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 242
 243         /* Set SEQ */
 244         ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);
 245         for (i = 0; i < 4; i++) {
 246                 jreg = stdtable->seq[i];
 247                 if (!i)
 248                         jreg |= 0x20;
 249                 ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1) , jreg);
 250         }
 251
 252         /* Set CRTC */
 253         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 254         for (i = 0; i < 25; i++)
 255                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);
 256
 257         /* set AR */
 258         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 259         for (i = 0; i < 20; i++) {
 260                 jreg = stdtable->ar[i];
 261                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, (u8)i);
 262                 ast_io_write8(ast, AST_IO_AR_PORT_WRITE, jreg);
 263         }
 264         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x14);
 265         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x00);
 266
 267         jreg = ast_io_read8(ast, AST_IO_INPUT_STATUS1_READ);
 268         ast_io_write8(ast, AST_IO_AR_PORT_WRITE, 0x20);
 269
 270         /* Set GR */
 271         for (i = 0; i < 9; i++)
 272                 ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);
 273 }
 274
 275 static void ast_set_crtc_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 276                              struct ast_vbios_mode_info *vbios_mode)
 277 {
 278         struct ast_private *ast = crtc->dev->dev_private;
 279         u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
 280         u16 temp, precache = 0;
 281
 282         if ((ast->chip == AST2500) &&
 283             (vbios_mode->enh_table->flags & AST2500PreCatchCRT))
 284                 precache = 40;
 285
 286         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x00);
 287
 288         temp = (mode->crtc_htotal >> 3) - 5;
 289         if (temp & 0x100)
 290                 jregAC |= 0x01; /* HT D[8] */
 291         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x00, 0x00, temp);
 292
 293         temp = (mode->crtc_hdisplay >> 3) - 1;
 294         if (temp & 0x100)
 295                 jregAC |= 0x04; /* HDE D[8] */
 296         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x01, 0x00, temp);
 297
 298         temp = (mode->crtc_hblank_start >> 3) - 1;
 299         if (temp & 0x100)
 300                 jregAC |= 0x10; /* HBS D[8] */
 301         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x02, 0x00, temp);
 302
 303         temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
 304         if (temp & 0x20)
 305                 jreg05 |= 0x80;  /* HBE D[5] */
 306         if (temp & 0x40)
 307                 jregAD |= 0x01;  /* HBE D[5] */
 308         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x03, 0xE0, (temp & 0x1f));
 309
 310         temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
 311         if (temp & 0x100)
 312                 jregAC |= 0x40; /* HRS D[5] */
 313         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x04, 0x00, temp);
 314
 315         temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
 316         if (temp & 0x20)
 317                 jregAD |= 0x04; /* HRE D[5] */
 318         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
 319
 320         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAC, 0x00, jregAC);
 321         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAD, 0x00, jregAD);
 322
 323         /* vert timings */
 324         temp = (mode->crtc_vtotal) - 2;
 325         if (temp & 0x100)
 326                 jreg07 |= 0x01;
 327         if (temp & 0x200)
 328                 jreg07 |= 0x20;
 329         if (temp & 0x400)
 330                 jregAE |= 0x01;
 331         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x06, 0x00, temp);
 332
 333         temp = (mode->crtc_vsync_start) - 1;
 334         if (temp & 0x100)
 335                 jreg07 |= 0x04;
 336         if (temp & 0x200)
 337                 jreg07 |= 0x80;
 338         if (temp & 0x400)
 339                 jregAE |= 0x08;
 340         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x10, 0x00, temp);
 341
 342         temp = (mode->crtc_vsync_end - 1) & 0x3f;
 343         if (temp & 0x10)
 344                 jregAE |= 0x20;
 345         if (temp & 0x20)
 346                 jregAE |= 0x40;
 347         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x70, temp & 0xf);
 348
 349         temp = mode->crtc_vdisplay - 1;
 350         if (temp & 0x100)
 351                 jreg07 |= 0x02;
 352         if (temp & 0x200)
 353                 jreg07 |= 0x40;
 354         if (temp & 0x400)
 355                 jregAE |= 0x02;
 356         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x12, 0x00, temp);
 357
 358         temp = mode->crtc_vblank_start - 1;
 359         if (temp & 0x100)
 360                 jreg07 |= 0x08;
 361         if (temp & 0x200)
 362                 jreg09 |= 0x20;
 363         if (temp & 0x400)
 364                 jregAE |= 0x04;
 365         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x15, 0x00, temp);
 366
 367         temp = mode->crtc_vblank_end - 1;
 368         if (temp & 0x100)
 369                 jregAE |= 0x10;
 370         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x16, 0x00, temp);
 371
 372         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x07, 0x00, jreg07);
 373         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x09, 0xdf, jreg09);
 374         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xAE, 0x00, (jregAE | 0x80));
 375
 376         if (precache)
 377                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x80);
 378         else
 379                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0x3f, 0x00);
 380
 381         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x11, 0x7f, 0x80);
 382 }
 383
 384 static void ast_set_offset_reg(struct drm_crtc *crtc)
 385 {
 386         struct ast_private *ast = crtc->dev->dev_private;
 387         const struct drm_framebuffer *fb = crtc->primary->fb;
 388
 389         u16 offset;
 390
 391         offset = fb->pitches[0] >> 3;
 392         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
 393         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
 394 }
 395
 396 static void ast_set_dclk_reg(struct drm_device *dev, struct drm_display_mode *mode,
 397                              struct ast_vbios_mode_info *vbios_mode)
 398 {
 399         struct ast_private *ast = dev->dev_private;
 400         const struct ast_vbios_dclk_info *clk_info;
 401
 402         if (ast->chip == AST2500)
 403                 clk_info = &dclk_table_ast2500[vbios_mode->enh_table->dclk_index];
 404         else
 405                 clk_info = &dclk_table[vbios_mode->enh_table->dclk_index];
 406
 407         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc0, 0x00, clk_info->param1);
 408         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xc1, 0x00, clk_info->param2);
 409         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xbb, 0x0f,
 410                                (clk_info->param3 & 0xc0) |
 411                                ((clk_info->param3 & 0x3) << 4));
 412 }
 413
 414 static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 415                              struct ast_vbios_mode_info *vbios_mode)
 416 {
 417         struct ast_private *ast = crtc->dev->dev_private;
 418         const struct drm_framebuffer *fb = crtc->primary->fb;
 419         u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
 420
 421         switch (fb->format->cpp[0] * 8) {
 422         case 8:
 423                 jregA0 = 0x70;
 424                 jregA3 = 0x01;
 425                 jregA8 = 0x00;
 426                 break;
 427         case 15:
 428         case 16:
 429                 jregA0 = 0x70;
 430                 jregA3 = 0x04;
 431                 jregA8 = 0x02;
 432                 break;
 433         case 32:
 434                 jregA0 = 0x70;
 435                 jregA3 = 0x08;
 436                 jregA8 = 0x02;
 437                 break;
 438         }
 439
 440         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa0, 0x8f, jregA0);
 441         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xf0, jregA3);
 442         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa8, 0xfd, jregA8);
 443
 444         /* Set Threshold */
 445         if (ast->chip == AST2300 || ast->chip == AST2400 ||
 446             ast->chip == AST2500) {
 447                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);
 448                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);
 449         } else if (ast->chip == AST2100 ||
 450                    ast->chip == AST1100 ||
 451                    ast->chip == AST2200 ||
 452                    ast->chip == AST2150) {
 453                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);
 454                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);
 455         } else {
 456                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);
 457                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);
 458         }
 459 }
 460
 461 static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mode,
 462                       struct ast_vbios_mode_info *vbios_mode)
 463 {
 464         struct ast_private *ast = dev->dev_private;
 465         u8 jreg;
 466
 467         jreg  = ast_io_read8(ast, AST_IO_MISC_PORT_READ);
 468         jreg &= ~0xC0;
 469         if (vbios_mode->enh_table->flags & NVSync) jreg |= 0x80;
 470         if (vbios_mode->enh_table->flags & NHSync) jreg |= 0x40;
 471         ast_io_write8(ast, AST_IO_MISC_PORT_WRITE, jreg);
 472 }
 473
 474 static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
 475                      struct ast_vbios_mode_info *vbios_mode)
 476 {
 477         const struct drm_framebuffer *fb = crtc->primary->fb;
 478
 479         switch (fb->format->cpp[0] * 8) {
 480         case 8:
 481                 break;
 482         default:
 483                 return false;
 484         }
 485         return true;
 486 }
 487
 488 static void ast_set_start_address_crt1(struct drm_crtc *crtc, unsigned offset)
 489 {
 490         struct ast_private *ast = crtc->dev->dev_private;
 491         u32 addr;
 492
 493         addr = offset >> 2;
 494         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));
 495         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));
 496         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));
 497
 498 }
 499
 500 static void ast_crtc_dpms(struct drm_crtc *crtc, int mode)
 501 {
 502         struct ast_private *ast = crtc->dev->dev_private;
 503
 504         if (ast->chip == AST1180)
 505                 return;
 506
 507         switch (mode) {
 508         case DRM_MODE_DPMS_ON:
 509         case DRM_MODE_DPMS_STANDBY:
 510         case DRM_MODE_DPMS_SUSPEND:
 511                 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
 512                 if (ast->tx_chip_type == AST_TX_DP501)
 513                         ast_set_dp501_video_output(crtc->dev, 1);
 514                 ast_crtc_load_lut(crtc);
 515                 break;
 516         case DRM_MODE_DPMS_OFF:
 517                 if (ast->tx_chip_type == AST_TX_DP501)
 518                         ast_set_dp501_video_output(crtc->dev, 0);
 519                 ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0x20);
 520                 break;
 521         }
 522 }
 523
 524 static int ast_crtc_do_set_base(struct drm_crtc *crtc,
 525                                 struct drm_framebuffer *fb,
 526                                 int x, int y, int atomic)
 527 {
 528         struct ast_private *ast = crtc->dev->dev_private;
 529         struct drm_gem_object *obj;
 530         struct ast_framebuffer *ast_fb;
 531         struct drm_gem_vram_object *gbo;
 532         int ret;
 533         s64 gpu_addr;
 534         void *base;
 535
 536         if (!atomic && fb) {
 537                 ast_fb = to_ast_framebuffer(fb);
 538                 obj = ast_fb->obj;
 539                 gbo = drm_gem_vram_of_gem(obj);
 540
 541                 /* unmap if console */
 542                 if (&ast->fbdev->afb == ast_fb)
 543                         drm_gem_vram_kunmap(gbo);
 544                 drm_gem_vram_unpin(gbo);
 545         }
 546
 547         ast_fb = to_ast_framebuffer(crtc->primary->fb);
 548         obj = ast_fb->obj;
 549         gbo = drm_gem_vram_of_gem(obj);
 550
 551         ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM);
 552         if (ret)
 553                 return ret;
 554         gpu_addr = drm_gem_vram_offset(gbo);
 555         if (gpu_addr < 0) {
 556                 ret = (int)gpu_addr;
 557                 goto err_drm_gem_vram_unpin;
 558         }
 559
 560         if (&ast->fbdev->afb == ast_fb) {
 561                 /* if pushing console in kmap it */
 562                 base = drm_gem_vram_kmap(gbo, true, NULL);
 563                 if (IS_ERR(base)) {
 564                         ret = PTR_ERR(base);
 565                         DRM_ERROR("failed to kmap fbcon\n");
 566                 } else {
 567                         ast_fbdev_set_base(ast, gpu_addr);
 568                 }
 569         }
 570
 571         ast_set_offset_reg(crtc);
 572         ast_set_start_address_crt1(crtc, (u32)gpu_addr);
 573
 574         return 0;
 575
 576 err_drm_gem_vram_unpin:
 577         drm_gem_vram_unpin(gbo);
 578         return ret;
 579 }
 580
 581 static int ast_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
 582                              struct drm_framebuffer *old_fb)
 583 {
 584         return ast_crtc_do_set_base(crtc, old_fb, x, y, 0);
 585 }
 586
 587 static int ast_crtc_mode_set(struct drm_crtc *crtc,
 588                              struct drm_display_mode *mode,
 589                              struct drm_display_mode *adjusted_mode,
 590                              int x, int y,
 591                              struct drm_framebuffer *old_fb)
 592 {
 593         struct drm_device *dev = crtc->dev;
 594         struct ast_private *ast = crtc->dev->dev_private;
 595         struct ast_vbios_mode_info vbios_mode;
 596         bool ret;
 597         if (ast->chip == AST1180) {
 598                 DRM_ERROR("AST 1180 modesetting not supported\n");
 599                 return -EINVAL;
 600         }
 601
 602         ret = ast_get_vbios_mode_info(crtc, mode, adjusted_mode, &vbios_mode);
 603         if (ret == false)
 604                 return -EINVAL;
 605         ast_open_key(ast);
 606
 607         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);
 608
 609         ast_set_std_reg(crtc, adjusted_mode, &vbios_mode);
 610         ast_set_crtc_reg(crtc, adjusted_mode, &vbios_mode);
 611         ast_set_offset_reg(crtc);
 612         ast_set_dclk_reg(dev, adjusted_mode, &vbios_mode);
 613         ast_set_ext_reg(crtc, adjusted_mode, &vbios_mode);
 614         ast_set_sync_reg(dev, adjusted_mode, &vbios_mode);
 615         ast_set_dac_reg(crtc, adjusted_mode, &vbios_mode);
 616
 617         ast_crtc_mode_set_base(crtc, x, y, old_fb);
 618
 619         return 0;
 620 }
 621
 622 static void ast_crtc_disable(struct drm_crtc *crtc)
 623 {
 624         DRM_DEBUG_KMS("\n");
 625         ast_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
 626         if (crtc->primary->fb) {
 627                 struct ast_private *ast = crtc->dev->dev_private;
 628                 struct ast_framebuffer *ast_fb = to_ast_framebuffer(crtc->primary->fb);
 629                 struct drm_gem_object *obj = ast_fb->obj;
 630                 struct drm_gem_vram_object *gbo = drm_gem_vram_of_gem(obj);
 631
 632                 /* unmap if console */
 633                 if (&ast->fbdev->afb == ast_fb)
 634                         drm_gem_vram_kunmap(gbo);
 635                 drm_gem_vram_unpin(gbo);
 636         }
 637         crtc->primary->fb = NULL;
 638 }
 639
 640 static void ast_crtc_prepare(struct drm_crtc *crtc)
 641 {
 642
 643 }
 644
 645 static void ast_crtc_commit(struct drm_crtc *crtc)
 646 {
 647         struct ast_private *ast = crtc->dev->dev_private;
 648         ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);
 649         ast_crtc_load_lut(crtc);
 650 }
 651
 652
 653 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
 654         .dpms = ast_crtc_dpms,
 655         .mode_set = ast_crtc_mode_set,
 656         .mode_set_base = ast_crtc_mode_set_base,
 657         .disable = ast_crtc_disable,
 658         .prepare = ast_crtc_prepare,
 659         .commit = ast_crtc_commit,
 660
 661 };
 662
 663 static void ast_crtc_reset(struct drm_crtc *crtc)
 664 {
 665
 666 }
 667
 668 static int ast_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
 669                               u16 *blue, uint32_t size,
 670                               struct drm_modeset_acquire_ctx *ctx)
 671 {
 672         ast_crtc_load_lut(crtc);
 673
 674         return 0;
 675 }
 676
 677
 678 static void ast_crtc_destroy(struct drm_crtc *crtc)
 679 {
 680         drm_crtc_cleanup(crtc);
 681         kfree(crtc);
 682 }
 683
 684 static const struct drm_crtc_funcs ast_crtc_funcs = {
 685         .cursor_set = ast_cursor_set,
 686         .cursor_move = ast_cursor_move,
 687         .reset = ast_crtc_reset,
 688         .set_config = drm_crtc_helper_set_config,
 689         .gamma_set = ast_crtc_gamma_set,
 690         .destroy = ast_crtc_destroy,
 691 };
 692
 693 static int ast_crtc_init(struct drm_device *dev)
 694 {
 695         struct ast_crtc *crtc;
 696
 697         crtc = kzalloc(sizeof(struct ast_crtc), GFP_KERNEL);
 698         if (!crtc)
 699                 return -ENOMEM;
 700
 701         drm_crtc_init(dev, &crtc->base, &ast_crtc_funcs);
 702         drm_mode_crtc_set_gamma_size(&crtc->base, 256);
 703         drm_crtc_helper_add(&crtc->base, &ast_crtc_helper_funcs);
 704         return 0;
 705 }
 706
 707 static void ast_encoder_destroy(struct drm_encoder *encoder)
 708 {
 709         drm_encoder_cleanup(encoder);
 710         kfree(encoder);
 711 }
 712
 713
 714 static struct drm_encoder *ast_best_single_encoder(struct drm_connector *connector)
 715 {
 716         int enc_id = connector->encoder_ids[0];
 717         /* pick the encoder ids */
 718         if (enc_id)
 719                 return drm_encoder_find(connector->dev, NULL, enc_id);
 720         return NULL;
 721 }
 722
 723
 724 static const struct drm_encoder_funcs ast_enc_funcs = {
 725         .destroy = ast_encoder_destroy,
 726 };
 727
 728 static void ast_encoder_dpms(struct drm_encoder *encoder, int mode)
 729 {
 730
 731 }
 732
 733 static void ast_encoder_mode_set(struct drm_encoder *encoder,
 734                                struct drm_display_mode *mode,
 735                                struct drm_display_mode *adjusted_mode)
 736 {
 737 }
 738
 739 static void ast_encoder_prepare(struct drm_encoder *encoder)
 740 {
 741
 742 }
 743
 744 static void ast_encoder_commit(struct drm_encoder *encoder)
 745 {
 746
 747 }
 748
 749
 750 static const struct drm_encoder_helper_funcs ast_enc_helper_funcs = {
 751         .dpms = ast_encoder_dpms,
 752         .prepare = ast_encoder_prepare,
 753         .commit = ast_encoder_commit,
 754         .mode_set = ast_encoder_mode_set,
 755 };
 756
 757 static int ast_encoder_init(struct drm_device *dev)
 758 {
 759         struct ast_encoder *ast_encoder;
 760
 761         ast_encoder = kzalloc(sizeof(struct ast_encoder), GFP_KERNEL);
 762         if (!ast_encoder)
 763                 return -ENOMEM;
 764
 765         drm_encoder_init(dev, &ast_encoder->base, &ast_enc_funcs,
 766                          DRM_MODE_ENCODER_DAC, NULL);
 767         drm_encoder_helper_add(&ast_encoder->base, &ast_enc_helper_funcs);
 768
 769         ast_encoder->base.possible_crtcs = 1;
 770         return 0;
 771 }
 772
 773 static int ast_get_modes(struct drm_connector *connector)
 774 {
 775         struct ast_connector *ast_connector = to_ast_connector(connector);
 776         struct ast_private *ast = connector->dev->dev_private;
 777         struct edid *edid;
 778         int ret;
 779         bool flags = false;
 780         if (ast->tx_chip_type == AST_TX_DP501) {
 781                 ast->dp501_maxclk = 0xff;
 782                 edid = kmalloc(128, GFP_KERNEL);
 783                 if (!edid)
 784                         return -ENOMEM;
 785
 786                 flags = ast_dp501_read_edid(connector->dev, (u8 *)edid);
 787                 if (flags)
 788                         ast->dp501_maxclk = ast_get_dp501_max_clk(connector->dev);
 789                 else
 790                         kfree(edid);
 791         }
 792         if (!flags)
 793                 edid = drm_get_edid(connector, &ast_connector->i2c->adapter);
 794         if (edid) {
 795                 drm_connector_update_edid_property(&ast_connector->base, edid);
 796                 ret = drm_add_edid_modes(connector, edid);
 797                 kfree(edid);
 798                 return ret;
 799         } else
 800                 drm_connector_update_edid_property(&ast_connector->base, NULL);
 801         return 0;
 802 }
 803
 804 static enum drm_mode_status ast_mode_valid(struct drm_connector *connector,
 805                           struct drm_display_mode *mode)
 806 {
 807         struct ast_private *ast = connector->dev->dev_private;
 808         int flags = MODE_NOMODE;
 809         uint32_t jtemp;
 810
 811         if (ast->support_wide_screen) {
 812                 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050))
 813                         return MODE_OK;
 814                 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800))
 815                         return MODE_OK;
 816                 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900))
 817                         return MODE_OK;
 818                 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768))
 819                         return MODE_OK;
 820                 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900))
 821                         return MODE_OK;
 822
 823                 if ((ast->chip == AST2100) || (ast->chip == AST2200) ||
 824                     (ast->chip == AST2300) || (ast->chip == AST2400) ||
 825                     (ast->chip == AST2500) || (ast->chip == AST1180)) {
 826                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080))
 827                                 return MODE_OK;
 828
 829                         if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) {
 830                                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
 831                                 if (jtemp & 0x01)
 832                                         return MODE_NOMODE;
 833                                 else
 834                                         return MODE_OK;
 835                         }
 836                 }
 837         }
 838         switch (mode->hdisplay) {
 839         case 640:
 840                 if (mode->vdisplay == 480) flags = MODE_OK;
 841                 break;
 842         case 800:
 843                 if (mode->vdisplay == 600) flags = MODE_OK;
 844                 break;
 845         case 1024:
 846                 if (mode->vdisplay == 768) flags = MODE_OK;
 847                 break;
 848         case 1280:
 849                 if (mode->vdisplay == 1024) flags = MODE_OK;
 850                 break;
 851         case 1600:
 852                 if (mode->vdisplay == 1200) flags = MODE_OK;
 853                 break;
 854         default:
 855                 return flags;
 856         }
 857
 858         return flags;
 859 }
 860
 861 static void ast_connector_destroy(struct drm_connector *connector)
 862 {
 863         struct ast_connector *ast_connector = to_ast_connector(connector);
 864         ast_i2c_destroy(ast_connector->i2c);
 865         drm_connector_unregister(connector);
 866         drm_connector_cleanup(connector);
 867         kfree(connector);
 868 }
 869
 870 static const struct drm_connector_helper_funcs ast_connector_helper_funcs = {
 871         .mode_valid = ast_mode_valid,
 872         .get_modes = ast_get_modes,
 873         .best_encoder = ast_best_single_encoder,
 874 };
 875
 876 static const struct drm_connector_funcs ast_connector_funcs = {
 877         .dpms = drm_helper_connector_dpms,
 878         .fill_modes = drm_helper_probe_single_connector_modes,
 879         .destroy = ast_connector_destroy,
 880 };
 881
 882 static int ast_connector_init(struct drm_device *dev)
 883 {
 884         struct ast_connector *ast_connector;
 885         struct drm_connector *connector;
 886         struct drm_encoder *encoder;
 887
 888         ast_connector = kzalloc(sizeof(struct ast_connector), GFP_KERNEL);
 889         if (!ast_connector)
 890                 return -ENOMEM;
 891
 892         connector = &ast_connector->base;
 893         drm_connector_init(dev, connector, &ast_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 894
 895         drm_connector_helper_add(connector, &ast_connector_helper_funcs);
 896
 897         connector->interlace_allowed = 0;
 898         connector->doublescan_allowed = 0;
 899
 900         drm_connector_register(connector);
 901
 902         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 903
 904         encoder = list_first_entry(&dev->mode_config.encoder_list, struct drm_encoder, head);
 905         drm_connector_attach_encoder(connector, encoder);
 906
 907         ast_connector->i2c = ast_i2c_create(dev);
 908         if (!ast_connector->i2c)
 909                 DRM_ERROR("failed to add ddc bus for connector\n");
 910
 911         return 0;
 912 }
 913
 914 /* allocate cursor cache and pin at start of VRAM */
 915 static int ast_cursor_init(struct drm_device *dev)
 916 {
 917         struct ast_private *ast = dev->dev_private;
 918         int size;
 919         int ret;
 920         struct drm_gem_object *obj;
 921         struct drm_gem_vram_object *gbo;
 922         s64 gpu_addr;
 923         void *base;
 924
 925         size = (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE) * AST_DEFAULT_HWC_NUM;
 926
 927         ret = ast_gem_create(dev, size, true, &obj);
 928         if (ret)
 929                 return ret;
 930         gbo = drm_gem_vram_of_gem(obj);
 931         ret = drm_gem_vram_pin(gbo, DRM_GEM_VRAM_PL_FLAG_VRAM);
 932         if (ret)
 933                 goto fail;
 934         gpu_addr = drm_gem_vram_offset(gbo);
 935         if (gpu_addr < 0) {
 936                 drm_gem_vram_unpin(gbo);
 937                 ret = (int)gpu_addr;
 938                 goto fail;
 939         }
 940
 941         /* kmap the object */
 942         base = drm_gem_vram_kmap(gbo, true, NULL);
 943         if (IS_ERR(base)) {
 944                 ret = PTR_ERR(base);
 945                 goto fail;
 946         }
 947
 948         ast->cursor_cache = obj;
 949         return 0;
 950 fail:
 951         return ret;
 952 }
 953
 954 static void ast_cursor_fini(struct drm_device *dev)
 955 {
 956         struct ast_private *ast = dev->dev_private;
 957         struct drm_gem_vram_object *gbo =
 958                 drm_gem_vram_of_gem(ast->cursor_cache);
 959         drm_gem_vram_kunmap(gbo);
 960         drm_gem_vram_unpin(gbo);
 961         drm_gem_object_put_unlocked(ast->cursor_cache);
 962 }
 963
 964 int ast_mode_init(struct drm_device *dev)
 965 {
 966         ast_cursor_init(dev);
 967         ast_crtc_init(dev);
 968         ast_encoder_init(dev);
 969         ast_connector_init(dev);
 970         return 0;
 971 }
 972
 973 void ast_mode_fini(struct drm_device *dev)
 974 {
 975         ast_cursor_fini(dev);
 976 }
 977
 978 static int get_clock(void *i2c_priv)
 979 {
 980         struct ast_i2c_chan *i2c = i2c_priv;
 981         struct ast_private *ast = i2c->dev->dev_private;
 982         uint32_t val, val2, count, pass;
 983
 984         count = 0;
 985         pass = 0;
 986         val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
 987         do {
 988                 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
 989                 if (val == val2) {
 990                         pass++;
 991                 } else {
 992                         pass = 0;
 993                         val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x10) >> 4) & 0x01;
 994                 }
 995         } while ((pass < 5) && (count++ < 0x10000));
 996
 997         return val & 1 ? 1 : 0;
 998 }
 999
1000 static int get_data(void *i2c_priv)
1001 {
1002         struct ast_i2c_chan *i2c = i2c_priv;
1003         struct ast_private *ast = i2c->dev->dev_private;
1004         uint32_t val, val2, count, pass;
1005
1006         count = 0;
1007         pass = 0;
1008         val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1009         do {
1010                 val2 = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1011                 if (val == val2) {
1012                         pass++;
1013                 } else {
1014                         pass = 0;
1015                         val = (ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x20) >> 5) & 0x01;
1016                 }
1017         } while ((pass < 5) && (count++ < 0x10000));
1018
1019         return val & 1 ? 1 : 0;
1020 }
1021
1022 static void set_clock(void *i2c_priv, int clock)
1023 {
1024         struct ast_i2c_chan *i2c = i2c_priv;
1025         struct ast_private *ast = i2c->dev->dev_private;
1026         int i;
1027         u8 ujcrb7, jtemp;
1028
1029         for (i = 0; i < 0x10000; i++) {
1030                 ujcrb7 = ((clock & 0x01) ? 0 : 1);
1031                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf4, ujcrb7);
1032                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x01);
1033                 if (ujcrb7 == jtemp)
1034                         break;
1035         }
1036 }
1037
1038 static void set_data(void *i2c_priv, int data)
1039 {
1040         struct ast_i2c_chan *i2c = i2c_priv;
1041         struct ast_private *ast = i2c->dev->dev_private;
1042         int i;
1043         u8 ujcrb7, jtemp;
1044
1045         for (i = 0; i < 0x10000; i++) {
1046                 ujcrb7 = ((data & 0x01) ? 0 : 1) << 2;
1047                 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0xf1, ujcrb7);
1048                 jtemp = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x04);
1049                 if (ujcrb7 == jtemp)
1050                         break;
1051         }
1052 }
1053
1054 static struct ast_i2c_chan *ast_i2c_create(struct drm_device *dev)
1055 {
1056         struct ast_i2c_chan *i2c;
1057         int ret;
1058
1059         i2c = kzalloc(sizeof(struct ast_i2c_chan), GFP_KERNEL);
1060         if (!i2c)
1061                 return NULL;
1062
1063         i2c->adapter.owner = THIS_MODULE;
1064         i2c->adapter.class = I2C_CLASS_DDC;
1065         i2c->adapter.dev.parent = &dev->pdev->dev;
1066         i2c->dev = dev;
1067         i2c_set_adapdata(&i2c->adapter, i2c);
1068         snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
1069                  "AST i2c bit bus");
1070         i2c->adapter.algo_data = &i2c->bit;
1071
1072         i2c->bit.udelay = 20;
1073         i2c->bit.timeout = 2;
1074         i2c->bit.data = i2c;
1075         i2c->bit.setsda = set_data;
1076         i2c->bit.setscl = set_clock;
1077         i2c->bit.getsda = get_data;
1078         i2c->bit.getscl = get_clock;
1079         ret = i2c_bit_add_bus(&i2c->adapter);
1080         if (ret) {
1081                 DRM_ERROR("Failed to register bit i2c\n");
1082                 goto out_free;
1083         }
1084
1085         return i2c;
1086 out_free:
1087         kfree(i2c);
1088         return NULL;
1089 }
1090
1091 static void ast_i2c_destroy(struct ast_i2c_chan *i2c)
1092 {
1093         if (!i2c)
1094                 return;
1095         i2c_del_adapter(&i2c->adapter);
1096         kfree(i2c);
1097 }
1098
1099 static void ast_show_cursor(struct drm_crtc *crtc)
1100 {
1101         struct ast_private *ast = crtc->dev->dev_private;
1102         u8 jreg;
1103
1104         jreg = 0x2;
1105         /* enable ARGB cursor */
1106         jreg |= 1;
1107         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, jreg);
1108 }
1109
1110 static void ast_hide_cursor(struct drm_crtc *crtc)
1111 {
1112         struct ast_private *ast = crtc->dev->dev_private;
1113         ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xcb, 0xfc, 0x00);
1114 }
1115
1116 static u32 copy_cursor_image(u8 *src, u8 *dst, int width, int height)
1117 {
1118         union {
1119                 u32 ul;
1120                 u8 b[4];
1121         } srcdata32[2], data32;
1122         union {
1123                 u16 us;
1124                 u8 b[2];
1125         } data16;
1126         u32 csum = 0;
1127         s32 alpha_dst_delta, last_alpha_dst_delta;
1128         u8 *srcxor, *dstxor;
1129         int i, j;
1130         u32 per_pixel_copy, two_pixel_copy;
1131
1132         alpha_dst_delta = AST_MAX_HWC_WIDTH << 1;
1133         last_alpha_dst_delta = alpha_dst_delta - (width << 1);
1134
1135         srcxor = src;
1136         dstxor = (u8 *)dst + last_alpha_dst_delta + (AST_MAX_HWC_HEIGHT - height) * alpha_dst_delta;
1137         per_pixel_copy = width & 1;
1138         two_pixel_copy = width >> 1;
1139
1140         for (j = 0; j < height; j++) {
1141                 for (i = 0; i < two_pixel_copy; i++) {
1142                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1143                         srcdata32[1].ul = *((u32 *)(srcxor + 4)) & 0xf0f0f0f0;
1144                         data32.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1145                         data32.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1146                         data32.b[2] = srcdata32[1].b[1] | (srcdata32[1].b[0] >> 4);
1147                         data32.b[3] = srcdata32[1].b[3] | (srcdata32[1].b[2] >> 4);
1148
1149                         writel(data32.ul, dstxor);
1150                         csum += data32.ul;
1151
1152                         dstxor += 4;
1153                         srcxor += 8;
1154
1155                 }
1156
1157                 for (i = 0; i < per_pixel_copy; i++) {
1158                         srcdata32[0].ul = *((u32 *)srcxor) & 0xf0f0f0f0;
1159                         data16.b[0] = srcdata32[0].b[1] | (srcdata32[0].b[0] >> 4);
1160                         data16.b[1] = srcdata32[0].b[3] | (srcdata32[0].b[2] >> 4);
1161                         writew(data16.us, dstxor);
1162                         csum += (u32)data16.us;
1163
1164                         dstxor += 2;
1165                         srcxor += 4;
1166                 }
1167                 dstxor += last_alpha_dst_delta;
1168         }
1169         return csum;
1170 }
1171
1172 static int ast_cursor_set(struct drm_crtc *crtc,
1173                           struct drm_file *file_priv,
1174                           uint32_t handle,
1175                           uint32_t width,
1176                           uint32_t height)
1177 {
1178         struct ast_private *ast = crtc->dev->dev_private;
1179         struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1180         struct drm_gem_object *obj;
1181         struct drm_gem_vram_object *gbo;
1182         s64 dst_gpu;
1183         u64 gpu_addr;
1184         u32 csum;
1185         int ret;
1186         u8 *src, *dst;
1187
1188         if (!handle) {
1189                 ast_hide_cursor(crtc);
1190                 return 0;
1191         }
1192
1193         if (width > AST_MAX_HWC_WIDTH || height > AST_MAX_HWC_HEIGHT)
1194                 return -EINVAL;
1195
1196         obj = drm_gem_object_lookup(file_priv, handle);
1197         if (!obj) {
1198                 DRM_ERROR("Cannot find cursor object %x for crtc\n", handle);
1199                 return -ENOENT;
1200         }
1201         gbo = drm_gem_vram_of_gem(obj);
1202
1203         ret = drm_gem_vram_pin(gbo, 0);
1204         if (ret)
1205                 goto err_drm_gem_object_put_unlocked;
1206         src = drm_gem_vram_kmap(gbo, true, NULL);
1207         if (IS_ERR(src)) {
1208                 ret = PTR_ERR(src);
1209                 goto err_drm_gem_vram_unpin;
1210         }
1211
1212         dst = drm_gem_vram_kmap(drm_gem_vram_of_gem(ast->cursor_cache),
1213                                 false, NULL);
1214         if (IS_ERR(dst)) {
1215                 ret = PTR_ERR(dst);
1216                 goto err_drm_gem_vram_kunmap;
1217         }
1218         dst_gpu = drm_gem_vram_offset(drm_gem_vram_of_gem(ast->cursor_cache));
1219         if (dst_gpu < 0) {
1220                 ret = (int)dst_gpu;
1221                 goto err_drm_gem_vram_kunmap;
1222         }
1223
1224         dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1225
1226         /* do data transfer to cursor cache */
1227         csum = copy_cursor_image(src, dst, width, height);
1228
1229         /* write checksum + signature */
1230         {
1231                 struct drm_gem_vram_object *dst_gbo =
1232                         drm_gem_vram_of_gem(ast->cursor_cache);
1233                 u8 *dst = drm_gem_vram_kmap(dst_gbo, false, NULL);
1234                 dst += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1235                 writel(csum, dst);
1236                 writel(width, dst + AST_HWC_SIGNATURE_SizeX);
1237                 writel(height, dst + AST_HWC_SIGNATURE_SizeY);
1238                 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTX);
1239                 writel(0, dst + AST_HWC_SIGNATURE_HOTSPOTY);
1240
1241                 /* set pattern offset */
1242                 gpu_addr = (u64)dst_gpu;
1243                 gpu_addr += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor;
1244                 gpu_addr >>= 3;
1245                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, gpu_addr & 0xff);
1246                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, (gpu_addr >> 8) & 0xff);
1247                 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, (gpu_addr >> 16) & 0xff);
1248         }
1249         ast_crtc->offset_x = AST_MAX_HWC_WIDTH - width;
1250         ast_crtc->offset_y = AST_MAX_HWC_WIDTH - height;
1251
1252         ast->next_cursor = (ast->next_cursor + 1) % AST_DEFAULT_HWC_NUM;
1253
1254         ast_show_cursor(crtc);
1255
1256         drm_gem_vram_kunmap(gbo);
1257         drm_gem_vram_unpin(gbo);
1258         drm_gem_object_put_unlocked(obj);
1259
1260         return 0;
1261
1262 err_drm_gem_vram_kunmap:
1263         drm_gem_vram_kunmap(gbo);
1264 err_drm_gem_vram_unpin:
1265         drm_gem_vram_unpin(gbo);
1266 err_drm_gem_object_put_unlocked:
1267         drm_gem_object_put_unlocked(obj);
1268         return ret;
1269 }
1270
1271 static int ast_cursor_move(struct drm_crtc *crtc,
1272                            int x, int y)
1273 {
1274         struct ast_crtc *ast_crtc = to_ast_crtc(crtc);
1275         struct ast_private *ast = crtc->dev->dev_private;
1276         int x_offset, y_offset;
1277         u8 *sig;
1278
1279         sig = drm_gem_vram_kmap(drm_gem_vram_of_gem(ast->cursor_cache),
1280                                 false, NULL);
1281         sig += (AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE)*ast->next_cursor + AST_HWC_SIZE;
1282         writel(x, sig + AST_HWC_SIGNATURE_X);
1283         writel(y, sig + AST_HWC_SIGNATURE_Y);
1284
1285         x_offset = ast_crtc->offset_x;
1286         y_offset = ast_crtc->offset_y;
1287         if (x < 0) {
1288                 x_offset = (-x) + ast_crtc->offset_x;
1289                 x = 0;
1290         }
1291
1292         if (y < 0) {
1293                 y_offset = (-y) + ast_crtc->offset_y;
1294                 y = 0;
1295         }
1296         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);
1297         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);
1298         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, (x & 0xff));
1299         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, ((x >> 8) & 0x0f));
1300         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, (y & 0xff));
1301         ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, ((y >> 8) & 0x07));
1302
1303         /* dummy write to fire HWC */
1304         ast_show_cursor(crtc);
1305
1306         return 0;
1307 }