kernel/dma/mapping.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * arch-independent dma-mapping routines
   4  *
   5  * Copyright (c) 2006  SUSE Linux Products GmbH
   6  * Copyright (c) 2006  Tejun Heo <teheo@suse.de>
   7  */
   8 #include <linux/memblock.h> /* for max_pfn */
   9 #include <linux/acpi.h>
  10 #include <linux/dma-direct.h>
  11 #include <linux/dma-noncoherent.h>
  12 #include <linux/export.h>
  13 #include <linux/gfp.h>
  14 #include <linux/of_device.h>
  15 #include <linux/slab.h>
  16 #include <linux/vmalloc.h>
  17
  18 /*
  19  * Managed DMA API
  20  */
  21 struct dma_devres {
  22         size_t          size;
  23         void            *vaddr;
  24         dma_addr_t      dma_handle;
  25         unsigned long   attrs;
  26 };
  27
  28 static void dmam_release(struct device *dev, void *res)
  29 {
  30         struct dma_devres *this = res;
  31
  32         dma_free_attrs(dev, this->size, this->vaddr, this->dma_handle,
  33                         this->attrs);
  34 }
  35
  36 static int dmam_match(struct device *dev, void *res, void *match_data)
  37 {
  38         struct dma_devres *this = res, *match = match_data;
  39
  40         if (this->vaddr == match->vaddr) {
  41                 WARN_ON(this->size != match->size ||
  42                         this->dma_handle != match->dma_handle);
  43                 return 1;
  44         }
  45         return 0;
  46 }
  47
  48 /**
  49  * dmam_free_coherent - Managed dma_free_coherent()
  50  * @dev: Device to free coherent memory for
  51  * @size: Size of allocation
  52  * @vaddr: Virtual address of the memory to free
  53  * @dma_handle: DMA handle of the memory to free
  54  *
  55  * Managed dma_free_coherent().
  56  */
  57 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
  58                         dma_addr_t dma_handle)
  59 {
  60         struct dma_devres match_data = { size, vaddr, dma_handle };
  61
  62         dma_free_coherent(dev, size, vaddr, dma_handle);
  63         WARN_ON(devres_destroy(dev, dmam_release, dmam_match, &match_data));
  64 }
  65 EXPORT_SYMBOL(dmam_free_coherent);
  66
  67 /**
  68  * dmam_alloc_attrs - Managed dma_alloc_attrs()
  69  * @dev: Device to allocate non_coherent memory for
  70  * @size: Size of allocation
  71  * @dma_handle: Out argument for allocated DMA handle
  72  * @gfp: Allocation flags
  73  * @attrs: Flags in the DMA_ATTR_* namespace.
  74  *
  75  * Managed dma_alloc_attrs().  Memory allocated using this function will be
  76  * automatically released on driver detach.
  77  *
  78  * RETURNS:
  79  * Pointer to allocated memory on success, NULL on failure.
  80  */
  81 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
  82                 gfp_t gfp, unsigned long attrs)
  83 {
  84         struct dma_devres *dr;
  85         void *vaddr;
  86
  87         dr = devres_alloc(dmam_release, sizeof(*dr), gfp);
  88         if (!dr)
  89                 return NULL;
  90
  91         vaddr = dma_alloc_attrs(dev, size, dma_handle, gfp, attrs);
  92         if (!vaddr) {
  93                 devres_free(dr);
  94                 return NULL;
  95         }
  96
  97         dr->vaddr = vaddr;
  98         dr->dma_handle = *dma_handle;
  99         dr->size = size;
 100         dr->attrs = attrs;
 101
 102         devres_add(dev, dr);
 103
 104         return vaddr;
 105 }
 106 EXPORT_SYMBOL(dmam_alloc_attrs);
 107
 108 /*
 109  * Create scatter-list for the already allocated DMA buffer.
 110  */
 111 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
 112                  void *cpu_addr, dma_addr_t dma_addr, size_t size,
 113                  unsigned long attrs)
 114 {
 115         struct page *page;
 116         int ret;
 117
 118         if (!dev_is_dma_coherent(dev)) {
 119                 unsigned long pfn;
 120
 121                 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN))
 122                         return -ENXIO;
 123
 124                 /* If the PFN is not valid, we do not have a struct page */
 125                 pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr);
 126                 if (!pfn_valid(pfn))
 127                         return -ENXIO;
 128                 page = pfn_to_page(pfn);
 129         } else {
 130                 page = virt_to_page(cpu_addr);
 131         }
 132
 133         ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
 134         if (!ret)
 135                 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
 136         return ret;
 137 }
 138
 139 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt,
 140                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 141                 unsigned long attrs)
 142 {
 143         const struct dma_map_ops *ops = get_dma_ops(dev);
 144
 145         if (!dma_is_direct(ops) && ops->get_sgtable)
 146                 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
 147                                         attrs);
 148         return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
 149                         attrs);
 150 }
 151 EXPORT_SYMBOL(dma_get_sgtable_attrs);
 152
 153 /*
 154  * Create userspace mapping for the DMA-coherent memory.
 155  */
 156 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
 157                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 158                 unsigned long attrs)
 159 {
 160 #ifndef CONFIG_ARCH_NO_COHERENT_DMA_MMAP
 161         unsigned long user_count = vma_pages(vma);
 162         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 163         unsigned long off = vma->vm_pgoff;
 164         unsigned long pfn;
 165         int ret = -ENXIO;
 166
 167         vma->vm_page_prot = arch_dma_mmap_pgprot(dev, vma->vm_page_prot, attrs);
 168
 169         if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
 170                 return ret;
 171
 172         if (off >= count || user_count > count - off)
 173                 return -ENXIO;
 174
 175         if (!dev_is_dma_coherent(dev)) {
 176                 if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN))
 177                         return -ENXIO;
 178
 179                 /* If the PFN is not valid, we do not have a struct page */
 180                 pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr);
 181                 if (!pfn_valid(pfn))
 182                         return -ENXIO;
 183         } else {
 184                 pfn = page_to_pfn(virt_to_page(cpu_addr));
 185         }
 186
 187         return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
 188                         user_count << PAGE_SHIFT, vma->vm_page_prot);
 189 #else
 190         return -ENXIO;
 191 #endif /* !CONFIG_ARCH_NO_COHERENT_DMA_MMAP */
 192 }
 193
 194 /**
 195  * dma_mmap_attrs - map a coherent DMA allocation into user space
 196  * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
 197  * @vma: vm_area_struct describing requested user mapping
 198  * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
 199  * @dma_addr: device-view address returned from dma_alloc_attrs
 200  * @size: size of memory originally requested in dma_alloc_attrs
 201  * @attrs: attributes of mapping properties requested in dma_alloc_attrs
 202  *
 203  * Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user
 204  * space.  The coherent DMA buffer must not be freed by the driver until the
 205  * user space mapping has been released.
 206  */
 207 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
 208                 void *cpu_addr, dma_addr_t dma_addr, size_t size,
 209                 unsigned long attrs)
 210 {
 211         const struct dma_map_ops *ops = get_dma_ops(dev);
 212
 213         if (!dma_is_direct(ops) && ops->mmap)
 214                 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 215         return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
 216 }
 217 EXPORT_SYMBOL(dma_mmap_attrs);
 218
 219 static u64 dma_default_get_required_mask(struct device *dev)
 220 {
 221         u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT);
 222         u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT));
 223         u64 mask;
 224
 225         if (!high_totalram) {
 226                 /* convert to mask just covering totalram */
 227                 low_totalram = (1 << (fls(low_totalram) - 1));
 228                 low_totalram += low_totalram - 1;
 229                 mask = low_totalram;
 230         } else {
 231                 high_totalram = (1 << (fls(high_totalram) - 1));
 232                 high_totalram += high_totalram - 1;
 233                 mask = (((u64)high_totalram) << 32) + 0xffffffff;
 234         }
 235         return mask;
 236 }
 237
 238 u64 dma_get_required_mask(struct device *dev)
 239 {
 240         const struct dma_map_ops *ops = get_dma_ops(dev);
 241
 242         if (dma_is_direct(ops))
 243                 return dma_direct_get_required_mask(dev);
 244         if (ops->get_required_mask)
 245                 return ops->get_required_mask(dev);
 246         return dma_default_get_required_mask(dev);
 247 }
 248 EXPORT_SYMBOL_GPL(dma_get_required_mask);
 249
 250 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle,
 251                 gfp_t flag, unsigned long attrs)
 252 {
 253         const struct dma_map_ops *ops = get_dma_ops(dev);
 254         void *cpu_addr;
 255
 256         WARN_ON_ONCE(!dev->coherent_dma_mask);
 257
 258         if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr))
 259                 return cpu_addr;
 260
 261         /* let the implementation decide on the zone to allocate from: */
 262         flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
 263
 264         if (dma_is_direct(ops))
 265                 cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs);
 266         else if (ops->alloc)
 267                 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
 268         else
 269                 return NULL;
 270
 271         debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
 272         return cpu_addr;
 273 }
 274 EXPORT_SYMBOL(dma_alloc_attrs);
 275
 276 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr,
 277                 dma_addr_t dma_handle, unsigned long attrs)
 278 {
 279         const struct dma_map_ops *ops = get_dma_ops(dev);
 280
 281         if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr))
 282                 return;
 283         /*
 284          * On non-coherent platforms which implement DMA-coherent buffers via
 285          * non-cacheable remaps, ops->free() may call vunmap(). Thus getting
 286          * this far in IRQ context is a) at risk of a BUG_ON() or trying to
 287          * sleep on some machines, and b) an indication that the driver is
 288          * probably misusing the coherent API anyway.
 289          */
 290         WARN_ON(irqs_disabled());
 291
 292         if (!cpu_addr)
 293                 return;
 294
 295         debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
 296         if (dma_is_direct(ops))
 297                 dma_direct_free(dev, size, cpu_addr, dma_handle, attrs);
 298         else if (ops->free)
 299                 ops->free(dev, size, cpu_addr, dma_handle, attrs);
 300 }
 301 EXPORT_SYMBOL(dma_free_attrs);
 302
 303 static inline void dma_check_mask(struct device *dev, u64 mask)
 304 {
 305         if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1)))
 306                 dev_warn(dev, "SME is active, device will require DMA bounce buffers\n");
 307 }
 308
 309 int dma_supported(struct device *dev, u64 mask)
 310 {
 311         const struct dma_map_ops *ops = get_dma_ops(dev);
 312
 313         if (dma_is_direct(ops))
 314                 return dma_direct_supported(dev, mask);
 315         if (!ops->dma_supported)
 316                 return 1;
 317         return ops->dma_supported(dev, mask);
 318 }
 319 EXPORT_SYMBOL(dma_supported);
 320
 321 #ifdef CONFIG_ARCH_HAS_DMA_SET_MASK
 322 void arch_dma_set_mask(struct device *dev, u64 mask);
 323 #else
 324 #define arch_dma_set_mask(dev, mask)    do { } while (0)
 325 #endif
 326
 327 int dma_set_mask(struct device *dev, u64 mask)
 328 {
 329         /*
 330          * Truncate the mask to the actually supported dma_addr_t width to
 331          * avoid generating unsupportable addresses.
 332          */
 333         mask = (dma_addr_t)mask;
 334
 335         if (!dev->dma_mask || !dma_supported(dev, mask))
 336                 return -EIO;
 337
 338         arch_dma_set_mask(dev, mask);
 339         dma_check_mask(dev, mask);
 340         *dev->dma_mask = mask;
 341         return 0;
 342 }
 343 EXPORT_SYMBOL(dma_set_mask);
 344
 345 #ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
 346 int dma_set_coherent_mask(struct device *dev, u64 mask)
 347 {
 348         /*
 349          * Truncate the mask to the actually supported dma_addr_t width to
 350          * avoid generating unsupportable addresses.
 351          */
 352         mask = (dma_addr_t)mask;
 353
 354         if (!dma_supported(dev, mask))
 355                 return -EIO;
 356
 357         dma_check_mask(dev, mask);
 358         dev->coherent_dma_mask = mask;
 359         return 0;
 360 }
 361 EXPORT_SYMBOL(dma_set_coherent_mask);
 362 #endif
 363
 364 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 365                 enum dma_data_direction dir)
 366 {
 367         const struct dma_map_ops *ops = get_dma_ops(dev);
 368
 369         BUG_ON(!valid_dma_direction(dir));
 370
 371         if (dma_is_direct(ops))
 372                 arch_dma_cache_sync(dev, vaddr, size, dir);
 373         else if (ops->cache_sync)
 374                 ops->cache_sync(dev, vaddr, size, dir);
 375 }
 376 EXPORT_SYMBOL(dma_cache_sync);
 377
 378 size_t dma_max_mapping_size(struct device *dev)
 379 {
 380         const struct dma_map_ops *ops = get_dma_ops(dev);
 381         size_t size = SIZE_MAX;
 382
 383         if (dma_is_direct(ops))
 384                 size = dma_direct_max_mapping_size(dev);
 385         else if (ops && ops->max_mapping_size)
 386                 size = ops->max_mapping_size(dev);
 387
 388         return size;
 389 }
 390 EXPORT_SYMBOL_GPL(dma_max_mapping_size);