drm/i915/dp: Enable DP tunnel BW allocation mode

Detect DP tunnels and enable the BW allocation mode on them. Send a
hotplug notification to userspace in response to a BW change.

Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240220211841.448846-22-imre.deak@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 14a9a62cab8ac2a876b7f1925f7b4410139f8a26..2391e33c8f876d1142d4609c52fd67c07e45fffe 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -35,6 +35,7 @@
 #include "intel_dkl_phy.h"
 #include "intel_dmc.h"
 #include "intel_dp.h"
+#include "intel_dp_tunnel.h"
 #include "intel_dpll.h"
 #include "intel_dpll_mgr.h"
 #include "intel_fb.h"
@@ -434,10 +435,8 @@ int intel_display_driver_probe_nogem(struct drm_i915_private *i915)
 
        for_each_pipe(i915, pipe) {
                ret = intel_crtc_init(i915, pipe);
-               if (ret) {
-                       intel_mode_config_cleanup(i915);
-                       return ret;
-               }
+               if (ret)
+                       goto err_mode_config;
        }
 
        intel_plane_possible_crtcs_init(i915);
@@ -457,6 +456,10 @@ int intel_display_driver_probe_nogem(struct drm_i915_private *i915)
        intel_vga_disable(i915);
        intel_setup_outputs(i915);
 
+       ret = intel_dp_tunnel_mgr_init(i915);
+       if (ret)
+               goto err_hdcp;
+
        intel_display_driver_disable_user_access(i915);
 
        drm_modeset_lock_all(dev);
@@ -475,6 +478,13 @@ int intel_display_driver_probe_nogem(struct drm_i915_private *i915)
                ilk_wm_sanitize(i915);
 
        return 0;
+
+err_hdcp:
+       intel_hdcp_component_fini(i915);
+err_mode_config:
+       intel_mode_config_cleanup(i915);
+
+       return ret;
 }
 
 /* part #3: call after gem init */
@@ -598,6 +608,8 @@ void intel_display_driver_remove_noirq(struct drm_i915_private *i915)
 
        intel_mode_config_cleanup(i915);
 
+       intel_dp_tunnel_mgr_cleanup(i915);
+
        intel_overlay_cleanup(i915);
 
        intel_gmbus_teardown(i915);

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a0e826a740b13303b0622c6d8bbd899e40a721ac..523a6d68a52c254311b523cdc896c949435e496c 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5729,6 +5729,7 @@ intel_dp_detect(struct drm_connector *connector,
        struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
        struct intel_encoder *encoder = &dig_port->base;
        enum drm_connector_status status;
+       int ret;
 
        drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
                    connector->base.id, connector->name);
@@ -5764,9 +5765,18 @@ intel_dp_detect(struct drm_connector *connector,
                                                        intel_dp->is_mst);
                }
 
+               intel_dp_tunnel_disconnect(intel_dp);
+
                goto out;
        }
 
+       ret = intel_dp_tunnel_detect(intel_dp, ctx);
+       if (ret == -EDEADLK)
+               return ret;
+
+       if (ret == 1)
+               intel_connector->base.epoch_counter++;
+
        intel_dp_detect_dsc_caps(intel_dp, intel_connector);
 
        intel_dp_configure_mst(intel_dp);
@@ -5797,8 +5807,6 @@ intel_dp_detect(struct drm_connector *connector,
         * with an IRQ_HPD, so force a link status check.
         */
        if (!intel_dp_is_edp(intel_dp)) {
-               int ret;
-
                ret = intel_dp_retrain_link(encoder, ctx);
                if (ret)
                        return ret;
@@ -5938,6 +5946,8 @@ void intel_dp_encoder_flush_work(struct drm_encoder *encoder)
 
        intel_dp_mst_encoder_cleanup(dig_port);
 
+       intel_dp_tunnel_destroy(intel_dp);
+
        intel_pps_vdd_off_sync(intel_dp);
 
        /*