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d24596d5 1.\" Copyright (c) International Business Machines Corp., 2006
f9f7c042 2.\"
f0008367 3.\" %%%LICENSE_START(GPLv2+_SW_3_PARA)
d24596d5 4.\" This program is free software; you can redistribute it and/or
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5.\" modify it under the terms of the GNU General Public License as
6.\" published by the Free Software Foundation; either version 2 of
7.\" the License, or (at your option) any later version.
8.\"
9.\" This program is distributed in the hope that it will be useful,
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10.\" but WITHOUT ANY WARRANTY; without even the implied warranty of
11.\" MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
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12.\" the GNU General Public License for more details.
13.\"
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14.\" You should have received a copy of the GNU General Public
15.\" License along with this manual; if not, see
16.\" <http://www.gnu.org/licenses/>.
8ff7380d 17.\" %%%LICENSE_END
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18.\"
19.\" HISTORY:
20.\" 2005-09-28, created by Arnd Bergmann <arndb@de.ibm.com>
21.\" 2006-06-16, revised by Eduardo M. Fleury <efleury@br.ibm.com>
22.\" 2007-07-10, some polishing by mtk
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23.\" 2007-09-28, updates for newer kernels, added example
24.\" by Jeremy Kerr <jk@ozlabs.org>
f9f7c042 25.\"
9ba01802 26.TH SPU_RUN 2 2019-03-06 Linux "Linux Programmer's Manual"
f9f7c042 27.SH NAME
763f0e47 28spu_run \- execute an SPU context
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29.SH SYNOPSIS
30.nf
31.B #include <sys/spu.h>
dbfe9c70 32.PP
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33.BI "int spu_run(int " fd ", unsigned int *" npc \
34", unsigned int *" event ");"
35.fi
dbfe9c70 36.PP
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37.IR Note :
38There is no glibc wrapper for this system call; see NOTES.
f9f7c042 39.SH DESCRIPTION
e0bf9127 40The
f9f7c042 41.BR spu_run ()
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42system call is used on PowerPC machines that implement the
43Cell Broadband Engine Architecture in order to access Synergistic
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44Processor Units (SPUs).
45The
46.I fd
e0bf9127 47argument is a file descriptor returned by
f9f7c042 48.BR spu_create (2)
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49that refers to a specific SPU context.
50When the context gets scheduled to a physical SPU,
51it starts execution at the instruction pointer passed in
f9f7c042 52.IR npc .
efeece04 53.PP
e0bf9127 54Execution of SPU code happens synchronously, meaning that
f9f7c042 55.BR spu_run ()
d24596d5 56blocks while the SPU is still running.
f9f7c042 57If there is a need
e0bf9127 58to execute SPU code in parallel with other code on either the
f9f7c042 59main CPU or other SPUs, a new thread of execution must be created
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60first (e.g., using
61.BR pthread_create (3)).
efeece04 62.PP
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63When
64.BR spu_run ()
d24596d5 65returns, the current value of the SPU program counter is written to
f9f7c042 66.IR npc ,
d24596d5 67so successive calls to
f9f7c042 68.BR spu_run ()
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69can use the same
70.I npc
71pointer.
efeece04 72.PP
d24596d5 73The
f9f7c042 74.I event
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75argument provides a buffer for an extended status code.
76If the SPU
77context was created with the
78.B SPU_CREATE_EVENTS_ENABLED
79flag, then this buffer is populated by the Linux kernel before
f9f7c042 80.BR spu_run ()
d24596d5 81returns.
efeece04 82.PP
d24596d5 83The status code may be one (or more) of the following constants:
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84.TP
85.B SPE_EVENT_DMA_ALIGNMENT
d24596d5 86A DMA alignment error occurred.
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87.TP
88.B SPE_EVENT_INVALID_DMA
d24596d5 89An invalid MFC DMA command was attempted.
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90.TP
91.B SPE_EVENT_SPE_DATA_STORAGE
d24596d5 92A DMA storage error occurred.
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93.TP
94.B SPE_EVENT_SPE_ERROR
d24596d5 95An illegal instruction was executed.
f9f7c042 96.PP
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97NULL
98is a valid value for the
f9f7c042 99.I event
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100argument.
101In this case, the events will not be reported to the calling process.
f9f7c042 102.SH RETURN VALUE
d24596d5 103On success,
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104.BR spu_run ()
105returns the value of the
106.I spu_status
107register.
dec985f9 108On error, it returns \-1 and sets
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109.I errno
110to one of the error codes listed below.
efeece04 111.PP
e0bf9127 112The
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113.I spu_status
114register value is a bit mask of status codes and
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115optionally a 14-bit code returned from the
116.BR stop-and-signal
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117instruction on the SPU.
118The bit masks for the status codes
119are:
120.TP
121.B 0x02
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122SPU was stopped by a
123.BR stop-and-signal
124instruction.
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125.TP
126.B 0x04
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127SPU was stopped by a
128.BR halt
129instruction.
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130.TP
131.B 0x08
132SPU is waiting for a channel.
133.TP
134.B 0x10
135SPU is in single-step mode.
136.TP
137.B 0x20
138SPU has tried to execute an invalid instruction.
139.TP
140.B 0x40
141SPU has tried to access an invalid channel.
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142.TP
143.B 0x3fff0000
144The bits masked with this value contain the code returned from a
145.BR stop-and-signal
146instruction.
33a0ccb2 147These bits are valid only if the 0x02 bit is set.
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148.PP
149If
150.BR spu_run ()
151has not returned an error, one or more bits among the lower eight
152ones are always set.
153.SH ERRORS
154.TP
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155.B EBADF
156.I fd
157is not a valid file descriptor.
158.TP
159.B EFAULT
160.I npc
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161is not a valid pointer, or
162.I event
163is non-NULL and an invalid pointer.
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164.TP
165.B EINTR
166A signal occurred while
167.BR spu_run ()
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168was in progress; see
169.BR signal (7).
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170The
171.I npc
172value has been updated to the new program counter value if
173necessary.
174.TP
175.B EINVAL
176.I fd
d24596d5 177is not a valid file descriptor returned from
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178.BR spu_create (2).
179.TP
180.B ENOMEM
181There was not enough memory available to handle a page fault
182resulting from a Memory Flow Controller (MFC) direct memory access.
183.TP
184.B ENOSYS
185The functionality is not provided by the current system, because
186either the hardware does not provide SPUs or the spufs module is not
187loaded.
188.SH VERSIONS
189The
2777b1ca 190.BR spu_run ()
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191system call was added to Linux in kernel 2.6.16.
192.SH CONFORMING TO
33a0ccb2 193This call is Linux-specific and implemented only by the PowerPC
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194architecture.
195Programs using this system call are not portable.
196.SH NOTES
197Glibc does not provide a wrapper for this system call; call it using
198.BR syscall (2).
199Note however, that
200.BR spu_run ()
201is meant to be used from libraries that implement a more abstract
202interface to SPUs, not to be used from regular applications.
e0bf9127 203See
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204.UR http://www.bsc.es\:/projects\:/deepcomputing\:/linuxoncell/
205.UE
f9f7c042 206for the recommended libraries.
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207.SH EXAMPLE
208The following is an example of running a simple, one-instruction SPU
209program with the
210.BR spu_run ()
211system call.
efeece04 212.PP
408731d4 213.EX
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214#include <stdlib.h>
215#include <stdint.h>
216#include <unistd.h>
217#include <stdio.h>
218#include <sys/types.h>
219#include <fcntl.h>
220
d1a71985 221#define handle_error(msg) \e
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222 do { perror(msg); exit(EXIT_FAILURE); } while (0)
223
224int main(void)
225{
226 int context, fd, spu_status;
227 uint32_t instruction, npc;
228
229 context = spu_create("/spu/example\-context", 0, 0755);
c3074d70 230 if (context == \-1)
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231 handle_error("spu_create");
232
f81fb444 233 /* write a \(aqstop 0x1234\(aq instruction to the SPU\(aqs
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234 * local store memory
235 */
236 instruction = 0x00001234;
237
238 fd = open("/spu/example\-context/mem", O_RDWR);
c3074d70 239 if (fd == \-1)
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240 handle_error("open");
241 write(fd, &instruction, sizeof(instruction));
242
243 /* set npc to the starting instruction address of the
244 * SPU program. Since we wrote the instruction at the
245 * start of the mem file, the entry point will be 0x0
246 */
247 npc = 0;
248
249 spu_status = spu_run(context, &npc, NULL);
c3074d70 250 if (spu_status == \-1)
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251 handle_error("open");
252
253 /* we should see a status code of 0x1234002:
254 * 0x00000002 (spu was stopped due to stop\-and\-signal)
255 * | 0x12340000 (the stop\-and\-signal code)
256 */
d1a71985 257 printf("SPU Status: 0x%08x\en", spu_status);
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258
259 exit(EXIT_SUCCESS);
260}
408731d4 261.EE
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262.\" .SH AUTHORS
263.\" Arnd Bergmann <arndb@de.ibm.com>, Jeremy Kerr <jk@ozlabs.org>
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264.SH SEE ALSO
265.BR close (2),
266.BR spu_create (2),
d24596d5 267.BR capabilities (7),
f9f7c042 268.BR spufs (7)