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[thirdparty/pciutils.git] / lspci.c
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98e39e09 1/*
b5137411 2 * $Id: lspci.c,v 1.20 1999/01/24 21:38:47 mj Exp $
98e39e09
MM
3 *
4 * Linux PCI Utilities -- List All PCI Devices
5 *
6ece6bc6 6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
98e39e09
MM
7 *
8 * Can be freely distributed and used under the terms of the GNU GPL.
9 */
10
11#include <stdio.h>
12#include <string.h>
13#include <stdlib.h>
727ce158 14#include <stdarg.h>
98e39e09 15#include <unistd.h>
98e39e09
MM
16
17#include "pciutils.h"
18
19/* Options */
20
21static int verbose; /* Show detailed information */
22static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23static int show_hex; /* Show contents of config space as hexadecimal numbers */
e4842ff3 24static struct pci_filter filter; /* Device filter */
6d0dc0fd 25static int show_tree; /* Show bus tree */
0a33d0ec 26static int machine_readable; /* Generate machine-readable output */
98e39e09 27
727ce158 28static char options[] = "nvbxs:d:ti:mg" GENERIC_OPTIONS ;
98e39e09
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29
30static char help_msg[] = "\
31Usage: lspci [<switches>]\n\
32\n\
e4842ff3
MM
33-v\t\tBe verbose\n\
34-n\t\tShow numeric ID's\n\
35-b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
3b89d8e4 36-x\t\tShow hex-dump of config space\n\
e4842ff3
MM
37-s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
38-d [<vendor>]:[<device>]\tShow only selected devices\n\
39-t\t\tShow bus tree\n\
40-m\t\tProduce machine-readable output\n\
727ce158
MM
41-i <file>\tUse specified ID database instead of %s\n"
42GENERIC_HELP
43;
98e39e09 44
727ce158
MM
45/* Communication with libpci */
46
47static struct pci_access *pacc;
48
49/* Format strings used for IRQ numbers and memory addresses */
f17b962b 50
2f48f637 51#ifdef ARCH_SPARC64
f17b962b
MM
52#define IRQ_FORMAT "%08x"
53#else
54#define IRQ_FORMAT "%d"
55#endif
56
727ce158
MM
57#ifdef HAVE_64BIT_LONG_INT
58#define LONG_FORMAT "%016lx"
59#else
60#define LONG_FORMAT "%08lx"
61#endif
62
98e39e09
MM
63/* Our view of the PCI bus */
64
65struct device {
66 struct device *next;
727ce158 67 struct pci_dev *dev;
b5137411 68 unsigned int config_cnt;
98e39e09
MM
69 byte config[256];
70};
71
727ce158 72static struct device *first_dev;
98e39e09
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73
74static void
727ce158 75scan_devices(void)
98e39e09
MM
76{
77 struct device *d;
3b89d8e4 78 int how_much = (show_hex > 2) ? 256 : 64;
727ce158 79 struct pci_dev *p;
98e39e09 80
727ce158
MM
81 pci_scan_bus(pacc);
82 for(p=pacc->devices; p; p=p->next)
98e39e09 83 {
727ce158
MM
84 if (!pci_filter_match(&filter, p))
85 continue;
86 d = xmalloc(sizeof(struct device));
87 d->next = first_dev;
88 first_dev = d;
89 d->dev = p;
90 if (!pci_read_block(p, 0, d->config, how_much))
91 die("Unable to read %d bytes of configuration space.", how_much);
92 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
2f48f637 93 {
727ce158
MM
94 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
95 if (!pci_read_block(p, 0, d->config+64, 64))
96 die("Unable to read cardbus bridge extension data.");
97 how_much = 128;
2f48f637 98 }
727ce158 99 d->config_cnt = how_much;
b5137411 100 pci_setup_cache(p, d->config, d->config_cnt);
727ce158 101 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE);
98e39e09
MM
102 }
103}
104
b5137411
MM
105static int
106check_root(void)
107{
108 static int is_root = -1;
109
110 if (is_root < 0)
111 is_root = !geteuid();
112 return is_root;
113}
114
115static int
116config_fetch(struct device *d, unsigned int pos, unsigned int len)
117{
118 if (pos + len < d->config_cnt)
119 return 1;
120 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
121 return 0;
122 return pci_read_block(d->dev, pos, d->config + pos, len);
123}
124
98e39e09
MM
125/* Config space accesses */
126
127static inline byte
128get_conf_byte(struct device *d, unsigned int pos)
129{
130 return d->config[pos];
131}
132
133static word
134get_conf_word(struct device *d, unsigned int pos)
135{
136 return d->config[pos] | (d->config[pos+1] << 8);
137}
138
139static u32
140get_conf_long(struct device *d, unsigned int pos)
141{
142 return d->config[pos] |
143 (d->config[pos+1] << 8) |
144 (d->config[pos+2] << 16) |
145 (d->config[pos+3] << 24);
146}
147
148/* Sorting */
149
150static int
151compare_them(const void *A, const void *B)
152{
727ce158
MM
153 const struct pci_dev *a = (*(const struct device **)A)->dev;
154 const struct pci_dev *b = (*(const struct device **)B)->dev;
98e39e09
MM
155
156 if (a->bus < b->bus)
157 return -1;
158 if (a->bus > b->bus)
159 return 1;
727ce158
MM
160 if (a->dev < b->dev)
161 return -1;
162 if (a->dev > b->dev)
163 return 1;
164 if (a->func < b->func)
98e39e09 165 return -1;
727ce158 166 if (a->func > b->func)
98e39e09
MM
167 return 1;
168 return 0;
169}
170
171static void
172sort_them(void)
173{
727ce158 174 struct device **index, **h, **last_dev;
98e39e09
MM
175 int cnt;
176 struct device *d;
177
178 cnt = 0;
179 for(d=first_dev; d; d=d->next)
180 cnt++;
181 h = index = alloca(sizeof(struct device *) * cnt);
182 for(d=first_dev; d; d=d->next)
183 *h++ = d;
184 qsort(index, cnt, sizeof(struct device *), compare_them);
185 last_dev = &first_dev;
186 h = index;
187 while (cnt--)
188 {
189 *last_dev = *h;
190 last_dev = &(*h)->next;
191 h++;
192 }
193 *last_dev = NULL;
194}
195
6d0dc0fd 196/* Normal output */
98e39e09
MM
197
198static void
199show_terse(struct device *d)
200{
201 int c;
727ce158
MM
202 struct pci_dev *p = d->dev;
203 byte classbuf[128], devbuf[128];
98e39e09
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204
205 printf("%02x:%02x.%x %s: %s",
727ce158
MM
206 p->bus,
207 p->dev,
208 p->func,
209 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
210 PCI_LOOKUP_CLASS,
211 get_conf_word(d, PCI_CLASS_DEVICE), 0),
212 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
213 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
214 p->vendor_id, p->device_id));
98e39e09
MM
215 if (c = get_conf_byte(d, PCI_REVISION_ID))
216 printf(" (rev %02x)", c);
217 if (verbose && (c = get_conf_byte(d, PCI_CLASS_PROG)))
218 printf(" (prog-if %02x)", c);
219 putchar('\n');
220}
221
222static void
223show_bases(struct device *d, int cnt)
224{
727ce158 225 struct pci_dev *p = d->dev;
98e39e09
MM
226 word cmd = get_conf_word(d, PCI_COMMAND);
227 int i;
228
96e4f295 229 for(i=0; i<cnt; i++)
98e39e09
MM
230 {
231 unsigned long pos;
232 unsigned int flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
727ce158
MM
233 pos = p->base_addr[i];
234 if (flg == 0xffffffff)
235 flg = 0;
236 if (!pos && !flg)
98e39e09 237 continue;
072c77e5
MM
238 if (verbose > 1)
239 printf("\tRegion %d: ", i);
240 else
241 putchar('\t');
727ce158
MM
242 if (pos && !flg) /* Reported by the OS, but not by the device */
243 {
244 printf("[virtual] ");
245 flg = pos;
246 }
98e39e09 247 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
f17b962b 248 {
072c77e5
MM
249 unsigned long a = pos & PCI_BASE_ADDRESS_IO_MASK;
250 printf("I/O ports at ");
251 if (a)
252 printf("%04lx", a);
727ce158
MM
253 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
254 printf("<ignored>");
072c77e5
MM
255 else
256 printf("<unassigned>");
257 if (!(cmd & PCI_COMMAND_IO))
258 printf(" [disabled]");
f17b962b 259 }
072c77e5 260 else
98e39e09
MM
261 {
262 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
072c77e5 263 unsigned long a = pos & PCI_BASE_ADDRESS_MEM_MASK;
727ce158
MM
264 int done = 0;
265 u32 z = 0;
266
98e39e09
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267 printf("Memory at ");
268 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
269 {
727ce158
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270 if (i >= cnt - 1)
271 {
272 printf("<invalid-64bit-slot>\n");
273 done = 1;
274 }
275 else
98e39e09
MM
276 {
277 i++;
072c77e5
MM
278 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
279 if (buscentric_view)
727ce158
MM
280 {
281 if (a || z)
282 printf("%08x%08lx", z, a);
283 else
284 printf("<unassigned>");
285 done = 1;
286 }
98e39e09 287 }
727ce158
MM
288 }
289 if (!done)
290 {
291 if (a)
292 printf(LONG_FORMAT, a);
98e39e09 293 else
727ce158 294 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
98e39e09 295 }
072c77e5 296 printf(" (%s, %sprefetchable)",
98e39e09
MM
297 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
298 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
072c77e5 299 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
f17b962b 300 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
072c77e5
MM
301 if (!(cmd & PCI_COMMAND_MEMORY))
302 printf(" [disabled]");
98e39e09 303 }
072c77e5 304 putchar('\n');
98e39e09
MM
305 }
306}
307
308static void
309show_htype0(struct device *d)
310{
727ce158 311 unsigned long rom = d->dev->rom_base_addr;
98e39e09
MM
312
313 show_bases(d, 6);
98e39e09 314 if (rom & 1)
b2c9b373
MM
315 printf("\tExpansion ROM at %08lx%s\n", rom & PCI_ROM_ADDRESS_MASK,
316 (rom & PCI_ROM_ADDRESS_ENABLE) ? "" : " [disabled]");
b5137411
MM
317 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
318 {
319 int where = get_conf_byte(d, PCI_CAPABILITY_LIST);
320 while (where)
321 {
322 int id, next, ver;
323 printf("\tCapabilities: ");
324 if (!config_fetch(d, where, 4))
325 {
326 puts("<available only to root>");
327 break;
328 }
329 id = get_conf_byte(d, where);
330 next = get_conf_byte(d, where+1);
331 ver = get_conf_byte(d, where+2);
332 if (id == 0xff)
333 {
334 printf("<chain broken at %02x>\n", where);
335 break;
336 }
337 switch (id)
338 {
339 case 2:
340 printf("AGP");
341 break;
342 default:
343 printf("C%02x", id);
344 }
345 printf(" version %x.%x at %02x\n", ver/16, ver%16, where);
346 where = next;
347 }
348 }
98e39e09
MM
349}
350
351static void
352show_htype1(struct device *d)
353{
727ce158 354 struct pci_dev *p = d->dev;
98e39e09
MM
355 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
356 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
357 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
358 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
359 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
360 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
361 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
362 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
363 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
727ce158 364 unsigned long rom = p->rom_base_addr;
98e39e09
MM
365 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
366
367 show_bases(d, 2);
368 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
369 get_conf_byte(d, PCI_PRIMARY_BUS),
370 get_conf_byte(d, PCI_SECONDARY_BUS),
371 get_conf_byte(d, PCI_SUBORDINATE_BUS),
372 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
373
374 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
375 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
376 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
377 else
378 {
379 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
380 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
381 if (io_type == PCI_IO_RANGE_TYPE_32)
382 {
383 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
384 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
385 }
386 if (io_base)
387 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
388 }
389
390 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
391 mem_type)
392 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
393 else if (mem_base)
394 {
395 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
396 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
397 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
398 }
399
400 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
401 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
402 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
403 else if (pref_base)
404 {
405 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
406 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
407 if (pref_type == PCI_PREF_RANGE_TYPE_32)
371f605b 408 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
98e39e09
MM
409 else
410 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
411 get_conf_long(d, PCI_PREF_BASE_UPPER32),
412 pref_base,
413 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
414 pref_limit);
415 }
416
417 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
418 printf("\tSecondary status: SERR\n");
419
420 if (rom & 1)
b2c9b373
MM
421 printf("\tExpansion ROM at %08lx%s\n", rom & PCI_ROM_ADDRESS_MASK,
422 (rom & PCI_ROM_ADDRESS_ENABLE) ? "" : " [disabled]");
98e39e09
MM
423
424 if (verbose > 1)
425 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
426 (brc & PCI_BRIDGE_CTL_PARITY) ? '+' : '-',
427 (brc & PCI_BRIDGE_CTL_SERR) ? '+' : '-',
428 (brc & PCI_BRIDGE_CTL_NO_ISA) ? '+' : '-',
429 (brc & PCI_BRIDGE_CTL_VGA) ? '+' : '-',
430 (brc & PCI_BRIDGE_CTL_MASTER_ABORT) ? '+' : '-',
431 (brc & PCI_BRIDGE_CTL_BUS_RESET) ? '+' : '-',
432 (brc & PCI_BRIDGE_CTL_FAST_BACK) ? '+' : '-');
433}
434
2f48f637
MM
435static void
436show_htype2(struct device *d)
437{
96e4f295
MM
438 int i;
439 word cmd = get_conf_word(d, PCI_COMMAND);
440 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
441 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
442
443 show_bases(d, 1);
444 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
445 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
446 get_conf_byte(d, PCI_CB_CARD_BUS),
447 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
448 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
449 for(i=0; i<2; i++)
450 {
451 int p = 8*i;
452 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
453 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
454 if (limit > base)
455 printf("Memory window %d: %08x-%08x%s%s\n", i, base, limit,
456 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
457 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
458 }
459 for(i=0; i<2; i++)
460 {
461 int p = 8*i;
462 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
463 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
464 if (!(base & PCI_IO_RANGE_TYPE_32))
465 {
466 base &= 0xffff;
467 limit &= 0xffff;
468 }
469 base &= PCI_CB_IO_RANGE_MASK;
470 if (!base)
471 continue;
472 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
473 printf("I/O window %d: %08x-%08x%s\n", i, base, limit,
474 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
475 }
476
477 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
478 printf("\tSecondary status: SERR\n");
479 if (verbose > 1)
480 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
481 (brc & PCI_CB_BRIDGE_CTL_PARITY) ? '+' : '-',
482 (brc & PCI_CB_BRIDGE_CTL_SERR) ? '+' : '-',
483 (brc & PCI_CB_BRIDGE_CTL_ISA) ? '+' : '-',
484 (brc & PCI_CB_BRIDGE_CTL_VGA) ? '+' : '-',
485 (brc & PCI_CB_BRIDGE_CTL_MASTER_ABORT) ? '+' : '-',
486 (brc & PCI_CB_BRIDGE_CTL_CB_RESET) ? '+' : '-',
487 (brc & PCI_CB_BRIDGE_CTL_16BIT_INT) ? '+' : '-',
488 (brc & PCI_CB_BRIDGE_CTL_POST_WRITES) ? '+' : '-');
489 if (exca)
490 printf("\t16-bit legacy interface ports at %04x\n", exca);
2f48f637
MM
491}
492
98e39e09
MM
493static void
494show_verbose(struct device *d)
495{
727ce158 496 struct pci_dev *p = d->dev;
98e39e09
MM
497 word status = get_conf_word(d, PCI_STATUS);
498 word cmd = get_conf_word(d, PCI_COMMAND);
499 word class = get_conf_word(d, PCI_CLASS_DEVICE);
500 byte bist = get_conf_byte(d, PCI_BIST);
501 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
502 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
503 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
504 byte max_lat, min_gnt;
505 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
727ce158 506 unsigned int irq = p->irq;
98e39e09 507 word subsys_v, subsys_d;
727ce158 508 char ssnamebuf[256];
98e39e09
MM
509
510 show_terse(d);
511
98e39e09
MM
512 switch (htype)
513 {
2f48f637
MM
514 case PCI_HEADER_TYPE_NORMAL:
515 if (class == PCI_CLASS_BRIDGE_PCI)
516 {
517 badhdr:
518 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
519 return;
520 }
98e39e09
MM
521 max_lat = get_conf_byte(d, PCI_MAX_LAT);
522 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
523 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
524 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
525 break;
2f48f637
MM
526 case PCI_HEADER_TYPE_BRIDGE:
527 if (class != PCI_CLASS_BRIDGE_PCI)
528 goto badhdr;
727ce158 529 irq = int_pin = min_gnt = max_lat = 0;
2f48f637
MM
530 subsys_v = subsys_d = 0;
531 break;
532 case PCI_HEADER_TYPE_CARDBUS:
533 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
534 goto badhdr;
96e4f295
MM
535 min_gnt = max_lat = 0;
536 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
537 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
98e39e09
MM
538 break;
539 default:
540 printf("\t!!! Unknown header type %02x\n", htype);
541 return;
542 }
543
ce503b7f 544 if (verbose && subsys_v && subsys_v != 0xffff)
727ce158
MM
545 printf("\tSubsystem: %s\n",
546 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
547 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
548 subsys_v, subsys_d));
ce503b7f 549
98e39e09
MM
550 if (verbose > 1)
551 {
98e39e09
MM
552 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
553 (cmd & PCI_COMMAND_IO) ? '+' : '-',
554 (cmd & PCI_COMMAND_MEMORY) ? '+' : '-',
555 (cmd & PCI_COMMAND_MASTER) ? '+' : '-',
556 (cmd & PCI_COMMAND_SPECIAL) ? '+' : '-',
557 (cmd & PCI_COMMAND_INVALIDATE) ? '+' : '-',
558 (cmd & PCI_COMMAND_VGA_PALETTE) ? '+' : '-',
559 (cmd & PCI_COMMAND_PARITY) ? '+' : '-',
560 (cmd & PCI_COMMAND_WAIT) ? '+' : '-',
561 (cmd & PCI_COMMAND_SERR) ? '+' : '-',
562 (cmd & PCI_COMMAND_FAST_BACK) ? '+' : '-');
b5137411
MM
563 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
564 (status & PCI_STATUS_CAP_LIST) ? '+' : '-',
98e39e09
MM
565 (status & PCI_STATUS_66MHZ) ? '+' : '-',
566 (status & PCI_STATUS_UDF) ? '+' : '-',
567 (status & PCI_STATUS_FAST_BACK) ? '+' : '-',
568 (status & PCI_STATUS_PARITY) ? '+' : '-',
569 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
570 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
571 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
572 (status & PCI_STATUS_SIG_TARGET_ABORT) ? '+' : '-',
573 (status & PCI_STATUS_REC_TARGET_ABORT) ? '+' : '-',
574 (status & PCI_STATUS_REC_MASTER_ABORT) ? '+' : '-',
575 (status & PCI_STATUS_SIG_SYSTEM_ERROR) ? '+' : '-',
576 (status & PCI_STATUS_DETECTED_PARITY) ? '+' : '-');
577 if (cmd & PCI_COMMAND_MASTER)
578 {
579 printf("\tLatency: ");
580 if (min_gnt)
581 printf("%d min, ", min_gnt);
582 if (max_lat)
583 printf("%d max, ", max_lat);
584 printf("%d set", latency);
585 if (cache_line)
586 printf(", cache line size %02x", cache_line);
587 putchar('\n');
588 }
727ce158
MM
589 if (int_pin || irq)
590 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
591 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
98e39e09
MM
592 }
593 else
594 {
595 printf("\tFlags: ");
596 if (cmd & PCI_COMMAND_MASTER)
597 printf("bus master, ");
598 if (cmd & PCI_COMMAND_VGA_PALETTE)
599 printf("VGA palette snoop, ");
600 if (cmd & PCI_COMMAND_WAIT)
601 printf("stepping, ");
602 if (cmd & PCI_COMMAND_FAST_BACK)
603 printf("fast Back2Back, ");
604 if (status & PCI_STATUS_66MHZ)
605 printf("66Mhz, ");
606 if (status & PCI_STATUS_UDF)
607 printf("user-definable features, ");
608 printf("%s devsel",
609 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
610 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
611 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
612 if (cmd & PCI_COMMAND_MASTER)
613 printf(", latency %d", latency);
727ce158
MM
614 if (irq)
615 printf(", IRQ " IRQ_FORMAT, irq);
98e39e09
MM
616 putchar('\n');
617 }
618
619 if (bist & PCI_BIST_CAPABLE)
620 {
621 if (bist & PCI_BIST_START)
622 printf("\tBIST is running\n");
623 else
624 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
625 }
626
627 switch (htype)
628 {
2f48f637 629 case PCI_HEADER_TYPE_NORMAL:
98e39e09
MM
630 show_htype0(d);
631 break;
2f48f637 632 case PCI_HEADER_TYPE_BRIDGE:
98e39e09
MM
633 show_htype1(d);
634 break;
2f48f637
MM
635 case PCI_HEADER_TYPE_CARDBUS:
636 show_htype2(d);
637 break;
98e39e09
MM
638 }
639}
640
641static void
642show_hex_dump(struct device *d)
643{
b5137411 644 unsigned int i;
98e39e09 645
727ce158 646 for(i=0; i<d->config_cnt; i++)
98e39e09
MM
647 {
648 if (! (i & 15))
649 printf("%02x:", i);
650 printf(" %02x", get_conf_byte(d, i));
651 if ((i & 15) == 15)
652 putchar('\n');
653 }
654}
655
0a33d0ec
MM
656static void
657show_machine(struct device *d)
658{
727ce158 659 struct pci_dev *p = d->dev;
0a33d0ec 660 int c;
ce503b7f 661 word sv_id=0, sd_id=0;
727ce158 662 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
ce503b7f
MM
663
664 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
665 {
666 case PCI_HEADER_TYPE_NORMAL:
667 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
668 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
669 break;
670 case PCI_HEADER_TYPE_CARDBUS:
671 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
672 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
673 break;
674 }
0a33d0ec
MM
675
676 if (verbose)
677 {
727ce158
MM
678 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
679 printf("Class:\t%s\n",
680 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0));
681 printf("Vendor:\t%s\n",
682 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
683 printf("Device:\t%s\n",
684 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
ce503b7f
MM
685 if (sv_id && sv_id != 0xffff)
686 {
727ce158
MM
687 printf("SVendor:\t%s\n",
688 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id, sd_id));
689 printf("SDevice:\t%s\n",
690 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, sv_id, sd_id));
ce503b7f 691 }
0a33d0ec
MM
692 if (c = get_conf_byte(d, PCI_REVISION_ID))
693 printf("Rev:\t%02x\n", c);
694 if (c = get_conf_byte(d, PCI_CLASS_PROG))
695 printf("ProgIf:\t%02x\n", c);
696 }
697 else
698 {
727ce158 699 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
0a33d0ec 700 printf("\"%s\" \"%s\" \"%s\"",
727ce158
MM
701 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
702 get_conf_word(d, PCI_CLASS_DEVICE), 0),
703 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
704 p->vendor_id, p->device_id),
705 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
706 p->vendor_id, p->device_id));
0a33d0ec
MM
707 if (c = get_conf_byte(d, PCI_REVISION_ID))
708 printf(" -r%02x", c);
709 if (c = get_conf_byte(d, PCI_CLASS_PROG))
710 printf(" -p%02x", c);
ce503b7f 711 if (sv_id && sv_id != 0xffff)
727ce158
MM
712 printf(" \"%s\" \"%s\"",
713 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id, sd_id),
714 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, sv_id, sd_id));
ce503b7f
MM
715 else
716 printf(" \"\" \"\"");
0a33d0ec
MM
717 putchar('\n');
718 }
719}
720
98e39e09
MM
721static void
722show(void)
723{
724 struct device *d;
725
726 for(d=first_dev; d; d=d->next)
727 {
0a33d0ec
MM
728 if (machine_readable)
729 show_machine(d);
730 else if (verbose)
98e39e09
MM
731 show_verbose(d);
732 else
733 show_terse(d);
734 if (show_hex)
735 show_hex_dump(d);
736 if (verbose || show_hex)
737 putchar('\n');
738 }
739}
740
6d0dc0fd
MM
741/* Tree output */
742
743struct bridge {
744 struct bridge *chain; /* Single-linked list of bridges */
745 struct bridge *next, *child; /* Tree of bridges */
746 struct bus *first_bus; /* List of busses connected to this bridge */
747 unsigned int primary, secondary, subordinate; /* Bus numbers */
748 struct device *br_dev;
749};
750
751struct bus {
752 unsigned int number;
753 struct bus *sibling;
754 struct device *first_dev, **last_dev;
755};
756
757static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
758
759static struct bus *
760find_bus(struct bridge *b, unsigned int n)
761{
762 struct bus *bus;
763
764 for(bus=b->first_bus; bus; bus=bus->sibling)
765 if (bus->number == n)
766 break;
767 return bus;
768}
769
770static struct bus *
771new_bus(struct bridge *b, unsigned int n)
772{
773 struct bus *bus = xmalloc(sizeof(struct bus));
774
775 bus = xmalloc(sizeof(struct bus));
776 bus->number = n;
777 bus->sibling = b->first_bus;
778 bus->first_dev = NULL;
779 bus->last_dev = &bus->first_dev;
780 b->first_bus = bus;
781 return bus;
782}
783
784static void
785insert_dev(struct device *d, struct bridge *b)
786{
727ce158 787 struct pci_dev *p = d->dev;
6d0dc0fd
MM
788 struct bus *bus;
789
727ce158 790 if (! (bus = find_bus(b, p->bus)))
6d0dc0fd
MM
791 {
792 struct bridge *c;
793 for(c=b->child; c; c=c->next)
727ce158 794 if (c->secondary <= p->bus && p->bus <= c->subordinate)
6d0dc0fd 795 return insert_dev(d, c);
727ce158 796 bus = new_bus(b, p->bus);
6d0dc0fd
MM
797 }
798 /* Simple insertion at the end _does_ guarantee the correct order as the
799 * original device list was sorted by (bus, devfn) lexicographically
800 * and all devices on the new list have the same bus number.
801 */
802 *bus->last_dev = d;
803 bus->last_dev = &d->next;
804 d->next = NULL;
805}
806
807static void
808grow_tree(void)
809{
810 struct device *d, *d2;
008407bd 811 struct bridge **last_br, *b;
6d0dc0fd
MM
812
813 /* Build list of bridges */
814
008407bd 815 last_br = &host_bridge.chain;
6d0dc0fd
MM
816 for(d=first_dev; d; d=d->next)
817 {
818 word class = get_conf_word(d, PCI_CLASS_DEVICE);
96e4f295
MM
819 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
820 if (class == PCI_CLASS_BRIDGE_PCI &&
821 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
6d0dc0fd
MM
822 {
823 b = xmalloc(sizeof(struct bridge));
96e4f295
MM
824 if (ht == PCI_HEADER_TYPE_BRIDGE)
825 {
826 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
827 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
828 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
829 }
830 else
831 {
832 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
833 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
834 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
835 }
008407bd
MM
836 *last_br = b;
837 last_br = &b->chain;
6d0dc0fd
MM
838 b->next = b->child = NULL;
839 b->first_bus = NULL;
840 b->br_dev = d;
841 }
842 }
008407bd 843 *last_br = NULL;
6d0dc0fd
MM
844
845 /* Create a bridge tree */
846
008407bd 847 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM
848 {
849 struct bridge *c, *best;
850 best = NULL;
008407bd 851 for(c=&host_bridge; c; c=c->chain)
6d0dc0fd
MM
852 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
853 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
854 best = c;
855 if (best)
856 {
857 b->next = best->child;
858 best->child = b;
859 }
860 }
861
862 /* Insert secondary bus for each bridge */
863
008407bd 864 for(b=&host_bridge; b; b=b->chain)
6d0dc0fd
MM
865 if (!find_bus(b, b->secondary))
866 new_bus(b, b->secondary);
867
868 /* Create bus structs and link devices */
869
870 for(d=first_dev; d;)
871 {
872 d2 = d->next;
873 insert_dev(d, &host_bridge);
874 d = d2;
875 }
876}
877
878static void
879print_it(byte *line, byte *p)
880{
881 *p++ = '\n';
882 *p = 0;
883 fputs(line, stdout);
884 for(p=line; *p; p++)
008407bd 885 if (*p == '+' || *p == '|')
6d0dc0fd
MM
886 *p = '|';
887 else
888 *p = ' ';
889}
890
891static void show_tree_bridge(struct bridge *, byte *, byte *);
892
893static void
894show_tree_dev(struct device *d, byte *line, byte *p)
895{
727ce158 896 struct pci_dev *q = d->dev;
6d0dc0fd 897 struct bridge *b;
727ce158 898 char namebuf[256];
6d0dc0fd 899
727ce158 900 p += sprintf(p, "%02x.%x", q->dev, q->func);
6d0dc0fd
MM
901 for(b=&host_bridge; b; b=b->chain)
902 if (b->br_dev == d)
903 {
008407bd
MM
904 if (b->secondary == b->subordinate)
905 p += sprintf(p, "-[%02x]-", b->secondary);
906 else
907 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
6d0dc0fd
MM
908 show_tree_bridge(b, line, p);
909 return;
910 }
18928b91 911 if (verbose)
727ce158
MM
912 p += sprintf(p, " %s",
913 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
914 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
915 q->vendor_id, q->device_id));
6d0dc0fd
MM
916 print_it(line, p);
917}
918
919static void
920show_tree_bus(struct bus *b, byte *line, byte *p)
921{
922 if (!b->first_dev)
923 print_it(line, p);
924 else if (!b->first_dev->next)
925 {
926 *p++ = '-';
927 *p++ = '-';
928 show_tree_dev(b->first_dev, line, p);
929 }
930 else
931 {
932 struct device *d = b->first_dev;
933 while (d->next)
934 {
935 p[0] = '+';
936 p[1] = '-';
937 show_tree_dev(d, line, p+2);
938 d = d->next;
939 }
940 p[0] = '\\';
941 p[1] = '-';
942 show_tree_dev(d, line, p+2);
943 }
944}
945
946static void
947show_tree_bridge(struct bridge *b, byte *line, byte *p)
948{
949 *p++ = '-';
950 if (!b->first_bus->sibling)
951 {
952 if (b == &host_bridge)
953 p += sprintf(p, "[%02x]-", b->first_bus->number);
954 show_tree_bus(b->first_bus, line, p);
955 }
956 else
957 {
958 struct bus *u = b->first_bus;
959 byte *k;
960
961 while (u->sibling)
962 {
963 k = p + sprintf(p, "+-[%02x]-", u->number);
964 show_tree_bus(u, line, k);
965 u = u->sibling;
966 }
967 k = p + sprintf(p, "\\-[%02x]-", u->number);
968 show_tree_bus(u, line, k);
969 }
970}
971
972static void
973show_forest(void)
974{
975 char line[256];
976
977 grow_tree();
978 show_tree_bridge(&host_bridge, line, line);
979}
980
98e39e09
MM
981/* Main */
982
983int
984main(int argc, char **argv)
985{
986 int i;
e4842ff3 987 char *msg;
98e39e09 988
496d4021
MM
989 if (argc == 2 && !strcmp(argv[1], "--version"))
990 {
991 puts("lspci version " PCIUTILS_VERSION);
992 return 0;
993 }
727ce158
MM
994
995 pacc = pci_alloc();
996 pacc->error = die;
997 pci_filter_init(pacc, &filter);
998
98e39e09
MM
999 while ((i = getopt(argc, argv, options)) != -1)
1000 switch (i)
1001 {
1002 case 'n':
727ce158 1003 pacc->numeric_ids = 1;
98e39e09
MM
1004 break;
1005 case 'v':
1006 verbose++;
1007 break;
1008 case 'b':
727ce158 1009 pacc->buscentric = 1;
98e39e09
MM
1010 buscentric_view = 1;
1011 break;
e4842ff3 1012 case 's':
727ce158
MM
1013 if (msg = pci_filter_parse_slot(&filter, optarg))
1014 die("-f: %s", msg);
98e39e09 1015 break;
e4842ff3 1016 case 'd':
727ce158
MM
1017 if (msg = pci_filter_parse_id(&filter, optarg))
1018 die("-d: %s", msg);
98e39e09
MM
1019 break;
1020 case 'x':
1021 show_hex++;
1022 break;
6d0dc0fd
MM
1023 case 't':
1024 show_tree++;
1025 break;
18928b91 1026 case 'i':
727ce158 1027 pacc->id_file_name = optarg;
18928b91 1028 break;
0a33d0ec
MM
1029 case 'm':
1030 machine_readable++;
1031 break;
98e39e09 1032 default:
727ce158
MM
1033 if (parse_generic_option(i, pacc, optarg))
1034 break;
98e39e09 1035 bad:
727ce158 1036 fprintf(stderr, help_msg, pacc->id_file_name);
98e39e09
MM
1037 return 1;
1038 }
1039 if (optind < argc)
1040 goto bad;
1041
727ce158
MM
1042 pci_init(pacc);
1043 scan_devices();
98e39e09 1044 sort_them();
6d0dc0fd
MM
1045 if (show_tree)
1046 show_forest();
1047 else
1048 show();
727ce158 1049 pci_cleanup(pacc);
98e39e09
MM
1050
1051 return 0;
1052}