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Commit | Line | Data |
---|---|---|
e4842ff3 | 1 | /* |
4284af58 | 2 | * The PCI Utilities -- Manipulate PCI Configuration Registers |
e4842ff3 | 3 | * |
1b99a704 | 4 | * Copyright (c) 1998--2008 Martin Mares <mj@ucw.cz> |
e4842ff3 MM |
5 | * |
6 | * Can be freely distributed and used under the terms of the GNU GPL. | |
7 | */ | |
8 | ||
9 | #include <stdio.h> | |
10 | #include <string.h> | |
11 | #include <stdlib.h> | |
727ce158 | 12 | #include <stdarg.h> |
e4842ff3 | 13 | #include <unistd.h> |
ace49a96 | 14 | #include <errno.h> |
7aad822b | 15 | |
1b99a704 | 16 | #define PCIUTILS_SETPCI |
e4842ff3 MM |
17 | #include "pciutils.h" |
18 | ||
19 | static int force; /* Don't complain if no devices match */ | |
20 | static int verbose; /* Verbosity level */ | |
b2c9b373 | 21 | static int demo_mode; /* Only show */ |
e4842ff3 | 22 | |
81afa98c MM |
23 | const char program_name[] = "setpci"; |
24 | ||
727ce158 | 25 | static struct pci_access *pacc; |
e4842ff3 | 26 | |
b7351143 MM |
27 | struct value { |
28 | unsigned int value; | |
29 | unsigned int mask; | |
30 | }; | |
31 | ||
e4842ff3 MM |
32 | struct op { |
33 | struct op *next; | |
727ce158 | 34 | struct pci_dev **dev_vector; |
27d4e0fb MM |
35 | u16 cap_type; /* PCI_CAP_xxx or 0 */ |
36 | u16 cap_id; | |
e4842ff3 MM |
37 | unsigned int addr; |
38 | unsigned int width; /* Byte width of the access */ | |
ace49a96 | 39 | unsigned int num_values; /* Number of values to write; 0=read */ |
b7351143 | 40 | struct value values[0]; |
e4842ff3 MM |
41 | }; |
42 | ||
43 | static struct op *first_op, **last_op = &first_op; | |
b7351143 | 44 | static unsigned int max_values[] = { 0, 0xff, 0xffff, 0, 0xffffffff }; |
e4842ff3 | 45 | |
727ce158 | 46 | static struct pci_dev ** |
e4842ff3 MM |
47 | select_devices(struct pci_filter *filt) |
48 | { | |
727ce158 | 49 | struct pci_dev *z, **a, **b; |
e4842ff3 MM |
50 | int cnt = 1; |
51 | ||
de7ef8bc | 52 | for (z=pacc->devices; z; z=z->next) |
727ce158 | 53 | if (pci_filter_match(filt, z)) |
e4842ff3 MM |
54 | cnt++; |
55 | a = b = xmalloc(sizeof(struct device *) * cnt); | |
de7ef8bc | 56 | for (z=pacc->devices; z; z=z->next) |
727ce158 | 57 | if (pci_filter_match(filt, z)) |
e4842ff3 MM |
58 | *a++ = z; |
59 | *a = NULL; | |
60 | return b; | |
61 | } | |
62 | ||
256fabef | 63 | static void PCI_PRINTF(1,2) |
f34b0c7a MM |
64 | trace(const char *fmt, ...) |
65 | { | |
66 | va_list args; | |
67 | va_start(args, fmt); | |
68 | if (verbose) | |
69 | vprintf(fmt, args); | |
70 | va_end(args); | |
71 | } | |
72 | ||
e4842ff3 | 73 | static void |
727ce158 | 74 | exec_op(struct op *op, struct pci_dev *dev) |
e4842ff3 | 75 | { |
f34b0c7a MM |
76 | const char * const formats[] = { NULL, " %02x", " %04x", NULL, " %08x" }; |
77 | const char * const mask_formats[] = { NULL, " %02x->(%02x:%02x)->%02x", " %04x->(%04x:%04x)->%04x", NULL, " %08x->(%08x:%08x)->%08x" }; | |
ace49a96 MM |
78 | unsigned int i, x, y; |
79 | int addr = 0; | |
b7351143 | 80 | int width = op->width; |
f34b0c7a | 81 | char slot[16]; |
e4842ff3 | 82 | |
f34b0c7a | 83 | sprintf(slot, "%04x:%02x:%02x.%x", dev->domain, dev->bus, dev->dev, dev->func); |
df59fab4 | 84 | trace("%s ", slot); |
27d4e0fb | 85 | if (op->cap_type) |
ace49a96 MM |
86 | { |
87 | struct pci_cap *cap; | |
27d4e0fb | 88 | cap = pci_find_cap(dev, op->cap_id, op->cap_type); |
ace49a96 MM |
89 | if (cap) |
90 | addr = cap->addr; | |
91 | else | |
f34b0c7a | 92 | die("%s: %s %04x not found", slot, ((op->cap_type == PCI_CAP_NORMAL) ? "Capability" : "Extended capability"), op->cap_id); |
df59fab4 | 93 | trace(((op->cap_type == PCI_CAP_NORMAL) ? "(cap %02x @%02x) " : "(ecap %04x @%03x) "), op->cap_id, addr); |
ace49a96 MM |
94 | } |
95 | addr += op->addr; | |
df59fab4 | 96 | trace("@%02x", addr); |
f34b0c7a MM |
97 | |
98 | /* We have already checked it when parsing, but addressing relative to capabilities can change the address. */ | |
99 | if (addr & (width-1)) | |
100 | die("%s: Unaligned access of width %d to register %04x", slot, width, addr); | |
101 | if (addr + width > 0x1000) | |
102 | die("%s: Access of width %d to register %04x out of range", slot, width, addr); | |
103 | ||
ace49a96 | 104 | if (op->num_values) |
b7351143 | 105 | { |
de7ef8bc | 106 | for (i=0; i<op->num_values; i++) |
b7351143 MM |
107 | { |
108 | if ((op->values[i].mask & max_values[width]) == max_values[width]) | |
109 | { | |
110 | x = op->values[i].value; | |
f34b0c7a | 111 | trace(formats[width], op->values[i].value); |
b7351143 MM |
112 | } |
113 | else | |
114 | { | |
115 | switch (width) | |
116 | { | |
117 | case 1: | |
118 | y = pci_read_byte(dev, addr); | |
119 | break; | |
120 | case 2: | |
121 | y = pci_read_word(dev, addr); | |
122 | break; | |
123 | default: | |
124 | y = pci_read_long(dev, addr); | |
125 | break; | |
126 | } | |
127 | x = (y & ~op->values[i].mask) | op->values[i].value; | |
f34b0c7a | 128 | trace(mask_formats[width], y, op->values[i].value, op->values[i].mask, x); |
b7351143 MM |
129 | } |
130 | if (!demo_mode) | |
131 | { | |
132 | switch (width) | |
133 | { | |
134 | case 1: | |
135 | pci_write_byte(dev, addr, x); | |
136 | break; | |
137 | case 2: | |
138 | pci_write_word(dev, addr, x); | |
139 | break; | |
140 | default: | |
141 | pci_write_long(dev, addr, x); | |
142 | break; | |
143 | } | |
144 | } | |
145 | addr += width; | |
146 | } | |
f34b0c7a | 147 | trace("\n"); |
b7351143 | 148 | } |
e4842ff3 MM |
149 | else |
150 | { | |
f34b0c7a | 151 | trace(" = "); |
b251f40b | 152 | switch (width) |
b2c9b373 | 153 | { |
b251f40b MM |
154 | case 1: |
155 | x = pci_read_byte(dev, addr); | |
156 | break; | |
157 | case 2: | |
158 | x = pci_read_word(dev, addr); | |
159 | break; | |
160 | default: | |
161 | x = pci_read_long(dev, addr); | |
162 | break; | |
b2c9b373 | 163 | } |
f34b0c7a | 164 | printf(formats[width]+1, x); |
b7351143 | 165 | putchar('\n'); |
e4842ff3 MM |
166 | } |
167 | } | |
168 | ||
169 | static void | |
170 | execute(struct op *op) | |
171 | { | |
727ce158 MM |
172 | struct pci_dev **vec = NULL; |
173 | struct pci_dev **pdev, *dev; | |
e4842ff3 MM |
174 | struct op *oops; |
175 | ||
176 | while (op) | |
177 | { | |
178 | pdev = vec = op->dev_vector; | |
179 | while (dev = *pdev++) | |
de7ef8bc | 180 | for (oops=op; oops && oops->dev_vector == vec; oops=oops->next) |
e4842ff3 MM |
181 | exec_op(oops, dev); |
182 | while (op && op->dev_vector == vec) | |
183 | op = op->next; | |
184 | } | |
185 | } | |
186 | ||
b2c9b373 MM |
187 | static void |
188 | scan_ops(struct op *op) | |
189 | { | |
89caa7b8 MM |
190 | if (demo_mode) |
191 | return; | |
b2c9b373 MM |
192 | while (op) |
193 | { | |
ace49a96 | 194 | if (op->num_values) |
727ce158 | 195 | pacc->writeable = 1; |
b2c9b373 MM |
196 | op = op->next; |
197 | } | |
198 | } | |
199 | ||
200 | struct reg_name { | |
ace49a96 | 201 | unsigned int cap; |
3fe8a38d MM |
202 | unsigned int offset; |
203 | unsigned int width; | |
b7351143 | 204 | const char *name; |
b2c9b373 MM |
205 | }; |
206 | ||
b7351143 | 207 | static const struct reg_name pci_reg_names[] = { |
ace49a96 MM |
208 | { 0, 0x00, 2, "VENDOR_ID" }, |
209 | { 0, 0x02, 2, "DEVICE_ID" }, | |
210 | { 0, 0x04, 2, "COMMAND" }, | |
211 | { 0, 0x06, 2, "STATUS" }, | |
212 | { 0, 0x08, 1, "REVISION" }, | |
213 | { 0, 0x09, 1, "CLASS_PROG" }, | |
214 | { 0, 0x0a, 2, "CLASS_DEVICE" }, | |
215 | { 0, 0x0c, 1, "CACHE_LINE_SIZE" }, | |
216 | { 0, 0x0d, 1, "LATENCY_TIMER" }, | |
217 | { 0, 0x0e, 1, "HEADER_TYPE" }, | |
218 | { 0, 0x0f, 1, "BIST" }, | |
219 | { 0, 0x10, 4, "BASE_ADDRESS_0" }, | |
220 | { 0, 0x14, 4, "BASE_ADDRESS_1" }, | |
221 | { 0, 0x18, 4, "BASE_ADDRESS_2" }, | |
222 | { 0, 0x1c, 4, "BASE_ADDRESS_3" }, | |
223 | { 0, 0x20, 4, "BASE_ADDRESS_4" }, | |
224 | { 0, 0x24, 4, "BASE_ADDRESS_5" }, | |
225 | { 0, 0x28, 4, "CARDBUS_CIS" }, | |
226 | { 0, 0x2c, 4, "SUBSYSTEM_VENDOR_ID" }, | |
227 | { 0, 0x2e, 2, "SUBSYSTEM_ID" }, | |
228 | { 0, 0x30, 4, "ROM_ADDRESS" }, | |
229 | { 0, 0x3c, 1, "INTERRUPT_LINE" }, | |
230 | { 0, 0x3d, 1, "INTERRUPT_PIN" }, | |
231 | { 0, 0x3e, 1, "MIN_GNT" }, | |
232 | { 0, 0x3f, 1, "MAX_LAT" }, | |
233 | { 0, 0x18, 1, "PRIMARY_BUS" }, | |
234 | { 0, 0x19, 1, "SECONDARY_BUS" }, | |
235 | { 0, 0x1a, 1, "SUBORDINATE_BUS" }, | |
236 | { 0, 0x1b, 1, "SEC_LATENCY_TIMER" }, | |
237 | { 0, 0x1c, 1, "IO_BASE" }, | |
238 | { 0, 0x1d, 1, "IO_LIMIT" }, | |
239 | { 0, 0x1e, 2, "SEC_STATUS" }, | |
240 | { 0, 0x20, 2, "MEMORY_BASE" }, | |
241 | { 0, 0x22, 2, "MEMORY_LIMIT" }, | |
242 | { 0, 0x24, 2, "PREF_MEMORY_BASE" }, | |
243 | { 0, 0x26, 2, "PREF_MEMORY_LIMIT" }, | |
244 | { 0, 0x28, 4, "PREF_BASE_UPPER32" }, | |
245 | { 0, 0x2c, 4, "PREF_LIMIT_UPPER32" }, | |
246 | { 0, 0x30, 2, "IO_BASE_UPPER16" }, | |
247 | { 0, 0x32, 2, "IO_LIMIT_UPPER16" }, | |
248 | { 0, 0x38, 4, "BRIDGE_ROM_ADDRESS" }, | |
249 | { 0, 0x3e, 2, "BRIDGE_CONTROL" }, | |
250 | { 0, 0x10, 4, "CB_CARDBUS_BASE" }, | |
251 | { 0, 0x14, 2, "CB_CAPABILITIES" }, | |
252 | { 0, 0x16, 2, "CB_SEC_STATUS" }, | |
253 | { 0, 0x18, 1, "CB_BUS_NUMBER" }, | |
254 | { 0, 0x19, 1, "CB_CARDBUS_NUMBER" }, | |
255 | { 0, 0x1a, 1, "CB_SUBORDINATE_BUS" }, | |
256 | { 0, 0x1b, 1, "CB_CARDBUS_LATENCY" }, | |
257 | { 0, 0x1c, 4, "CB_MEMORY_BASE_0" }, | |
258 | { 0, 0x20, 4, "CB_MEMORY_LIMIT_0" }, | |
259 | { 0, 0x24, 4, "CB_MEMORY_BASE_1" }, | |
260 | { 0, 0x28, 4, "CB_MEMORY_LIMIT_1" }, | |
261 | { 0, 0x2c, 2, "CB_IO_BASE_0" }, | |
262 | { 0, 0x2e, 2, "CB_IO_BASE_0_HI" }, | |
263 | { 0, 0x30, 2, "CB_IO_LIMIT_0" }, | |
264 | { 0, 0x32, 2, "CB_IO_LIMIT_0_HI" }, | |
265 | { 0, 0x34, 2, "CB_IO_BASE_1" }, | |
266 | { 0, 0x36, 2, "CB_IO_BASE_1_HI" }, | |
267 | { 0, 0x38, 2, "CB_IO_LIMIT_1" }, | |
268 | { 0, 0x3a, 2, "CB_IO_LIMIT_1_HI" }, | |
269 | { 0, 0x40, 2, "CB_SUBSYSTEM_VENDOR_ID" }, | |
270 | { 0, 0x42, 2, "CB_SUBSYSTEM_ID" }, | |
271 | { 0, 0x44, 4, "CB_LEGACY_MODE_BASE" }, | |
272 | { 0x10001, 0, 0, "CAP_PM" }, | |
273 | { 0x10002, 0, 0, "CAP_AGP" }, | |
274 | { 0x10003, 0, 0, "CAP_VPD" }, | |
275 | { 0x10004, 0, 0, "CAP_SLOTID" }, | |
276 | { 0x10005, 0, 0, "CAP_MSI" }, | |
277 | { 0x10006, 0, 0, "CAP_CHSWP" }, | |
278 | { 0x10007, 0, 0, "CAP_PCIX" }, | |
279 | { 0x10008, 0, 0, "CAP_HT" }, | |
280 | { 0x10009, 0, 0, "CAP_VNDR" }, | |
281 | { 0x1000a, 0, 0, "CAP_DBG" }, | |
282 | { 0x1000b, 0, 0, "CAP_CCRC" }, | |
283 | { 0x1000c, 0, 0, "CAP_HOTPLUG" }, | |
284 | { 0x1000d, 0, 0, "CAP_SSVID" }, | |
285 | { 0x1000e, 0, 0, "CAP_AGP3" }, | |
286 | { 0x1000f, 0, 0, "CAP_SECURE" }, | |
287 | { 0x10010, 0, 0, "CAP_EXP" }, | |
288 | { 0x10011, 0, 0, "CAP_MSIX" }, | |
289 | { 0x10012, 0, 0, "CAP_SATA" }, | |
290 | { 0x10013, 0, 0, "CAP_AF" }, | |
291 | { 0x20001, 0, 0, "ECAP_AER" }, | |
292 | { 0x20002, 0, 0, "ECAP_VC" }, | |
293 | { 0x20003, 0, 0, "ECAP_DSN" }, | |
294 | { 0x20004, 0, 0, "ECAP_PB" }, | |
295 | { 0x20005, 0, 0, "ECAP_RCLINK" }, | |
296 | { 0x20006, 0, 0, "ECAP_RCILINK" }, | |
297 | { 0x20007, 0, 0, "ECAP_RCECOLL" }, | |
298 | { 0x20008, 0, 0, "ECAP_MFVC" }, | |
299 | { 0x2000a, 0, 0, "ECAP_RBCB" }, | |
300 | { 0x2000b, 0, 0, "ECAP_VNDR" }, | |
301 | { 0x2000d, 0, 0, "ECAP_ACS" }, | |
302 | { 0x2000e, 0, 0, "ECAP_ARI" }, | |
303 | { 0x2000f, 0, 0, "ECAP_ATS" }, | |
304 | { 0x20010, 0, 0, "ECAP_SRIOV" }, | |
305 | { 0, 0, 0, NULL } | |
b2c9b373 MM |
306 | }; |
307 | ||
a82ca638 MM |
308 | static void |
309 | dump_registers(void) | |
310 | { | |
311 | const struct reg_name *r; | |
312 | ||
313 | printf("cap pos w name\n"); | |
314 | for (r = pci_reg_names; r->name; r++) | |
315 | { | |
316 | if (r->cap >= 0x20000) | |
317 | printf("%04x", r->cap - 0x20000); | |
318 | else if (r->cap) | |
319 | printf(" %02x", r->cap - 0x10000); | |
320 | else | |
321 | printf(" "); | |
322 | printf(" %02x %c %s\n", r->offset, "-BW?L"[r->width], r->name); | |
323 | } | |
324 | } | |
325 | ||
fa8deaa6 MM |
326 | static void NONRET |
327 | usage(void) | |
e4842ff3 MM |
328 | { |
329 | fprintf(stderr, | |
6add52f5 | 330 | "Usage: setpci [<options>] (<device>+ <reg>[=<values>]*)*\n" |
1b99a704 MM |
331 | "\n" |
332 | "General options:\n" | |
6add52f5 MM |
333 | "-f\t\tDon't complain if there's nothing to do\n" |
334 | "-v\t\tBe verbose\n" | |
335 | "-D\t\tList changes, don't commit them\n" | |
a82ca638 | 336 | "--dumpregs\tDump all known register names and exit\n" |
1b99a704 MM |
337 | "\n" |
338 | "PCI access options:\n" | |
727ce158 | 339 | GENERIC_HELP |
1b99a704 MM |
340 | "\n" |
341 | "Setting commands:\n" | |
84c8d1bb | 342 | "<device>:\t-s [[[<domain>]:][<bus>]:][<slot>][.[<func>]]\n" |
ace49a96 MM |
343 | "\t\t-d [<vendor>]:[<device>]\n" |
344 | "<reg>:\t\t<base>[+<offset>][.(B|W|L)]\n" | |
345 | "<base>:\t\t<address>\n" | |
346 | "\t\t<named-register>\n" | |
347 | "\t\t[E]CAP_<capability-name>\n" | |
348 | "\t\t[E]CAP<capability-number>\n" | |
b7351143 MM |
349 | "<values>:\t<value>[,<value>...]\n" |
350 | "<value>:\t<hex>\n" | |
ace49a96 | 351 | "\t\t<hex>:<mask>\n"); |
fa8deaa6 MM |
352 | exit(0); |
353 | } | |
354 | ||
355 | static void NONRET PCI_PRINTF(1,2) | |
356 | parse_err(const char *msg, ...) | |
357 | { | |
358 | va_list args; | |
359 | va_start(args, msg); | |
360 | fprintf(stderr, "setpci: "); | |
361 | vfprintf(stderr, msg, args); | |
362 | fprintf(stderr, ".\nTry `setpci --help' for more information.\n"); | |
e4842ff3 MM |
363 | exit(1); |
364 | } | |
365 | ||
7b08ebab MM |
366 | static int |
367 | parse_options(int argc, char **argv) | |
e4842ff3 | 368 | { |
fa8deaa6 | 369 | const char opts[] = GENERIC_OPTIONS; |
7b08ebab | 370 | int i=1; |
e4842ff3 | 371 | |
fa8deaa6 | 372 | if (argc == 2) |
a82ca638 | 373 | { |
fa8deaa6 MM |
374 | if (!strcmp(argv[1], "--help")) |
375 | usage(); | |
376 | if (!strcmp(argv[1], "--version")) | |
377 | puts("setpci version " PCIUTILS_VERSION); | |
378 | if (!strcmp(argv[1], "--dumpregs")) | |
379 | dump_registers(); | |
a82ca638 MM |
380 | exit(0); |
381 | } | |
727ce158 | 382 | |
7b08ebab | 383 | while (i < argc && argv[i][0] == '-') |
e4842ff3 | 384 | { |
b69fad0d | 385 | char *c = argv[i++] + 1; |
e4842ff3 | 386 | char *d = c; |
727ce158 | 387 | char *e; |
e4842ff3 MM |
388 | while (*c) |
389 | switch (*c) | |
390 | { | |
7b08ebab MM |
391 | case 0: |
392 | break; | |
e4842ff3 MM |
393 | case 'v': |
394 | verbose++; | |
395 | c++; | |
396 | break; | |
397 | case 'f': | |
398 | force++; | |
399 | c++; | |
400 | break; | |
b2c9b373 MM |
401 | case 'D': |
402 | demo_mode++; | |
403 | c++; | |
404 | break; | |
e4842ff3 | 405 | default: |
727ce158 MM |
406 | if (e = strchr(opts, *c)) |
407 | { | |
408 | char *arg; | |
409 | c++; | |
410 | if (e[1] == ':') | |
411 | { | |
412 | if (*c) | |
413 | arg = c; | |
b69fad0d MM |
414 | else if (i < argc) |
415 | arg = argv[i++]; | |
727ce158 | 416 | else |
fa8deaa6 | 417 | parse_err("Option -%c requires an argument", *e); |
727ce158 MM |
418 | c = ""; |
419 | } | |
420 | else | |
421 | arg = NULL; | |
422 | if (!parse_generic_option(*e, pacc, arg)) | |
fa8deaa6 | 423 | parse_err("Unable to parse option -%c", *e); |
727ce158 MM |
424 | } |
425 | else | |
426 | { | |
427 | if (c != d) | |
fa8deaa6 | 428 | parse_err("Invalid or misplaced option -%c", *c); |
b69fad0d | 429 | return i-1; |
727ce158 | 430 | } |
e4842ff3 | 431 | } |
e4842ff3 | 432 | } |
e4842ff3 | 433 | |
7b08ebab MM |
434 | return i; |
435 | } | |
e4842ff3 | 436 | |
b69fad0d MM |
437 | static int parse_filter(int argc, char **argv, int i, struct pci_filter *filter) |
438 | { | |
439 | char *c = argv[i++]; | |
440 | char *d; | |
441 | ||
442 | if (!c[1] || !strchr("sd", c[1])) | |
fa8deaa6 | 443 | parse_err("Invalid option -%c", c[1]); |
b69fad0d MM |
444 | if (c[2]) |
445 | d = (c[2] == '=') ? c+3 : c+2; | |
446 | else if (i < argc) | |
447 | d = argv[i++]; | |
448 | else | |
fa8deaa6 | 449 | parse_err("Option -%c requires an argument", c[1]); |
b69fad0d MM |
450 | switch (c[1]) |
451 | { | |
452 | case 's': | |
453 | if (d = pci_filter_parse_slot(filter, d)) | |
fa8deaa6 | 454 | parse_err("Unable to parse filter -s %s", d); |
b69fad0d MM |
455 | break; |
456 | case 'd': | |
457 | if (d = pci_filter_parse_id(filter, d)) | |
fa8deaa6 | 458 | parse_err("Unable to parse filter -d %s", d); |
b69fad0d MM |
459 | break; |
460 | default: | |
fa8deaa6 | 461 | parse_err("Unknown filter option -%c", c[1]); |
b69fad0d MM |
462 | } |
463 | ||
464 | return i; | |
465 | } | |
466 | ||
ace49a96 MM |
467 | static const struct reg_name *parse_reg_name(char *name) |
468 | { | |
469 | const struct reg_name *r; | |
470 | ||
471 | for (r = pci_reg_names; r->name; r++) | |
472 | if (!strcasecmp(r->name, name)) | |
473 | return r; | |
474 | return NULL; | |
475 | } | |
476 | ||
477 | static int parse_x32(char *c, char **stopp, unsigned int *resp) | |
478 | { | |
479 | char *stop; | |
480 | ||
481 | if (!*c) | |
482 | return -1; | |
483 | errno = 0; | |
484 | unsigned long int l = strtoul(c, &stop, 16); | |
485 | if (errno) | |
486 | return -1; | |
487 | if ((l & ~0U) != l) | |
488 | return -1; | |
489 | *resp = l; | |
490 | if (*stop) | |
491 | { | |
492 | if (stopp) | |
493 | *stopp = stop; | |
494 | return 0; | |
495 | } | |
496 | else | |
497 | return 1; | |
498 | } | |
499 | ||
500 | static void parse_register(struct op *op, char *base) | |
501 | { | |
502 | const struct reg_name *r; | |
27d4e0fb | 503 | unsigned int cap; |
ace49a96 | 504 | |
27d4e0fb | 505 | op->cap_type = op->cap_id = 0; |
ace49a96 | 506 | if (parse_x32(base, NULL, &op->addr) > 0) |
27d4e0fb | 507 | return; |
ace49a96 MM |
508 | else if (r = parse_reg_name(base)) |
509 | { | |
27d4e0fb MM |
510 | switch (r->cap & 0xff0000) |
511 | { | |
512 | case 0x10000: | |
513 | op->cap_type = PCI_CAP_NORMAL; | |
514 | break; | |
515 | case 0x20000: | |
516 | op->cap_type = PCI_CAP_EXTENDED; | |
517 | break; | |
518 | } | |
519 | op->cap_id = r->cap & 0xffff; | |
ace49a96 MM |
520 | op->addr = r->offset; |
521 | if (r->width && !op->width) | |
522 | op->width = r->width; | |
523 | return; | |
524 | } | |
525 | else if (!strncasecmp(base, "CAP", 3)) | |
526 | { | |
27d4e0fb | 527 | if (parse_x32(base+3, NULL, &cap) > 0 && cap < 0x100) |
ace49a96 | 528 | { |
27d4e0fb MM |
529 | op->cap_type = PCI_CAP_NORMAL; |
530 | op->cap_id = cap; | |
ace49a96 MM |
531 | op->addr = 0; |
532 | return; | |
533 | } | |
534 | } | |
535 | else if (!strncasecmp(base, "ECAP", 4)) | |
536 | { | |
27d4e0fb | 537 | if (parse_x32(base+4, NULL, &cap) > 0 && cap < 0x1000) |
ace49a96 | 538 | { |
27d4e0fb MM |
539 | op->cap_type = PCI_CAP_EXTENDED; |
540 | op->cap_id = cap; | |
ace49a96 MM |
541 | op->addr = 0; |
542 | return; | |
543 | } | |
544 | } | |
fa8deaa6 | 545 | parse_err("Unknown register \"%s\"", base); |
ace49a96 MM |
546 | } |
547 | ||
b69fad0d MM |
548 | static void parse_op(char *c, struct pci_dev **selected_devices) |
549 | { | |
ace49a96 MM |
550 | char *base, *offset, *width, *value; |
551 | char *e, *f; | |
b69fad0d MM |
552 | int n, j; |
553 | struct op *op; | |
ace49a96 MM |
554 | |
555 | /* Split the argument */ | |
556 | base = xstrdup(c); | |
557 | if (value = strchr(base, '=')) | |
558 | *value++ = 0; | |
559 | if (width = strchr(base, '.')) | |
560 | *width++ = 0; | |
561 | if (offset = strchr(base, '+')) | |
562 | *offset++ = 0; | |
b69fad0d MM |
563 | |
564 | /* Look for setting of values and count how many */ | |
b69fad0d | 565 | n = 0; |
ace49a96 | 566 | if (value) |
b69fad0d | 567 | { |
ace49a96 | 568 | if (!*value) |
fa8deaa6 | 569 | parse_err("Missing value"); |
b69fad0d | 570 | n++; |
ace49a96 | 571 | for (e=value; *e; e++) |
b69fad0d MM |
572 | if (*e == ',') |
573 | n++; | |
574 | } | |
575 | ||
576 | /* Allocate the operation */ | |
577 | op = xmalloc(sizeof(struct op) + n*sizeof(struct value)); | |
578 | op->dev_vector = selected_devices; | |
579 | op->num_values = n; | |
580 | ||
ace49a96 MM |
581 | /* What is the width suffix? */ |
582 | if (width) | |
b69fad0d | 583 | { |
ace49a96 | 584 | if (width[1]) |
fa8deaa6 | 585 | parse_err("Invalid width \"%s\"", width); |
ace49a96 | 586 | switch (*width & 0xdf) |
b69fad0d MM |
587 | { |
588 | case 'B': | |
589 | op->width = 1; break; | |
590 | case 'W': | |
591 | op->width = 2; break; | |
592 | case 'L': | |
593 | op->width = 4; break; | |
594 | default: | |
fa8deaa6 | 595 | parse_err("Invalid width \"%c\"", *width); |
b69fad0d MM |
596 | } |
597 | } | |
598 | else | |
ace49a96 MM |
599 | op->width = 0; |
600 | ||
601 | /* Find the register */ | |
602 | parse_register(op, base); | |
603 | if (!op->width) | |
fa8deaa6 | 604 | parse_err("Missing width"); |
ace49a96 MM |
605 | |
606 | /* Add offset */ | |
607 | if (offset) | |
b69fad0d | 608 | { |
ace49a96 MM |
609 | unsigned int off; |
610 | if (parse_x32(offset, NULL, &off) <= 0 || off >= 0x1000) | |
fa8deaa6 | 611 | parse_err("Invalid offset \"%s\"", offset); |
ace49a96 | 612 | op->addr += off; |
b69fad0d | 613 | } |
ace49a96 MM |
614 | |
615 | /* Check range */ | |
616 | if (op->addr >= 0x1000 || op->addr + op->width*(n ? n : 1) > 0x1000) | |
fa8deaa6 | 617 | parse_err("Register number %02x out of range", op->addr); |
ace49a96 | 618 | if (op->addr & (op->width - 1)) |
fa8deaa6 | 619 | parse_err("Unaligned register address %02x", op->addr); |
ace49a96 MM |
620 | |
621 | /* Parse the values */ | |
b69fad0d MM |
622 | for (j=0; j<n; j++) |
623 | { | |
ace49a96 MM |
624 | unsigned int ll, lim; |
625 | e = strchr(value, ','); | |
b69fad0d MM |
626 | if (e) |
627 | *e++ = 0; | |
ace49a96 | 628 | if (parse_x32(value, &f, &ll) < 0 || *f && *f != ':') |
fa8deaa6 | 629 | parse_err("Invalid value \"%s\"", value); |
b69fad0d | 630 | lim = max_values[op->width]; |
b69fad0d | 631 | if (ll > lim && ll < ~0UL - lim) |
fa8deaa6 | 632 | parse_err("Value \"%s\" is out of range", value); |
b69fad0d | 633 | op->values[j].value = ll; |
ace49a96 | 634 | if (*f == ':') |
b69fad0d | 635 | { |
ace49a96 | 636 | if (parse_x32(f+1, NULL, &ll) <= 0) |
fa8deaa6 | 637 | parse_err("Invalid mask \"%s\"", f+1); |
b69fad0d | 638 | if (ll > lim && ll < ~0UL - lim) |
fa8deaa6 | 639 | parse_err("Mask \"%s\" is out of range", f+1); |
b69fad0d MM |
640 | op->values[j].mask = ll; |
641 | op->values[j].value &= ll; | |
642 | } | |
643 | else | |
644 | op->values[j].mask = ~0U; | |
ace49a96 | 645 | value = e; |
b69fad0d | 646 | } |
ace49a96 | 647 | |
b69fad0d MM |
648 | *last_op = op; |
649 | last_op = &op->next; | |
650 | op->next = NULL; | |
651 | } | |
652 | ||
7b08ebab MM |
653 | static void parse_ops(int argc, char **argv, int i) |
654 | { | |
655 | enum { STATE_INIT, STATE_GOT_FILTER, STATE_GOT_OP } state = STATE_INIT; | |
656 | struct pci_filter filter; | |
657 | struct pci_dev **selected_devices = NULL; | |
658 | ||
659 | while (i < argc) | |
e4842ff3 | 660 | { |
b69fad0d | 661 | char *c = argv[i++]; |
e4842ff3 MM |
662 | |
663 | if (*c == '-') | |
664 | { | |
e4842ff3 | 665 | if (state != STATE_GOT_FILTER) |
b69fad0d MM |
666 | pci_filter_init(pacc, &filter); |
667 | i = parse_filter(argc, argv, i-1, &filter); | |
668 | state = STATE_GOT_FILTER; | |
e4842ff3 | 669 | } |
e4842ff3 MM |
670 | else |
671 | { | |
b69fad0d | 672 | if (state == STATE_INIT) |
fa8deaa6 | 673 | parse_err("Filter specification expected"); |
e4842ff3 MM |
674 | if (state == STATE_GOT_FILTER) |
675 | selected_devices = select_devices(&filter); | |
676 | if (!selected_devices[0] && !force) | |
fa8deaa6 | 677 | fprintf(stderr, "setpci: Warning: No devices selected for \"%s\".\n", c); |
b69fad0d | 678 | parse_op(c, selected_devices); |
e4842ff3 | 679 | state = STATE_GOT_OP; |
e4842ff3 | 680 | } |
e4842ff3 MM |
681 | } |
682 | if (state == STATE_INIT) | |
fa8deaa6 | 683 | parse_err("No operation specified"); |
7b08ebab MM |
684 | } |
685 | ||
686 | int | |
687 | main(int argc, char **argv) | |
688 | { | |
689 | int i; | |
690 | ||
691 | pacc = pci_alloc(); | |
692 | pacc->error = die; | |
693 | i = parse_options(argc, argv); | |
694 | ||
695 | pci_init(pacc); | |
696 | pci_scan_bus(pacc); | |
e4842ff3 | 697 | |
7b08ebab | 698 | parse_ops(argc, argv, i); |
b2c9b373 | 699 | scan_ops(first_op); |
e4842ff3 MM |
700 | execute(first_op); |
701 | ||
702 | return 0; | |
703 | } |