lspci: Use #defines for greppability

[thirdparty/pciutils.git] / ls-caps.c

diff --git a/ls-caps.c b/ls-caps.c
index 2d3b59dd323428497c84ef4d4e379c76fbb09eba..0ca46fb3db688b0dd41da4a1aacf9f1154fd341d 100644 (file)
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -25,7 +25,7 @@ cap_pm(struct device *d, int where, int cap)
         FLAG(cap, PCI_PM_CAP_DSI),
         FLAG(cap, PCI_PM_CAP_D1),
         FLAG(cap, PCI_PM_CAP_D2),
-        pm_aux_current[(cap >> 6) & 7],
+        pm_aux_current[(cap & PCI_PM_CAP_AUX_C_MASK) >> 6],
         FLAG(cap, PCI_PM_CAP_PME_D0),
         FLAG(cap, PCI_PM_CAP_PME_D1),
         FLAG(cap, PCI_PM_CAP_PME_D2),
@@ -136,17 +136,17 @@ cap_pcix_nobridge(struct device *d, int where)
         1 << (9 + ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U)),
         max_outstanding[(command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U]);
   printf("\t\tStatus: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c DC=%s DMMRBC=%u DMOST=%u DMCRS=%u RSCEM%c 266MHz%c 533MHz%c\n",
-        ((status >> 8) & 0xff),
-        ((status >> 3) & 0x1f),
+        (status & PCI_PCIX_STATUS_BUS) >> 8,
+        (status & PCI_PCIX_STATUS_DEVICE) >> 3,
         (status & PCI_PCIX_STATUS_FUNCTION),
         FLAG(status, PCI_PCIX_STATUS_64BIT),
         FLAG(status, PCI_PCIX_STATUS_133MHZ),
         FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED),
         FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC),
         ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"),
-        1 << (9 + ((status >> 21) & 3U)),
-        max_outstanding[(status >> 23) & 7U],
-        1 << (3 + ((status >> 26) & 7U)),
+        1 << (9 + ((status & PCI_PCIX_STATUS_DESIGNED_MAX_MEM_READ_BYTE_COUNT) >> 21)),
+        max_outstanding[(status & PCI_PCIX_STATUS_DESIGNED_MAX_OUTSTANDING_SPLIT_TRANS) >> 23],
+        1 << (3 + ((status & PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE) >> 26)),
         FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS),
         FLAG(status, PCI_PCIX_STATUS_266MHZ),
         FLAG(status, PCI_PCIX_STATUS_533MHZ));
@@ -175,11 +175,11 @@ cap_pcix_bridge(struct device *d, int where)
         FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC),
         FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN),
         FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED),
-        sec_clock_freq[(secstatus >> 6) & 7]);
+        sec_clock_freq[(secstatus & PCI_PCIX_BRIDGE_SEC_STATUS_CLOCK_FREQ) >> 6]);
   status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS);
   printf("\t\tStatus: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c SCO%c SRD%c\n",
-        ((status >> 8) & 0xff),
-        ((status >> 3) & 0x1f),
+        (status & PCI_PCIX_BRIDGE_STATUS_BUS) >> 8,
+        (status & PCI_PCIX_BRIDGE_STATUS_DEVICE) >> 3,
         (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION),
         FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT),
         FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ),
@@ -758,16 +758,25 @@ static const char *aspm_enabled(int code)
 
 static void cap_express_link(struct device *d, int where, int type)
 {
-  u32 t;
+  u32 t, aspm;
   u16 w;
 
   t = get_conf_long(d, where + PCI_EXP_LNKCAP);
-  printf("\t\tLnkCap:\tPort #%d, Speed %s, Width x%d, ASPM %s, Exit Latency L0s %s, L1 %s\n",
+  aspm = (t & PCI_EXP_LNKCAP_ASPM) >> 10;
+  printf("\t\tLnkCap:\tPort #%d, Speed %s, Width x%d, ASPM %s",
        t >> 24,
        link_speed(t & PCI_EXP_LNKCAP_SPEED), (t & PCI_EXP_LNKCAP_WIDTH) >> 4,
-       aspm_support((t & PCI_EXP_LNKCAP_ASPM) >> 10),
-       latency_l0s((t & PCI_EXP_LNKCAP_L0S) >> 12),
-       latency_l1((t & PCI_EXP_LNKCAP_L1) >> 15));
+       aspm_support(aspm));
+  if (aspm)
+    {
+      printf(", Exit Latency ");
+      if (aspm & 1)
+       printf("L0s %s", latency_l0s((t & PCI_EXP_LNKCAP_L0S) >> 12));
+      if (aspm & 2)
+       printf("%sL1 %s", (aspm & 1) ? ", " : "",
+           latency_l1((t & PCI_EXP_LNKCAP_L1) >> 15));
+    }
+  printf("\n");
   printf("\t\t\tClockPM%c Surprise%c LLActRep%c BwNot%c ASPMOptComp%c\n",
        FLAG(t, PCI_EXP_LNKCAP_CLOCKPM),
        FLAG(t, PCI_EXP_LNKCAP_SURPRISE),
@@ -822,7 +831,7 @@ static void cap_express_slot(struct device *d, int where)
        FLAG(t, PCI_EXP_SLTCAP_HPC),
        FLAG(t, PCI_EXP_SLTCAP_HPS));
   printf("\t\t\tSlot #%d, PowerLimit %.3fW; Interlock%c NoCompl%c\n",
-       t >> 19,
+       (t & PCI_EXP_SLTCAP_PSN) >> 19,
        power_limit((t & PCI_EXP_SLTCAP_PWR_VAL) >> 7, (t & PCI_EXP_SLTCAP_PWR_SCL) >> 15),
        FLAG(t, PCI_EXP_SLTCAP_INTERLOCK),
        FLAG(t, PCI_EXP_SLTCAP_NOCMDCOMP));