]> git.ipfire.org Git - thirdparty/pciutils.git/commitdiff
lspci: Reorder PCIe DevCtl2 fields to match spec
authorBjorn Helgaas <bhelgaas@google.com>
Wed, 18 Oct 2023 16:08:29 +0000 (11:08 -0500)
committerMartin Mares <mj@ucw.cz>
Wed, 18 Oct 2023 18:57:04 +0000 (20:57 +0200)
Decode the PCIe DevCtl2 fields in the same order they're documented in the
PCIe spec.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
ls-caps.c

index 1b63262ef005af674043193e680641ffa884a73f..beb7446a926e60eedd0b5f544b4493069a936250 100644 (file)
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -1153,12 +1153,9 @@ static void cap_express_dev2(struct device *d, int where, int type)
     }
 
   w = get_conf_word(d, where + PCI_EXP_DEVCTL2);
-  printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c 10BitTagReq%c OBFF %s,",
+  printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c",
        cap_express_dev2_timeout_value(PCI_EXP_DEVCTL2_TIMEOUT_VALUE(w)),
-       FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS),
-       FLAG(w, PCI_EXP_DEVCTL2_LTR),
-       FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ),
-       cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w)));
+       FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS));
   if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM)
     printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEVCTL2_ARI));
   else
@@ -1176,6 +1173,10 @@ static void cap_express_dev2(struct device *d, int where, int type)
         printf(" EgressBlck%c", FLAG(w, PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK));
       printf("\n");
     }
+  printf("\t\t\t LTR%c 10BitTagReq%c OBFF %s\n",
+       FLAG(w, PCI_EXP_DEVCTL2_LTR),
+       FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ),
+       cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w)));
 }
 
 static const char *cap_express_link2_speed_cap(int vector)