lspci: Fix detection of memory space bar

intel-conf1 backend never show AtomicOpsCap: capabilities despite the fact
that is successfuly detects memory bars on device. But other backends show
this capability.

Error is in device_has_memory_space_bar() function, it expects that ->size
member is always filled. But size of the BAR is not available in PCI config
space and therefore raw backends cannot retrieve it.

Probably intention of the non-zero check was to verify that base address
was filled with non-zero size. So either base address is non-zero or length
is non-zero. Adjust check.

diff --git a/ls-caps.c b/ls-caps.c
index 3e19cabed4addfaa6a33867fa6dd64b822249b0c..a481b16b8578a9e717954be8629c07244d15e04b 100644 (file)
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -1083,7 +1083,7 @@ device_has_memory_space_bar(struct device *d)
   int i, found = 0;
 
   for (i=0; i<6; i++)
-    if (p->base_addr[i] && p->size[i])
+    if (p->base_addr[i] || p->size[i])
       {
         if (!(p->base_addr[i] & PCI_BASE_ADDRESS_SPACE_IO))
           {