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Update version for v2.11.0-rc2 release
2017-11-19  Suraj Jitindar Singhtarget/ppc: Update setting of cpu features to account...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-07-11  Suraj Jitindar Singhtarget/ppc: Add debug function for radix mmu translation
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-07-11  Suraj Jitindar Singhtarget/ppc: Refactor tcg radix mmu code
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-06-30  Suraj Jitindar Singhtarget/ppc: Fix return value in tcg radix mmu fault...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-06-29  Suraj Jitindar Singhmonitor: Add -a (all) option to info registers
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-06-05  Suraj Jitindar Singhtarget/ppc: Fixup set_spr error in h_register_process_table
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-06-04  Suraj Jitindar Singhhelp: Add newline to end of thread option help text
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-05-10  Suraj Jitindar Singhtarget/ppc: Enable RADIX mmu mode for pseries TCG guest
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-05-10  Suraj Jitindar Singhtarget/ppc: Implement ISA V3.00 radix page fault handler
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-05-10  Suraj Jitindar Singhtarget/ppc: Change tlbie invalid fields for POWER9...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-05-10  Suraj Jitindar Singhtarget/ppc: Update tlbie to check privilege level based...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-05-10  Suraj Jitindar Singhtarget/ppc: Set UPRT and GTSE on all cpus in H_REGISTER_PROC...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-04-26  Suraj Jitindar Singhtarget/ppc: Flush TLB on write to PIDR
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-04-26  Suraj Jitindar Singhtarget/ppc: Add ibm,processor-radix-AP-encodings for TCG
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-04-26  Suraj Jitindar Singhtarget/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-04-26  Suraj Jitindar Singhtarget/ppc: Add new H-CALL shells for in memory table...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc: Rework hash mmu page fault code and add...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc: Move no-execute and guarded page checking...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc: Add execute permission checking to access...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc: Add Instruction Authority Mask Register...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhhw/ppc/spapr: Add POWER9 to pseries cpu models
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc/POWER9: Add cpu_has_work function for POWER9
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc/POWER9: Add POWER9 pa-features definition
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc/POWER9: Add POWER9 mmu fault handler
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc: Don't gen an SDR1 on POWER9 and rework...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc: Add patb_entry to sPAPRMachineState
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-03  Suraj Jitindar Singhtarget/ppc: Add POWER9/ISAv3.00 to compat_table
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-03-01  Suraj Jitindar Singhtarget/ppc: Remove the function ppc_hash64_set_sdr1()
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-22  Suraj Jitindar Singhtarget/ppc/POWER9: Direct all instr and data storage...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-22  Suraj Jitindar Singhtarget/ppc/POWER9: Adapt LPCR handling for POWER9
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-22  Suraj Jitindar Singhtarget/ppc/POWER9: Add ISAv3.00 MMU definition
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-22  Suraj Jitindar Singhtarget/ppc: Fix LPCR DPFD mask define
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-01  Suraj Jitindar Singhtarget/ppc/mmu_hash64: Fix incorrect shift value in...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-01  Suraj Jitindar Singhtarget/ppc/mmu_hash64: Fix printing unsigned as signed int
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-01  Suraj Jitindar Singhtcg/POWER9: NOOP the cp_abort instruction
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-02-01  Suraj Jitindar Singhtarget/ppc/debug: Print LPCR register value if register...
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-01-30  Suraj Jitindar Singhtarget/ppc: Add pcr_supported to POWER9 cpu class definition
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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2017-01-30  Suraj Jitindar Singhpowerpc/cpu-models: rename ISAv3.00 logical PVR definition
Signed-off-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
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