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Commit | Line | Data |
---|---|---|
252ed872 | 1 | CONFIG_ARM=y |
40d5534c TR |
2 | # CONFIG_SPL_USE_ARCH_MEMCPY is not set |
3 | # CONFIG_SPL_USE_ARCH_MEMSET is not set | |
3159ec64 | 4 | CONFIG_ARCH_MX31=y |
23830e98 | 5 | CONFIG_SPL_LDSCRIPT="arch/arm/cpu/u-boot-spl.lds" |
278b90ce | 6 | CONFIG_SYS_TEXT_BASE=0x87e00000 |
cc4288ef | 7 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
a09fea1d TR |
8 | CONFIG_ENV_SIZE=0x20000 |
9 | CONFIG_ENV_OFFSET=0x40000 | |
556fd590 | 10 | CONFIG_TARGET_MX31PDK=y |
052170c6 | 11 | CONFIG_SPL_SERIAL_SUPPORT=y |
86cf1c82 | 12 | CONFIG_NR_DRAM_BANKS=1 |
d168bcb6 | 13 | CONFIG_SPL=y |
9e1d65f3 | 14 | CONFIG_ENV_OFFSET_REDUND=0x60000 |
f89d6133 | 15 | CONFIG_SPL_TEXT_BASE=0x87dc0000 |
665c35a7 | 16 | # CONFIG_SPL_FRAMEWORK is not set |
358b6a20 | 17 | CONFIG_SPL_NAND_SUPPORT=y |
d021e942 | 18 | # CONFIG_AUTO_COMPLETE is not set |
89cb2b5f | 19 | CONFIG_CMD_BOOTZ=y |
78d1e1d0 | 20 | CONFIG_CMD_SPI=y |
c95e632d PD |
21 | CONFIG_DEFAULT_SPI_BUS=1 |
22 | CONFIG_DEFAULT_SPI_MODE=4 | |
ef0f2f57 | 23 | # CONFIG_CMD_SETEXPR is not set |
78d1e1d0 | 24 | CONFIG_CMD_DHCP=y |
89cb2b5f | 25 | CONFIG_CMD_MII=y |
78d1e1d0 | 26 | CONFIG_CMD_PING=y |
c9032ce1 | 27 | CONFIG_CMD_DATE=y |
5dc4dfd2 | 28 | CONFIG_ENV_IS_IN_NAND=y |
cb6617a7 | 29 | CONFIG_SYS_REDUNDAND_ENVIRONMENT=y |
8d8ee47e | 30 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
8bbff6a7 | 31 | CONFIG_MXC_GPIO=y |
3788b451 | 32 | # CONFIG_MMC is not set |
0cfccb54 | 33 | CONFIG_MTD=y |
88718be3 | 34 | CONFIG_MTD_RAW_NAND=y |
0a9ef451 | 35 | CONFIG_NAND_MXC=y |
8daec2d9 AF |
36 | CONFIG_SMC911X=y |
37 | CONFIG_SMC911X_BASE=0xB6000000 | |
38 | CONFIG_SMC911X_32_BIT=y | |
f1b1f770 | 39 | CONFIG_SPI=y |
60e54562 | 40 | CONFIG_MXC_SPI=y |