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83d290c5 | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
b940ca64 GR |
2 | /* |
3 | * Copyright (C) 2014 Freescale Semiconductor | |
b940ca64 GR |
4 | */ |
5 | ||
6 | #ifndef __FSL_MC_H__ | |
7 | #define __FSL_MC_H__ | |
8 | ||
9 | #include <common.h> | |
10 | ||
11 | #define MC_CCSR_BASE_ADDR \ | |
12 | ((struct mc_ccsr_registers __iomem *)0x8340000) | |
13 | ||
b940ca64 GR |
14 | #define GCR1_P1_STOP BIT(31) |
15 | #define GCR1_P2_STOP BIT(30) | |
16 | #define GCR1_P1_DE_RST BIT(23) | |
17 | #define GCR1_P2_DE_RST BIT(22) | |
18 | #define GCR1_M1_DE_RST BIT(15) | |
19 | #define GCR1_M2_DE_RST BIT(14) | |
20 | #define GCR1_M_ALL_DE_RST (GCR1_M1_DE_RST | GCR1_M2_DE_RST) | |
21 | #define GSR_FS_MASK 0x3fffffff | |
b940ca64 GR |
22 | |
23 | #define SOC_MC_PORTALS_BASE_ADDR ((void __iomem *)0x00080C000000) | |
1f1c25c7 | 24 | #define SOC_QBMAN_PORTALS_BASE_ADDR ((void __iomem *)0x000818000000) |
b940ca64 GR |
25 | #define SOC_MC_PORTAL_STRIDE 0x10000 |
26 | ||
27 | #define SOC_MC_PORTAL_ADDR(_portal_id) \ | |
28 | ((void __iomem *)((uintptr_t)SOC_MC_PORTALS_BASE_ADDR + \ | |
29 | (_portal_id) * SOC_MC_PORTAL_STRIDE)) | |
30 | ||
1730a17d PK |
31 | #define MC_PORTAL_OFFSET_TO_PORTAL_ID(_portal_offset) \ |
32 | ((_portal_offset) / SOC_MC_PORTAL_STRIDE) | |
33 | ||
b940ca64 GR |
34 | struct mc_ccsr_registers { |
35 | u32 reg_gcr1; | |
36 | u32 reserved1; | |
37 | u32 reg_gsr; | |
38 | u32 reserved2; | |
39 | u32 reg_sicbalr; | |
40 | u32 reg_sicbahr; | |
41 | u32 reg_sicapr; | |
42 | u32 reserved3; | |
43 | u32 reg_mcfbalr; | |
44 | u32 reg_mcfbahr; | |
45 | u32 reg_mcfapr; | |
46 | u32 reserved4[0x2f1]; | |
47 | u32 reg_psr; | |
48 | u32 reserved5; | |
49 | u32 reg_brr[2]; | |
50 | u32 reserved6[0x80]; | |
51 | u32 reg_error[]; | |
52 | }; | |
53 | ||
a78df40c | 54 | void fdt_fsl_mc_fixup_iommu_map_entry(void *blob); |
b940ca64 | 55 | int get_mc_boot_status(void); |
fb4a87a7 | 56 | int get_dpl_apply_status(void); |
7e968049 | 57 | int is_lazy_dpl_addr_valid(void); |
cf0bbbd1 | 58 | void fdt_fixup_mc_ddr(u64 *base, u64 *size); |
fb4a87a7 PK |
59 | #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET |
60 | int get_aiop_apply_status(void); | |
61 | #endif | |
62 | u64 mc_get_dram_addr(void); | |
422cb08a | 63 | unsigned long mc_get_dram_block_size(void); |
a2a55e51 | 64 | int fsl_mc_ldpaa_init(bd_t *bis); |
1730a17d | 65 | int fsl_mc_ldpaa_exit(bd_t *bd); |
33a8991a | 66 | void mc_env_boot(void); |
b940ca64 | 67 | #endif |