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1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/ata/ahci-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Common Properties for Serial ATA AHCI controllers
8
9 maintainers:
10 - Hans de Goede <hdegoede@redhat.com>
11 - Damien Le Moal <dlemoal@kernel.org>
12
13 description:
14 This document defines device tree properties for a common AHCI SATA
15 controller implementation. It's hardware interface is supposed to
16 conform to the technical standard defined by Intel (see Serial ATA
17 Advanced Host Controller Interface specification for details). The
18 document doesn't constitute a DT-node binding by itself but merely
19 defines a set of common properties for the AHCI-compatible devices.
20
21 select: false
22
23 allOf:
24 - $ref: sata-common.yaml#
25
26 properties:
27 reg:
28 description:
29 Generic AHCI registers space conforming to the Serial ATA AHCI
30 specification.
31
32 reg-names:
33 description: CSR space IDs
34 contains:
35 const: ahci
36
37 interrupts:
38 description:
39 Generic AHCI state change interrupt. Can be implemented either as a
40 single line attached to the controller or as a set of the signals
41 indicating the particular port events.
42 minItems: 1
43 maxItems: 32
44
45 ahci-supply:
46 description: Power regulator for AHCI controller
47
48 target-supply:
49 description: Power regulator for SATA target device
50
51 phy-supply:
52 description: Power regulator for SATA PHY
53
54 phys:
55 description: Reference to the SATA PHY node
56 maxItems: 1
57
58 phy-names:
59 const: sata-phy
60
61 hba-cap:
62 $ref: /schemas/types.yaml#/definitions/uint32
63 description:
64 Bitfield of the HBA generic platform capabilities like Staggered
65 Spin-up or Mechanical Presence Switch support. It can be used to
66 appropriately initialize the HWinit fields of the HBA CAP register
67 in case if the system firmware hasn't done it.
68
69 ports-implemented:
70 $ref: /schemas/types.yaml#/definitions/uint32
71 description:
72 Mask that indicates which ports the HBA supports. Useful if PI is not
73 programmed by the BIOS, which is true for some embedded SoC's.
74
75 patternProperties:
76 "^sata-port@[0-9a-f]+$":
77 $ref: '#/$defs/ahci-port'
78 description:
79 It is optionally possible to describe the ports as sub-nodes so
80 to enable each port independently when dealing with multiple PHYs.
81
82 required:
83 - reg
84 - interrupts
85
86 additionalProperties: true
87
88 $defs:
89 ahci-port:
90 $ref: /schemas/ata/sata-common.yaml#/$defs/sata-port
91
92 properties:
93 reg:
94 description:
95 AHCI SATA port identifier. By design AHCI controller can't have
96 more than 32 ports due to the CAP.NP fields and PI register size
97 constraints.
98 minimum: 0
99 maximum: 31
100
101 phys:
102 description: Individual AHCI SATA port PHY
103 maxItems: 1
104
105 phy-names:
106 description: AHCI SATA port PHY ID
107 const: sata-phy
108
109 target-supply:
110 description: Power regulator for SATA port target device
111
112 hba-port-cap:
113 $ref: /schemas/types.yaml#/definitions/uint32
114 description:
115 Bitfield of the HBA port-specific platform capabilities like Hot
116 plugging, eSATA, FIS-based Switching, etc (see AHCI specification
117 for details). It can be used to initialize the HWinit fields of
118 the PxCMD register in case if the system firmware hasn't done it.
119
120 required:
121 - reg
122
123 ...