Bindings/display/mipi-dsi-bus.txt

   1 MIPI DSI (Display Serial Interface) busses
   2 ==========================================
   3
   4 The MIPI Display Serial Interface specifies a serial bus and a protocol for
   5 communication between a host and up to four peripherals. This document will
   6 define the syntax used to represent a DSI bus in a device tree.
   7
   8 This document describes DSI bus-specific properties only or defines existing
   9 standard properties in the context of the DSI bus.
  10
  11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
  12 set of properties that characterize the bus. Child nodes describe individual
  13 peripherals on that bus.
  14
  15 The following assumes that only a single peripheral is connected to a DSI
  16 host. Experience shows that this is true for the large majority of setups.
  17
  18 DSI host
  19 ========
  20
  21 In addition to the standard properties and those defined by the parent bus of
  22 a DSI host, the following properties apply to a node representing a DSI host.
  23
  24 Required properties:
  25 - #address-cells: The number of cells required to represent an address on the
  26   bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
  27   a maximum of 4 devices can be addressed on a single bus. Hence the value of
  28   this property should be 1.
  29 - #size-cells: Should be 0. There are cases where it makes sense to use a
  30   different value here. See below.
  31
  32 Optional properties:
  33 - clock-master: boolean. Should be enabled if the host is being used in
  34   conjunction with another DSI host to drive the same peripheral. Hardware
  35   supporting such a configuration generally requires the data on both the busses
  36   to be driven by the same clock. Only the DSI host instance controlling this
  37   clock should contain this property.
  38
  39 DSI peripheral
  40 ==============
  41
  42 Peripherals with DSI as control bus, or no control bus
  43 ------------------------------------------------------
  44
  45 Peripherals with the DSI bus as the primary control bus, or peripherals with
  46 no control bus but use the DSI bus to transmit pixel data are represented
  47 as child nodes of the DSI host's node. Properties described here apply to all
  48 DSI peripherals, but individual bindings may want to define additional,
  49 device-specific properties.
  50
  51 Required properties:
  52 - reg: The virtual channel number of a DSI peripheral. Must be in the range
  53   from 0 to 3.
  54
  55 Some DSI peripherals respond to more than a single virtual channel. In that
  56 case two alternative representations can be chosen:
  57 - The reg property can take multiple entries, one for each virtual channel
  58   that the peripheral responds to.
  59 - If the virtual channels that a peripheral responds to are consecutive, the
  60   #size-cells can be set to 1. The first cell of each entry in the reg
  61   property is the number of the first virtual channel and the second cell is
  62   the number of consecutive virtual channels.
  63
  64 Peripherals with a different control bus
  65 ----------------------------------------
  66
  67 There are peripherals that have I2C/SPI (or some other non-DSI bus) as the
  68 primary control bus, but are also connected to a DSI bus (mostly for the data
  69 path). Connections between such peripherals and a DSI host can be represented
  70 using the graph bindings [1], [2].
  71
  72 Peripherals that support dual channel DSI
  73 -----------------------------------------
  74
  75 Peripherals with higher bandwidth requirements can be connected to 2 DSI
  76 busses. Each DSI bus/channel drives some portion of the pixel data (generally
  77 left/right half of each line of the display, or even/odd lines of the display).
  78 The graph bindings should be used to represent the multiple DSI busses that are
  79 connected to this peripheral. Each DSI host's output endpoint can be linked to
  80 an input endpoint of the DSI peripheral.
  81
  82 [1] Documentation/devicetree/bindings/graph.txt
  83 [2] Documentation/devicetree/bindings/media/video-interfaces.txt
  84
  85 Examples
  86 ========
  87 - (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus
  88   with different virtual channel configurations.
  89 - (4) is an example of a peripheral on a I2C control bus connected to a
  90   DSI host using of-graph bindings.
  91 - (5) is an example of 2 DSI hosts driving a dual-channel DSI peripheral,
  92   which uses I2C as its primary control bus.
  93
  94 1)
  95         dsi-host {
  96                 ...
  97
  98                 #address-cells = <1>;
  99                 #size-cells = <0>;
 100
 101                 /* peripheral responds to virtual channel 0 */
 102                 peripheral@0 {
 103                         compatible = "...";
 104                         reg = <0>;
 105                 };
 106
 107                 ...
 108         };
 109
 110 2)
 111         dsi-host {
 112                 ...
 113
 114                 #address-cells = <1>;
 115                 #size-cells = <0>;
 116
 117                 /* peripheral responds to virtual channels 0 and 2 */
 118                 peripheral@0 {
 119                         compatible = "...";
 120                         reg = <0, 2>;
 121                 };
 122
 123                 ...
 124         };
 125
 126 3)
 127         dsi-host {
 128                 ...
 129
 130                 #address-cells = <1>;
 131                 #size-cells = <1>;
 132
 133                 /* peripheral responds to virtual channels 1, 2 and 3 */
 134                 peripheral@1 {
 135                         compatible = "...";
 136                         reg = <1 3>;
 137                 };
 138
 139                 ...
 140         };
 141
 142 4)
 143         i2c-host {
 144                 ...
 145
 146                 dsi-bridge@35 {
 147                         compatible = "...";
 148                         reg = <0x35>;
 149
 150                         ports {
 151                                 ...
 152
 153                                 port {
 154                                         bridge_mipi_in: endpoint {
 155                                                 remote-endpoint = <&host_mipi_out>;
 156                                         };
 157                                 };
 158                         };
 159                 };
 160         };
 161
 162         dsi-host {
 163                 ...
 164
 165                 ports {
 166                         ...
 167
 168                         port {
 169                                 host_mipi_out: endpoint {
 170                                         remote-endpoint = <&bridge_mipi_in>;
 171                                 };
 172                         };
 173                 };
 174         };
 175
 176 5)
 177         i2c-host {
 178                 dsi-bridge@35 {
 179                         compatible = "...";
 180                         reg = <0x35>;
 181
 182                         ports {
 183                                 #address-cells = <1>;
 184                                 #size-cells = <0>;
 185
 186                                 port@0 {
 187                                         reg = <0>;
 188                                         dsi0_in: endpoint {
 189                                                 remote-endpoint = <&dsi0_out>;
 190                                         };
 191                                 };
 192
 193                                 port@1 {
 194                                         reg = <1>;
 195                                         dsi1_in: endpoint {
 196                                                 remote-endpoint = <&dsi1_out>;
 197                                         };
 198                                 };
 199                         };
 200                 };
 201         };
 202
 203         dsi0-host {
 204                 ...
 205
 206                 /*
 207                  * this DSI instance drives the clock for both the host
 208                  * controllers
 209                  */
 210                 clock-master;
 211
 212                 ports {
 213                         ...
 214
 215                         port {
 216                                 dsi0_out: endpoint {
 217                                         remote-endpoint = <&dsi0_in>;
 218                                 };
 219                         };
 220                 };
 221         };
 222
 223         dsi1-host {
 224                 ...
 225
 226                 ports {
 227                         ...
 228
 229                         port {
 230                                 dsi1_out: endpoint {
 231                                         remote-endpoint = <&dsi1_in>;
 232                                 };
 233                         };
 234                 };
 235         };