1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek PMIC Wrapper
10 - Flora Fu <flora.fu@mediatek.com>
11 - Alexandre Mergnat <amergnat@baylibre.com>
14 On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
15 is not directly visible to the CPU, but only through the PMIC wrapper
16 inside the SoC. The communication between the SoC and the PMIC can
17 optionally be encrypted. Also a non standard Dual IO SPI mode can be
18 used to increase speed.
22 On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
23 The signals of these pins are routed over the SPI bus using the pwrap
24 bridge. In the binding description below the properties needed for bridging
25 are marked with "IP Pairing". These are optional on SoCs which do not support
33 - mediatek,mt2701-pwrap
34 - mediatek,mt6765-pwrap
35 - mediatek,mt6779-pwrap
36 - mediatek,mt6795-pwrap
37 - mediatek,mt6797-pwrap
38 - mediatek,mt6873-pwrap
39 - mediatek,mt7622-pwrap
40 - mediatek,mt8135-pwrap
41 - mediatek,mt8173-pwrap
42 - mediatek,mt8183-pwrap
43 - mediatek,mt8186-pwrap
44 - mediatek,mt8188-pwrap
45 - mediatek,mt8195-pwrap
46 - mediatek,mt8365-pwrap
47 - mediatek,mt8516-pwrap
50 - mediatek,mt8186-pwrap
51 - mediatek,mt8195-pwrap
57 - description: PMIC wrapper registers
58 - description: IP pairing registers
72 - description: SPI bus clock
73 - description: Main module clock
74 - description: System module clock
75 - description: Timer module clock
88 - description: PMIC wrapper reset
89 - description: IP pairing reset
109 resets: [reset-names]
116 const: mediatek,mt8365-pwrap
125 additionalProperties: false
129 #include <dt-bindings/interrupt-controller/irq.h>
130 #include <dt-bindings/interrupt-controller/arm-gic.h>
131 #include <dt-bindings/reset/mt8135-resets.h>
134 #address-cells = <2>;
137 compatible = "mediatek,mt8135-pwrap";
138 reg = <0 0x1000f000 0 0x1000>,
139 <0 0x11017000 0 0x1000>;
140 reg-names = "pwrap", "pwrap-bridge";
141 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
142 clocks = <&clk26m>, <&clk26m>;
143 clock-names = "spi", "wrap";
144 resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>,
145 <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>;
146 reset-names = "pwrap", "pwrap-bridge";