]> git.ipfire.org Git - thirdparty/u-boot.git/blob - arch/arm/Kconfig
Merge tag 'arc-for-2019.07' of git://git.denx.de/u-boot-arc
[thirdparty/u-boot.git] / arch / arm / Kconfig
1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11
12 if ARM64
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 help
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
22
23 config SYS_INIT_SP_BSS_OFFSET
24 int
25 help
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Define this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime. This
31 option's value is the offset added to &_bss_start in order to
32 calculate the stack pointer. This offset should be large enough so
33 that the early malloc region, global data (gd), and early stack usage
34 do not overlap any appended DTB.
35
36 config LINUX_KERNEL_IMAGE_HEADER
37 bool
38 help
39 Place a Linux kernel image header at the start of the U-Boot binary.
40 The format of the header is described in the Linux kernel source at
41 Documentation/arm64/booting.txt. This feature is useful since the
42 image header reports the amount of memory (BSS and similar) that
43 U-Boot needs to use, but which isn't part of the binary.
44
45 if LINUX_KERNEL_IMAGE_HEADER
46 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
47 hex
48 help
49 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
50 TEXT_OFFSET value written in to the Linux kernel image header.
51 endif
52 endif
53
54 config STATIC_RELA
55 bool
56 default y if ARM64 && !POSITION_INDEPENDENT
57
58 config DMA_ADDR_T_64BIT
59 bool
60 default y if ARM64
61
62 config HAS_VBAR
63 bool
64
65 config HAS_THUMB2
66 bool
67
68 # Used for compatibility with asm files copied from the kernel
69 config ARM_ASM_UNIFIED
70 bool
71 default y
72
73 # Used for compatibility with asm files copied from the kernel
74 config THUMB2_KERNEL
75 bool
76
77 config SYS_ARM_CACHE_CP15
78 bool "CP15 based cache enabling support"
79 help
80 Select this if your processor suports enabling caches by using
81 CP15 registers.
82
83 config SYS_ARM_MMU
84 bool "MMU-based Paged Memory Management Support"
85 select SYS_ARM_CACHE_CP15
86 help
87 Select if you want MMU-based virtualised addressing space
88 support by paged memory management.
89
90 config SYS_ARM_MPU
91 bool 'Use the ARM v7 PMSA Compliant MPU'
92 help
93 Some ARM systems without an MMU have instead a Memory Protection
94 Unit (MPU) that defines the type and permissions for regions of
95 memory.
96 If your CPU has an MPU then you should choose 'y' here unless you
97 know that you do not want to use the MPU.
98
99 # If set, the workarounds for these ARM errata are applied early during U-Boot
100 # startup. Note that in general these options force the workarounds to be
101 # applied; no CPU-type/version detection exists, unlike the similar options in
102 # the Linux kernel. Do not set these options unless they apply! Also note that
103 # the following can be machine specific errata. These do have ability to
104 # provide rudimentary version and machine specific checks, but expect no
105 # product checks:
106 # CONFIG_ARM_ERRATA_430973
107 # CONFIG_ARM_ERRATA_454179
108 # CONFIG_ARM_ERRATA_621766
109 # CONFIG_ARM_ERRATA_798870
110 # CONFIG_ARM_ERRATA_801819
111 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
112 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
113
114 config ARM_ERRATA_430973
115 bool
116
117 config ARM_ERRATA_454179
118 bool
119
120 config ARM_ERRATA_621766
121 bool
122
123 config ARM_ERRATA_716044
124 bool
125
126 config ARM_ERRATA_725233
127 bool
128
129 config ARM_ERRATA_742230
130 bool
131
132 config ARM_ERRATA_743622
133 bool
134
135 config ARM_ERRATA_751472
136 bool
137
138 config ARM_ERRATA_761320
139 bool
140
141 config ARM_ERRATA_773022
142 bool
143
144 config ARM_ERRATA_774769
145 bool
146
147 config ARM_ERRATA_794072
148 bool
149
150 config ARM_ERRATA_798870
151 bool
152
153 config ARM_ERRATA_801819
154 bool
155
156 config ARM_ERRATA_826974
157 bool
158
159 config ARM_ERRATA_828024
160 bool
161
162 config ARM_ERRATA_829520
163 bool
164
165 config ARM_ERRATA_833069
166 bool
167
168 config ARM_ERRATA_833471
169 bool
170
171 config ARM_ERRATA_845369
172 bool
173
174 config ARM_ERRATA_852421
175 bool
176
177 config ARM_ERRATA_852423
178 bool
179
180 config ARM_ERRATA_855873
181 bool
182
183 config ARM_CORTEX_A8_CVE_2017_5715
184 bool
185
186 config ARM_CORTEX_A15_CVE_2017_5715
187 bool
188
189 config CPU_ARM720T
190 bool
191 select SYS_CACHE_SHIFT_5
192 imply SYS_ARM_MMU
193
194 config CPU_ARM920T
195 bool
196 select SYS_CACHE_SHIFT_5
197 imply SYS_ARM_MMU
198
199 config CPU_ARM926EJS
200 bool
201 select SYS_CACHE_SHIFT_5
202 imply SYS_ARM_MMU
203
204 config CPU_ARM946ES
205 bool
206 select SYS_CACHE_SHIFT_5
207 imply SYS_ARM_MMU
208
209 config CPU_ARM1136
210 bool
211 select SYS_CACHE_SHIFT_5
212 imply SYS_ARM_MMU
213
214 config CPU_ARM1176
215 bool
216 select HAS_VBAR
217 select SYS_CACHE_SHIFT_5
218 imply SYS_ARM_MMU
219
220 config CPU_V7A
221 bool
222 select HAS_THUMB2
223 select HAS_VBAR
224 select SYS_CACHE_SHIFT_6
225 imply SYS_ARM_MMU
226
227 config CPU_V7M
228 bool
229 select HAS_THUMB2
230 select SYS_ARM_MPU
231 select SYS_CACHE_SHIFT_5
232 select SYS_THUMB_BUILD
233 select THUMB2_KERNEL
234
235 config CPU_V7R
236 bool
237 select HAS_THUMB2
238 select SYS_ARM_CACHE_CP15
239 select SYS_ARM_MPU
240 select SYS_CACHE_SHIFT_6
241
242 config CPU_PXA
243 bool
244 select SYS_CACHE_SHIFT_5
245 imply SYS_ARM_MMU
246
247 config CPU_SA1100
248 bool
249 select SYS_CACHE_SHIFT_5
250 imply SYS_ARM_MMU
251
252 config SYS_CPU
253 default "arm720t" if CPU_ARM720T
254 default "arm920t" if CPU_ARM920T
255 default "arm926ejs" if CPU_ARM926EJS
256 default "arm946es" if CPU_ARM946ES
257 default "arm1136" if CPU_ARM1136
258 default "arm1176" if CPU_ARM1176
259 default "armv7" if CPU_V7A
260 default "armv7" if CPU_V7R
261 default "armv7m" if CPU_V7M
262 default "pxa" if CPU_PXA
263 default "sa1100" if CPU_SA1100
264 default "armv8" if ARM64
265
266 config SYS_ARM_ARCH
267 int
268 default 4 if CPU_ARM720T
269 default 4 if CPU_ARM920T
270 default 5 if CPU_ARM926EJS
271 default 5 if CPU_ARM946ES
272 default 6 if CPU_ARM1136
273 default 6 if CPU_ARM1176
274 default 7 if CPU_V7A
275 default 7 if CPU_V7M
276 default 7 if CPU_V7R
277 default 5 if CPU_PXA
278 default 4 if CPU_SA1100
279 default 8 if ARM64
280
281 config SYS_CACHE_SHIFT_5
282 bool
283
284 config SYS_CACHE_SHIFT_6
285 bool
286
287 config SYS_CACHE_SHIFT_7
288 bool
289
290 config SYS_CACHELINE_SIZE
291 int
292 default 128 if SYS_CACHE_SHIFT_7
293 default 64 if SYS_CACHE_SHIFT_6
294 default 32 if SYS_CACHE_SHIFT_5
295
296 config SYS_ARCH_TIMER
297 bool "ARM Generic Timer support"
298 depends on CPU_V7A || ARM64
299 default y if ARM64
300 help
301 The ARM Generic Timer (aka arch-timer) provides an architected
302 interface to a timer source on an SoC.
303 It is mandantory for ARMv8 implementation and widely available
304 on ARMv7 systems.
305
306 config ARM_SMCCC
307 bool "Support for ARM SMC Calling Convention (SMCCC)"
308 depends on CPU_V7A || ARM64
309 select ARM_PSCI_FW
310 help
311 Say Y here if you want to enable ARM SMC Calling Convention.
312 This should be enabled if U-Boot needs to communicate with system
313 firmware (for example, PSCI) according to SMCCC.
314
315 config SEMIHOSTING
316 bool "support boot from semihosting"
317 help
318 In emulated environments, semihosting is a way for
319 the hosted environment to call out to the emulator to
320 retrieve files from the host machine.
321
322 config SYS_THUMB_BUILD
323 bool "Build U-Boot using the Thumb instruction set"
324 depends on !ARM64
325 help
326 Use this flag to build U-Boot using the Thumb instruction set for
327 ARM architectures. Thumb instruction set provides better code
328 density. For ARM architectures that support Thumb2 this flag will
329 result in Thumb2 code generated by GCC.
330
331 config SPL_SYS_THUMB_BUILD
332 bool "Build SPL using the Thumb instruction set"
333 default y if SYS_THUMB_BUILD
334 depends on !ARM64
335 help
336 Use this flag to build SPL using the Thumb instruction set for
337 ARM architectures. Thumb instruction set provides better code
338 density. For ARM architectures that support Thumb2 this flag will
339 result in Thumb2 code generated by GCC.
340
341 config SYS_L2CACHE_OFF
342 bool "L2cache off"
343 help
344 If SoC does not support L2CACHE or one do not want to enable
345 L2CACHE, choose this option.
346
347 config ENABLE_ARM_SOC_BOOT0_HOOK
348 bool "prepare BOOT0 header"
349 help
350 If the SoC's BOOT0 requires a header area filled with (magic)
351 values, then choose this option, and create a file included as
352 <asm/arch/boot0.h> which contains the required assembler code.
353
354 config ARM_CORTEX_CPU_IS_UP
355 bool
356 default n
357
358 config USE_ARCH_MEMCPY
359 bool "Use an assembly optimized implementation of memcpy"
360 default y
361 depends on !ARM64
362 help
363 Enable the generation of an optimized version of memcpy.
364 Such implementation may be faster under some conditions
365 but may increase the binary size.
366
367 config SPL_USE_ARCH_MEMCPY
368 bool "Use an assembly optimized implementation of memcpy for SPL"
369 default y if USE_ARCH_MEMCPY
370 depends on !ARM64
371 help
372 Enable the generation of an optimized version of memcpy.
373 Such implementation may be faster under some conditions
374 but may increase the binary size.
375
376 config USE_ARCH_MEMSET
377 bool "Use an assembly optimized implementation of memset"
378 default y
379 depends on !ARM64
380 help
381 Enable the generation of an optimized version of memset.
382 Such implementation may be faster under some conditions
383 but may increase the binary size.
384
385 config SPL_USE_ARCH_MEMSET
386 bool "Use an assembly optimized implementation of memset for SPL"
387 default y if USE_ARCH_MEMSET
388 depends on !ARM64
389 help
390 Enable the generation of an optimized version of memset.
391 Such implementation may be faster under some conditions
392 but may increase the binary size.
393
394 config ARM64_SUPPORT_AARCH32
395 bool "ARM64 system support AArch32 execution state"
396 default y if ARM64 && !TARGET_THUNDERX_88XX
397 help
398 This ARM64 system supports AArch32 execution state.
399
400 choice
401 prompt "Target select"
402 default TARGET_HIKEY
403
404 config ARCH_AT91
405 bool "Atmel AT91"
406 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
407
408 config TARGET_EDB93XX
409 bool "Support edb93xx"
410 select CPU_ARM920T
411 select PL010_SERIAL
412
413 config TARGET_ASPENITE
414 bool "Support aspenite"
415 select CPU_ARM926EJS
416
417 config TARGET_GPLUGD
418 bool "Support gplugd"
419 select CPU_ARM926EJS
420
421 config ARCH_DAVINCI
422 bool "TI DaVinci"
423 select CPU_ARM926EJS
424 imply CMD_SAVES
425 help
426 Support for TI's DaVinci platform.
427
428 config KIRKWOOD
429 bool "Marvell Kirkwood"
430 select ARCH_MISC_INIT
431 select BOARD_EARLY_INIT_F
432 select CPU_ARM926EJS
433
434 config ARCH_MVEBU
435 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
436 select DM
437 select DM_ETH
438 select DM_SERIAL
439 select DM_SPI
440 select DM_SPI_FLASH
441 select OF_CONTROL
442 select OF_SEPARATE
443 select SPI
444 imply CMD_DM
445
446 config TARGET_APF27
447 bool "Support apf27"
448 select CPU_ARM926EJS
449 select SUPPORT_SPL
450
451 config ORION5X
452 bool "Marvell Orion"
453 select CPU_ARM926EJS
454
455 config TARGET_SPEAR300
456 bool "Support spear300"
457 select BOARD_EARLY_INIT_F
458 select CPU_ARM926EJS
459 select PL011_SERIAL
460 imply CMD_SAVES
461
462 config TARGET_SPEAR310
463 bool "Support spear310"
464 select BOARD_EARLY_INIT_F
465 select CPU_ARM926EJS
466 select PL011_SERIAL
467 imply CMD_SAVES
468
469 config TARGET_SPEAR320
470 bool "Support spear320"
471 select BOARD_EARLY_INIT_F
472 select CPU_ARM926EJS
473 select PL011_SERIAL
474 imply CMD_SAVES
475
476 config TARGET_SPEAR600
477 bool "Support spear600"
478 select BOARD_EARLY_INIT_F
479 select CPU_ARM926EJS
480 select PL011_SERIAL
481 imply CMD_SAVES
482
483 config TARGET_STV0991
484 bool "Support stv0991"
485 select CPU_V7A
486 select DM
487 select DM_SERIAL
488 select DM_SPI
489 select DM_SPI_FLASH
490 select PL01X_SERIAL
491 select SPI
492 select SPI_FLASH
493 imply CMD_DM
494
495 config TARGET_X600
496 bool "Support x600"
497 select BOARD_LATE_INIT
498 select CPU_ARM926EJS
499 select PL011_SERIAL
500 select SUPPORT_SPL
501
502 config TARGET_WOODBURN
503 bool "Support woodburn"
504 select CPU_ARM1136
505
506 config TARGET_WOODBURN_SD
507 bool "Support woodburn_sd"
508 select CPU_ARM1136
509 select SUPPORT_SPL
510
511 config TARGET_FLEA3
512 bool "Support flea3"
513 select CPU_ARM1136
514
515 config TARGET_MX35PDK
516 bool "Support mx35pdk"
517 select BOARD_LATE_INIT
518 select CPU_ARM1136
519
520 config ARCH_BCM283X
521 bool "Broadcom BCM283X family"
522 select DM
523 select DM_GPIO
524 select DM_SERIAL
525 select OF_CONTROL
526 select PL01X_SERIAL
527 select SERIAL_SEARCH_ALL
528 imply CMD_DM
529 imply FAT_WRITE
530
531 config ARCH_BCM63158
532 bool "Broadcom BCM63158 family"
533 select DM
534 select OF_CONTROL
535 imply CMD_DM
536
537 config ARCH_BCM6858
538 bool "Broadcom BCM6858 family"
539 select DM
540 select OF_CONTROL
541 imply CMD_DM
542
543 config TARGET_VEXPRESS_CA15_TC2
544 bool "Support vexpress_ca15_tc2"
545 select CPU_V7A
546 select CPU_V7_HAS_NONSEC
547 select CPU_V7_HAS_VIRT
548 select PL011_SERIAL
549
550 config ARCH_BCMSTB
551 bool "Broadcom BCM7XXX family"
552 select CPU_V7A
553 select DM
554 select OF_CONTROL
555 select OF_PRIOR_STAGE
556 imply CMD_DM
557 help
558 This enables support for Broadcom ARM-based set-top box
559 chipsets, including the 7445 family of chips.
560
561 config TARGET_VEXPRESS_CA5X2
562 bool "Support vexpress_ca5x2"
563 select CPU_V7A
564 select PL011_SERIAL
565
566 config TARGET_VEXPRESS_CA9X4
567 bool "Support vexpress_ca9x4"
568 select CPU_V7A
569 select PL011_SERIAL
570
571 config TARGET_BCM23550_W1D
572 bool "Support bcm23550_w1d"
573 select CPU_V7A
574 imply CRC32_VERIFY
575 imply FAT_WRITE
576
577 config TARGET_BCM28155_AP
578 bool "Support bcm28155_ap"
579 select CPU_V7A
580 imply CRC32_VERIFY
581 imply FAT_WRITE
582
583 config TARGET_BCMCYGNUS
584 bool "Support bcmcygnus"
585 select CPU_V7A
586 imply BCM_SF2_ETH
587 imply BCM_SF2_ETH_GMAC
588 imply CMD_HASH
589 imply CRC32_VERIFY
590 imply FAT_WRITE
591 imply HASH_VERIFY
592 imply NETDEVICES
593
594 config TARGET_BCMNSP
595 bool "Support bcmnsp"
596 select CPU_V7A
597
598 config TARGET_BCMNS2
599 bool "Support Broadcom Northstar2"
600 select ARM64
601 help
602 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
603 ARMv8 Cortex-A57 processors targeting a broad range of networking
604 applications
605
606 config ARCH_EXYNOS
607 bool "Samsung EXYNOS"
608 select DM
609 select DM_GPIO
610 select DM_I2C
611 select DM_KEYBOARD
612 select DM_SERIAL
613 select DM_SPI
614 select DM_SPI_FLASH
615 select SPI
616 imply SYS_THUMB_BUILD
617 imply CMD_DM
618 imply FAT_WRITE
619
620 config ARCH_S5PC1XX
621 bool "Samsung S5PC1XX"
622 select CPU_V7A
623 select DM
624 select DM_GPIO
625 select DM_I2C
626 select DM_SERIAL
627 imply CMD_DM
628
629 config ARCH_HIGHBANK
630 bool "Calxeda Highbank"
631 select CPU_V7A
632 select PL011_SERIAL
633
634 config ARCH_INTEGRATOR
635 bool "ARM Ltd. Integrator family"
636 select DM
637 select DM_SERIAL
638 select PL01X_SERIAL
639 imply CMD_DM
640
641 config ARCH_KEYSTONE
642 bool "TI Keystone"
643 select CMD_POWEROFF
644 select CPU_V7A
645 select SUPPORT_SPL
646 select SYS_ARCH_TIMER
647 select SYS_THUMB_BUILD
648 imply CMD_MTDPARTS
649 imply CMD_SAVES
650 imply FIT
651
652 config ARCH_K3
653 bool "Texas Instruments' K3 Architecture"
654 select SPL
655 select SUPPORT_SPL
656 select FIT
657
658 config ARCH_OMAP2PLUS
659 bool "TI OMAP2+"
660 select CPU_V7A
661 select SPL_BOARD_INIT if SPL
662 select SPL_STACK_R if SPL
663 select SUPPORT_SPL
664 imply FIT
665
666 config ARCH_MESON
667 bool "Amlogic Meson"
668 imply DISTRO_DEFAULTS
669 help
670 Support for the Meson SoC family developed by Amlogic Inc.,
671 targeted at media players and tablet computers. We currently
672 support the S905 (GXBaby) 64-bit SoC.
673
674 config ARCH_MEDIATEK
675 bool "MediaTek SoCs"
676 select BINMAN
677 select DM
678 select OF_CONTROL
679 select SPL_DM if SPL
680 select SPL_LIBCOMMON_SUPPORT if SPL
681 select SPL_LIBGENERIC_SUPPORT if SPL
682 select SPL_OF_CONTROL if SPL
683 select SUPPORT_SPL
684 help
685 Support for the MediaTek SoCs family developed by MediaTek Inc.
686 Please refer to doc/README.mediatek for more information.
687
688 config ARCH_LPC32XX
689 bool "NXP LPC32xx platform"
690 select CPU_ARM926EJS
691 select DM
692 select DM_GPIO
693 select DM_SERIAL
694 select SPL_DM if SPL
695 select SUPPORT_SPL
696 imply CMD_DM
697
698 config ARCH_IMX8
699 bool "NXP i.MX8 platform"
700 select ARM64
701 select DM
702 select OF_CONTROL
703
704 config ARCH_IMX8M
705 bool "NXP i.MX8M platform"
706 select ARM64
707 select DM
708 select SUPPORT_SPL
709 imply CMD_DM
710
711 config ARCH_MX23
712 bool "NXP i.MX23 family"
713 select CPU_ARM926EJS
714 select PL011_SERIAL
715 select SUPPORT_SPL
716
717 config ARCH_MX25
718 bool "NXP MX25"
719 select CPU_ARM926EJS
720 imply MXC_GPIO
721
722 config ARCH_MX28
723 bool "NXP i.MX28 family"
724 select CPU_ARM926EJS
725 select PL011_SERIAL
726 select SUPPORT_SPL
727
728 config ARCH_MX31
729 bool "NXP i.MX31 family"
730 select CPU_ARM1136
731
732 config ARCH_MX7ULP
733 bool "NXP MX7ULP"
734 select CPU_V7A
735 select ROM_UNIFIED_SECTIONS
736 imply MXC_GPIO
737
738 config ARCH_MX7
739 bool "Freescale MX7"
740 select ARCH_MISC_INIT
741 select BOARD_EARLY_INIT_F
742 select CPU_V7A
743 select SYS_FSL_HAS_SEC if SECURE_BOOT
744 select SYS_FSL_SEC_COMPAT_4
745 select SYS_FSL_SEC_LE
746 imply MXC_GPIO
747
748 config ARCH_MX6
749 bool "Freescale MX6"
750 select CPU_V7A
751 select SYS_FSL_HAS_SEC if SECURE_BOOT
752 select SYS_FSL_SEC_COMPAT_4
753 select SYS_FSL_SEC_LE
754 select SYS_THUMB_BUILD if SPL
755 imply MXC_GPIO
756
757 if ARCH_MX6
758 config SPL_LDSCRIPT
759 default "arch/arm/mach-omap2/u-boot-spl.lds"
760 endif
761
762 config ARCH_MX5
763 bool "Freescale MX5"
764 select BOARD_EARLY_INIT_F
765 select CPU_V7A
766 imply MXC_GPIO
767
768 config ARCH_OWL
769 bool "Actions Semi OWL SoCs"
770 select ARM64
771 select DM
772 select DM_SERIAL
773 select OF_CONTROL
774 imply CMD_DM
775
776 config ARCH_QEMU
777 bool "QEMU Virtual Platform"
778 select DM
779 select DM_SERIAL
780 select OF_CONTROL
781 select PL01X_SERIAL
782 imply CMD_DM
783 imply DM_RTC
784 imply RTC_PL031
785
786 config ARCH_RMOBILE
787 bool "Renesas ARM SoCs"
788 select BOARD_EARLY_INIT_F
789 select DM
790 select DM_SERIAL
791 imply CMD_DM
792 imply FAT_WRITE
793 imply SYS_THUMB_BUILD
794 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
795
796 config TARGET_S32V234EVB
797 bool "Support s32v234evb"
798 select ARM64
799 select SYS_FSL_ERRATUM_ESDHC111
800
801 config ARCH_SNAPDRAGON
802 bool "Qualcomm Snapdragon SoCs"
803 select ARM64
804 select DM
805 select DM_GPIO
806 select DM_SERIAL
807 select MSM_SMEM
808 select OF_CONTROL
809 select OF_SEPARATE
810 select SMEM
811 select SPMI
812 imply CMD_DM
813
814 config ARCH_SOCFPGA
815 bool "Altera SOCFPGA family"
816 select ARCH_EARLY_INIT_R
817 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
818 select ARM64 if TARGET_SOCFPGA_STRATIX10
819 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
820 select DM
821 select DM_SERIAL
822 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
823 select OF_CONTROL
824 select SPL_DM_RESET if DM_RESET
825 select SPL_DM_SERIAL
826 select SPL_LIBCOMMON_SUPPORT
827 select SPL_LIBGENERIC_SUPPORT
828 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
829 select SPL_OF_CONTROL
830 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
831 select SPL_SERIAL_SUPPORT
832 select SPL_WATCHDOG_SUPPORT
833 select SUPPORT_SPL
834 select SYS_NS16550
835 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
836 imply CMD_DM
837 imply CMD_MTDPARTS
838 imply CRC32_VERIFY
839 imply DM_SPI
840 imply DM_SPI_FLASH
841 imply FAT_WRITE
842 imply SPL_LIBDISK_SUPPORT
843 imply SPL_MMC_SUPPORT
844 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
845 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
846 imply SPL_SPI_FLASH_SUPPORT
847 imply SPL_SPI_SUPPORT
848
849 config ARCH_SUNXI
850 bool "Support sunxi (Allwinner) SoCs"
851 select BINMAN
852 select CMD_GPIO
853 select CMD_MMC if MMC
854 select CMD_USB if DISTRO_DEFAULTS
855 select CLK
856 select DM
857 select DM_ETH
858 select DM_GPIO
859 select DM_KEYBOARD
860 select DM_MMC if MMC
861 select DM_SCSI if SCSI
862 select DM_SERIAL
863 select DM_USB if DISTRO_DEFAULTS
864 select OF_BOARD_SETUP
865 select OF_CONTROL
866 select OF_SEPARATE
867 select SPECIFY_CONSOLE_INDEX
868 select SPL_STACK_R if SPL
869 select SPL_SYS_MALLOC_SIMPLE if SPL
870 select SPL_SYS_THUMB_BUILD if !ARM64
871 select SYS_NS16550
872 select SYS_THUMB_BUILD if !ARM64
873 select USB if DISTRO_DEFAULTS
874 select USB_KEYBOARD if DISTRO_DEFAULTS
875 select USB_STORAGE if DISTRO_DEFAULTS
876 select USE_TINY_PRINTF
877 imply CMD_DM
878 imply CMD_GPT
879 imply CMD_UBI if NAND
880 imply DISTRO_DEFAULTS
881 imply FAT_WRITE
882 imply FIT
883 imply OF_LIBFDT_OVERLAY
884 imply PRE_CONSOLE_BUFFER
885 imply SPL_GPIO_SUPPORT
886 imply SPL_LIBCOMMON_SUPPORT
887 imply SPL_LIBGENERIC_SUPPORT
888 imply SPL_MMC_SUPPORT if MMC
889 imply SPL_POWER_SUPPORT
890 imply SPL_SERIAL_SUPPORT
891 imply USB_GADGET
892
893 config ARCH_VERSAL
894 bool "Support Xilinx Versal Platform"
895 select ARM64
896 select CLK
897 select DM
898 select DM_ETH if NET
899 select DM_MMC if MMC
900 select DM_SERIAL
901 select OF_CONTROL
902
903 config ARCH_VF610
904 bool "Freescale Vybrid"
905 select CPU_V7A
906 select SYS_FSL_ERRATUM_ESDHC111
907 imply CMD_MTDPARTS
908 imply NAND
909
910 config ARCH_ZYNQ
911 bool "Xilinx Zynq based platform"
912 select BOARD_EARLY_INIT_F if WDT
913 select CLK
914 select CLK_ZYNQ
915 select CPU_V7A
916 select DM
917 select DM_ETH if NET
918 select DM_MMC if MMC
919 select DM_SERIAL
920 select DM_SPI
921 select DM_SPI_FLASH
922 select DM_USB if USB
923 select OF_CONTROL
924 select SPI
925 select SPL_BOARD_INIT if SPL
926 select SPL_CLK if SPL
927 select SPL_DM if SPL
928 select SPL_OF_CONTROL if SPL
929 select SPL_SEPARATE_BSS if SPL
930 select SUPPORT_SPL
931 imply ARCH_EARLY_INIT_R
932 imply BOARD_LATE_INIT
933 imply CMD_CLK
934 imply CMD_DM
935 imply CMD_SPL
936 imply FAT_WRITE
937
938 config ARCH_ZYNQMP_R5
939 bool "Xilinx ZynqMP R5 based platform"
940 select CLK
941 select CPU_V7R
942 select DM
943 select DM_ETH if NET
944 select DM_MMC if MMC
945 select DM_SERIAL
946 select OF_CONTROL
947 imply CMD_DM
948 imply DM_USB_GADGET
949
950 config ARCH_ZYNQMP
951 bool "Xilinx ZynqMP based platform"
952 select ARM64
953 select CLK
954 select DM
955 select DM_ETH if NET
956 select DM_MMC if MMC
957 select DM_SERIAL
958 select DM_SPI if SPI
959 select DM_SPI_FLASH if DM_SPI
960 select DM_USB if USB
961 select OF_CONTROL
962 select SPL_BOARD_INIT if SPL
963 select SPL_CLK if SPL
964 select SPL_SEPARATE_BSS if SPL
965 select SUPPORT_SPL
966 imply BOARD_LATE_INIT
967 imply CMD_DM
968 imply FAT_WRITE
969 imply MP
970 imply DM_USB_GADGET
971
972 config TEGRA
973 bool "NVIDIA Tegra"
974 imply DISTRO_DEFAULTS
975 imply FAT_WRITE
976
977 config TARGET_VEXPRESS64_AEMV8A
978 bool "Support vexpress_aemv8a"
979 select ARM64
980 select PL01X_SERIAL
981
982 config TARGET_VEXPRESS64_BASE_FVP
983 bool "Support Versatile Express ARMv8a FVP BASE model"
984 select ARM64
985 select PL01X_SERIAL
986 select SEMIHOSTING
987
988 config TARGET_VEXPRESS64_BASE_FVP_DRAM
989 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
990 select ARM64
991 select PL01X_SERIAL
992 help
993 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
994 the default config to allow the user to load the images directly into
995 DRAM using model parameters rather than by using semi-hosting to load
996 the files from the host filesystem.
997
998 config TARGET_VEXPRESS64_JUNO
999 bool "Support Versatile Express Juno Development Platform"
1000 select ARM64
1001 select PL01X_SERIAL
1002
1003 config TARGET_LS2080A_EMU
1004 bool "Support ls2080a_emu"
1005 select ARCH_LS2080A
1006 select ARCH_MISC_INIT
1007 select ARM64
1008 select ARMV8_MULTIENTRY
1009 select FSL_DDR_SYNC_REFRESH
1010 help
1011 Support for Freescale LS2080A_EMU platform
1012 The LS2080A Development System (EMULATOR) is a pre silicon
1013 development platform that supports the QorIQ LS2080A
1014 Layerscape Architecture processor.
1015
1016 config TARGET_LS2080A_SIMU
1017 bool "Support ls2080a_simu"
1018 select ARCH_LS2080A
1019 select ARCH_MISC_INIT
1020 select ARM64
1021 select ARMV8_MULTIENTRY
1022 help
1023 Support for Freescale LS2080A_SIMU platform
1024 The LS2080A Development System (QDS) is a pre silicon
1025 development platform that supports the QorIQ LS2080A
1026 Layerscape Architecture processor.
1027
1028 config TARGET_LS1088AQDS
1029 bool "Support ls1088aqds"
1030 select ARCH_LS1088A
1031 select ARCH_MISC_INIT
1032 select ARM64
1033 select ARMV8_MULTIENTRY
1034 select BOARD_LATE_INIT
1035 select SUPPORT_SPL
1036 select FSL_DDR_INTERACTIVE if !SD_BOOT
1037 help
1038 Support for NXP LS1088AQDS platform
1039 The LS1088A Development System (QDS) is a high-performance
1040 development platform that supports the QorIQ LS1088A
1041 Layerscape Architecture processor.
1042
1043 config TARGET_LS2080AQDS
1044 bool "Support ls2080aqds"
1045 select ARCH_LS2080A
1046 select ARCH_MISC_INIT
1047 select ARM64
1048 select ARMV8_MULTIENTRY
1049 select BOARD_LATE_INIT
1050 select SUPPORT_SPL
1051 imply SCSI
1052 imply SCSI_AHCI
1053 select FSL_DDR_BIST
1054 select FSL_DDR_INTERACTIVE if !SPL
1055 help
1056 Support for Freescale LS2080AQDS platform
1057 The LS2080A Development System (QDS) is a high-performance
1058 development platform that supports the QorIQ LS2080A
1059 Layerscape Architecture processor.
1060
1061 config TARGET_LS2080ARDB
1062 bool "Support ls2080ardb"
1063 select ARCH_LS2080A
1064 select ARCH_MISC_INIT
1065 select ARM64
1066 select ARMV8_MULTIENTRY
1067 select BOARD_LATE_INIT
1068 select SUPPORT_SPL
1069 select FSL_DDR_BIST
1070 select FSL_DDR_INTERACTIVE if !SPL
1071 imply SCSI
1072 imply SCSI_AHCI
1073 help
1074 Support for Freescale LS2080ARDB platform.
1075 The LS2080A Reference design board (RDB) is a high-performance
1076 development platform that supports the QorIQ LS2080A
1077 Layerscape Architecture processor.
1078
1079 config TARGET_LS2081ARDB
1080 bool "Support ls2081ardb"
1081 select ARCH_LS2080A
1082 select ARCH_MISC_INIT
1083 select ARM64
1084 select ARMV8_MULTIENTRY
1085 select BOARD_LATE_INIT
1086 select SUPPORT_SPL
1087 help
1088 Support for Freescale LS2081ARDB platform.
1089 The LS2081A Reference design board (RDB) is a high-performance
1090 development platform that supports the QorIQ LS2081A/LS2041A
1091 Layerscape Architecture processor.
1092
1093 config TARGET_LX2160ARDB
1094 bool "Support lx2160ardb"
1095 select ARCH_LX2160A
1096 select ARCH_MISC_INIT
1097 select ARM64
1098 select ARMV8_MULTIENTRY
1099 select BOARD_LATE_INIT
1100 help
1101 Support for NXP LX2160ARDB platform.
1102 The lx2160ardb (LX2160A Reference design board (RDB)
1103 is a high-performance development platform that supports the
1104 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1105
1106 config TARGET_LX2160AQDS
1107 bool "Support lx2160aqds"
1108 select ARCH_LX2160A
1109 select ARCH_MISC_INIT
1110 select ARM64
1111 select ARMV8_MULTIENTRY
1112 select BOARD_LATE_INIT
1113 help
1114 Support for NXP LX2160AQDS platform.
1115 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1116 is a high-performance development platform that supports the
1117 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1118
1119 config TARGET_HIKEY
1120 bool "Support HiKey 96boards Consumer Edition Platform"
1121 select ARM64
1122 select DM
1123 select DM_GPIO
1124 select DM_SERIAL
1125 select OF_CONTROL
1126 select PL01X_SERIAL
1127 select SPECIFY_CONSOLE_INDEX
1128 imply CMD_DM
1129 help
1130 Support for HiKey 96boards platform. It features a HI6220
1131 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1132
1133 config TARGET_POPLAR
1134 bool "Support Poplar 96boards Enterprise Edition Platform"
1135 select ARM64
1136 select DM
1137 select DM_SERIAL
1138 select DM_USB
1139 select OF_CONTROL
1140 select PL01X_SERIAL
1141 imply CMD_DM
1142 help
1143 Support for Poplar 96boards EE platform. It features a HI3798cv200
1144 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1145 making it capable of running any commercial set-top solution based on
1146 Linux or Android.
1147
1148 config TARGET_LS1012AQDS
1149 bool "Support ls1012aqds"
1150 select ARCH_LS1012A
1151 select ARM64
1152 select BOARD_LATE_INIT
1153 help
1154 Support for Freescale LS1012AQDS platform.
1155 The LS1012A Development System (QDS) is a high-performance
1156 development platform that supports the QorIQ LS1012A
1157 Layerscape Architecture processor.
1158
1159 config TARGET_LS1012ARDB
1160 bool "Support ls1012ardb"
1161 select ARCH_LS1012A
1162 select ARM64
1163 select BOARD_LATE_INIT
1164 imply SCSI
1165 imply SCSI_AHCI
1166 help
1167 Support for Freescale LS1012ARDB platform.
1168 The LS1012A Reference design board (RDB) is a high-performance
1169 development platform that supports the QorIQ LS1012A
1170 Layerscape Architecture processor.
1171
1172 config TARGET_LS1012A2G5RDB
1173 bool "Support ls1012a2g5rdb"
1174 select ARCH_LS1012A
1175 select ARM64
1176 select BOARD_LATE_INIT
1177 imply SCSI
1178 help
1179 Support for Freescale LS1012A2G5RDB platform.
1180 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1181 development platform that supports the QorIQ LS1012A
1182 Layerscape Architecture processor.
1183
1184 config TARGET_LS1012AFRWY
1185 bool "Support ls1012afrwy"
1186 select ARCH_LS1012A
1187 select ARM64
1188 select BOARD_LATE_INIT
1189 imply SCSI
1190 imply SCSI_AHCI
1191 help
1192 Support for Freescale LS1012AFRWY platform.
1193 The LS1012A FRWY board (FRWY) is a high-performance
1194 development platform that supports the QorIQ LS1012A
1195 Layerscape Architecture processor.
1196
1197 config TARGET_LS1012AFRDM
1198 bool "Support ls1012afrdm"
1199 select ARCH_LS1012A
1200 select ARM64
1201 help
1202 Support for Freescale LS1012AFRDM platform.
1203 The LS1012A Freedom board (FRDM) is a high-performance
1204 development platform that supports the QorIQ LS1012A
1205 Layerscape Architecture processor.
1206
1207 config TARGET_LS1088ARDB
1208 bool "Support ls1088ardb"
1209 select ARCH_LS1088A
1210 select ARCH_MISC_INIT
1211 select ARM64
1212 select ARMV8_MULTIENTRY
1213 select BOARD_LATE_INIT
1214 select SUPPORT_SPL
1215 select FSL_DDR_INTERACTIVE if !SD_BOOT
1216 help
1217 Support for NXP LS1088ARDB platform.
1218 The LS1088A Reference design board (RDB) is a high-performance
1219 development platform that supports the QorIQ LS1088A
1220 Layerscape Architecture processor.
1221
1222 config TARGET_LS1021AQDS
1223 bool "Support ls1021aqds"
1224 select ARCH_LS1021A
1225 select ARCH_SUPPORT_PSCI
1226 select BOARD_EARLY_INIT_F
1227 select BOARD_LATE_INIT
1228 select CPU_V7A
1229 select CPU_V7_HAS_NONSEC
1230 select CPU_V7_HAS_VIRT
1231 select LS1_DEEP_SLEEP
1232 select SUPPORT_SPL
1233 select SYS_FSL_DDR
1234 select FSL_DDR_INTERACTIVE
1235 imply SCSI
1236
1237 config TARGET_LS1021ATWR
1238 bool "Support ls1021atwr"
1239 select ARCH_LS1021A
1240 select ARCH_SUPPORT_PSCI
1241 select BOARD_EARLY_INIT_F
1242 select BOARD_LATE_INIT
1243 select CPU_V7A
1244 select CPU_V7_HAS_NONSEC
1245 select CPU_V7_HAS_VIRT
1246 select LS1_DEEP_SLEEP
1247 select SUPPORT_SPL
1248 imply SCSI
1249
1250 config TARGET_LS1021AIOT
1251 bool "Support ls1021aiot"
1252 select ARCH_LS1021A
1253 select ARCH_SUPPORT_PSCI
1254 select BOARD_LATE_INIT
1255 select CPU_V7A
1256 select CPU_V7_HAS_NONSEC
1257 select CPU_V7_HAS_VIRT
1258 select SUPPORT_SPL
1259 imply SCSI
1260 help
1261 Support for Freescale LS1021AIOT platform.
1262 The LS1021A Freescale board (IOT) is a high-performance
1263 development platform that supports the QorIQ LS1021A
1264 Layerscape Architecture processor.
1265
1266 config TARGET_LS1043AQDS
1267 bool "Support ls1043aqds"
1268 select ARCH_LS1043A
1269 select ARM64
1270 select ARMV8_MULTIENTRY
1271 select BOARD_EARLY_INIT_F
1272 select BOARD_LATE_INIT
1273 select SUPPORT_SPL
1274 select FSL_DDR_INTERACTIVE if !SPL
1275 imply SCSI
1276 imply SCSI_AHCI
1277 help
1278 Support for Freescale LS1043AQDS platform.
1279
1280 config TARGET_LS1043ARDB
1281 bool "Support ls1043ardb"
1282 select ARCH_LS1043A
1283 select ARM64
1284 select ARMV8_MULTIENTRY
1285 select BOARD_EARLY_INIT_F
1286 select BOARD_LATE_INIT
1287 select SUPPORT_SPL
1288 help
1289 Support for Freescale LS1043ARDB platform.
1290
1291 config TARGET_LS1046AQDS
1292 bool "Support ls1046aqds"
1293 select ARCH_LS1046A
1294 select ARM64
1295 select ARMV8_MULTIENTRY
1296 select BOARD_EARLY_INIT_F
1297 select BOARD_LATE_INIT
1298 select DM_SPI_FLASH if DM_SPI
1299 select SUPPORT_SPL
1300 select FSL_DDR_BIST if !SPL
1301 select FSL_DDR_INTERACTIVE if !SPL
1302 select FSL_DDR_INTERACTIVE if !SPL
1303 imply SCSI
1304 help
1305 Support for Freescale LS1046AQDS platform.
1306 The LS1046A Development System (QDS) is a high-performance
1307 development platform that supports the QorIQ LS1046A
1308 Layerscape Architecture processor.
1309
1310 config TARGET_LS1046ARDB
1311 bool "Support ls1046ardb"
1312 select ARCH_LS1046A
1313 select ARM64
1314 select ARMV8_MULTIENTRY
1315 select BOARD_EARLY_INIT_F
1316 select BOARD_LATE_INIT
1317 select DM_SPI_FLASH if DM_SPI
1318 select POWER_MC34VR500
1319 select SUPPORT_SPL
1320 select FSL_DDR_BIST
1321 select FSL_DDR_INTERACTIVE if !SPL
1322 imply SCSI
1323 help
1324 Support for Freescale LS1046ARDB platform.
1325 The LS1046A Reference Design Board (RDB) is a high-performance
1326 development platform that supports the QorIQ LS1046A
1327 Layerscape Architecture processor.
1328
1329 config TARGET_H2200
1330 bool "Support h2200"
1331 select CPU_PXA
1332
1333 config TARGET_ZIPITZ2
1334 bool "Support zipitz2"
1335 select CPU_PXA
1336
1337 config TARGET_COLIBRI_PXA270
1338 bool "Support colibri_pxa270"
1339 select CPU_PXA
1340
1341 config ARCH_UNIPHIER
1342 bool "Socionext UniPhier SoCs"
1343 select BOARD_LATE_INIT
1344 select DM
1345 select DM_GPIO
1346 select DM_I2C
1347 select DM_MMC
1348 select DM_RESET
1349 select DM_SERIAL
1350 select DM_USB
1351 select OF_BOARD_SETUP
1352 select OF_CONTROL
1353 select OF_LIBFDT
1354 select PINCTRL
1355 select SPL_BOARD_INIT if SPL
1356 select SPL_DM if SPL
1357 select SPL_LIBCOMMON_SUPPORT if SPL
1358 select SPL_LIBGENERIC_SUPPORT if SPL
1359 select SPL_OF_CONTROL if SPL
1360 select SPL_PINCTRL if SPL
1361 select SUPPORT_SPL
1362 imply CMD_DM
1363 imply DISTRO_DEFAULTS
1364 imply FAT_WRITE
1365 help
1366 Support for UniPhier SoC family developed by Socionext Inc.
1367 (formerly, System LSI Business Division of Panasonic Corporation)
1368
1369 config STM32
1370 bool "Support STMicroelectronics STM32 MCU with cortex M"
1371 select CPU_V7M
1372 select DM
1373 select DM_SERIAL
1374 imply CMD_DM
1375
1376 config ARCH_STI
1377 bool "Support STMicrolectronics SoCs"
1378 select BLK
1379 select CPU_V7A
1380 select DM
1381 select DM_MMC
1382 select DM_RESET
1383 select DM_SERIAL
1384 imply CMD_DM
1385 help
1386 Support for STMicroelectronics STiH407/10 SoC family.
1387 This SoC is used on Linaro 96Board STiH410-B2260
1388
1389 config ARCH_STM32MP
1390 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1391 select ARCH_MISC_INIT
1392 select BOARD_LATE_INIT
1393 select CLK
1394 select DM
1395 select DM_GPIO
1396 select DM_RESET
1397 select DM_SERIAL
1398 select MISC
1399 select OF_CONTROL
1400 select OF_LIBFDT
1401 select PINCTRL
1402 select REGMAP
1403 select SUPPORT_SPL
1404 select SYSCON
1405 select SYSRESET
1406 select SYS_THUMB_BUILD
1407 imply CMD_DM
1408 imply CMD_POWEROFF
1409 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1410 help
1411 Support for STM32MP SoC family developed by STMicroelectronics,
1412 MPUs based on ARM cortex A core
1413 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1414 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1415 chain.
1416 SPL is the unsecure FSBL for the basic boot chain.
1417
1418 config ARCH_ROCKCHIP
1419 bool "Support Rockchip SoCs"
1420 select BLK
1421 select DM
1422 select DM_GPIO
1423 select DM_I2C
1424 select DM_MMC
1425 select DM_PWM
1426 select DM_REGULATOR
1427 select DM_SERIAL
1428 select DM_SPI
1429 select DM_SPI_FLASH
1430 select DM_USB if USB
1431 select ENABLE_ARM_SOC_BOOT0_HOOK
1432 select OF_CONTROL
1433 select SPI
1434 select SPL_DM if SPL
1435 select SPL_SYS_MALLOC_SIMPLE if SPL
1436 select SYS_MALLOC_F
1437 select SYS_THUMB_BUILD if !ARM64
1438 imply ADC
1439 imply CMD_DM
1440 imply DISTRO_DEFAULTS
1441 imply FAT_WRITE
1442 imply SARADC_ROCKCHIP
1443 imply SPL_SYSRESET
1444 imply SYS_NS16550
1445 imply TPL_SYSRESET
1446 imply USB_FUNCTION_FASTBOOT
1447
1448 config TARGET_THUNDERX_88XX
1449 bool "Support ThunderX 88xx"
1450 select ARM64
1451 select OF_CONTROL
1452 select PL01X_SERIAL
1453 select SYS_CACHE_SHIFT_7
1454
1455 config ARCH_ASPEED
1456 bool "Support Aspeed SoCs"
1457 select DM
1458 select OF_CONTROL
1459 imply CMD_DM
1460
1461 endchoice
1462
1463 config TI_SECURE_DEVICE
1464 bool "HS Device Type Support"
1465 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
1466 help
1467 If a high secure (HS) device type is being used, this config
1468 must be set. This option impacts various aspects of the
1469 build system (to create signed boot images that can be
1470 authenticated) and the code. See the doc/README.ti-secure
1471 file for further details.
1472
1473 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1474 config ISW_ENTRY_ADDR
1475 hex "Address in memory or XIP address of bootloader entry point"
1476 default 0x402F4000 if AM43XX
1477 default 0x402F0400 if AM33XX
1478 default 0x40301350 if OMAP54XX
1479 help
1480 After any reset, the boot ROM searches the boot media for a valid
1481 boot image. For non-XIP devices, the ROM then copies the image into
1482 internal memory. For all boot modes, after the ROM processes the
1483 boot image it eventually computes the entry point address depending
1484 on the device type (secure/non-secure), boot media (xip/non-xip) and
1485 image headers.
1486 endif
1487
1488 source "arch/arm/mach-aspeed/Kconfig"
1489
1490 source "arch/arm/mach-at91/Kconfig"
1491
1492 source "arch/arm/mach-bcm283x/Kconfig"
1493
1494 source "arch/arm/mach-bcmstb/Kconfig"
1495
1496 source "arch/arm/mach-davinci/Kconfig"
1497
1498 source "arch/arm/mach-exynos/Kconfig"
1499
1500 source "arch/arm/mach-highbank/Kconfig"
1501
1502 source "arch/arm/mach-integrator/Kconfig"
1503
1504 source "arch/arm/mach-k3/Kconfig"
1505
1506 source "arch/arm/mach-keystone/Kconfig"
1507
1508 source "arch/arm/mach-kirkwood/Kconfig"
1509
1510 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1511
1512 source "arch/arm/mach-mvebu/Kconfig"
1513
1514 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1515
1516 source "arch/arm/mach-imx/mx2/Kconfig"
1517
1518 source "arch/arm/mach-imx/mx3/Kconfig"
1519
1520 source "arch/arm/mach-imx/mx5/Kconfig"
1521
1522 source "arch/arm/mach-imx/mx6/Kconfig"
1523
1524 source "arch/arm/mach-imx/mx7/Kconfig"
1525
1526 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1527
1528 source "arch/arm/mach-imx/imx8/Kconfig"
1529
1530 source "arch/arm/mach-imx/imx8m/Kconfig"
1531
1532 source "arch/arm/mach-imx/mxs/Kconfig"
1533
1534 source "arch/arm/mach-omap2/Kconfig"
1535
1536 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1537
1538 source "arch/arm/mach-orion5x/Kconfig"
1539
1540 source "arch/arm/mach-owl/Kconfig"
1541
1542 source "arch/arm/mach-rmobile/Kconfig"
1543
1544 source "arch/arm/mach-meson/Kconfig"
1545
1546 source "arch/arm/mach-mediatek/Kconfig"
1547
1548 source "arch/arm/mach-qemu/Kconfig"
1549
1550 source "arch/arm/mach-rockchip/Kconfig"
1551
1552 source "arch/arm/mach-s5pc1xx/Kconfig"
1553
1554 source "arch/arm/mach-snapdragon/Kconfig"
1555
1556 source "arch/arm/mach-socfpga/Kconfig"
1557
1558 source "arch/arm/mach-sti/Kconfig"
1559
1560 source "arch/arm/mach-stm32/Kconfig"
1561
1562 source "arch/arm/mach-stm32mp/Kconfig"
1563
1564 source "arch/arm/mach-sunxi/Kconfig"
1565
1566 source "arch/arm/mach-tegra/Kconfig"
1567
1568 source "arch/arm/mach-uniphier/Kconfig"
1569
1570 source "arch/arm/cpu/armv7/vf610/Kconfig"
1571
1572 source "arch/arm/mach-zynq/Kconfig"
1573
1574 source "arch/arm/mach-zynqmp/Kconfig"
1575
1576 source "arch/arm/mach-versal/Kconfig"
1577
1578 source "arch/arm/mach-zynqmp-r5/Kconfig"
1579
1580 source "arch/arm/cpu/armv7/Kconfig"
1581
1582 source "arch/arm/cpu/armv8/Kconfig"
1583
1584 source "arch/arm/mach-imx/Kconfig"
1585
1586 source "board/bosch/shc/Kconfig"
1587 source "board/bosch/guardian/Kconfig"
1588 source "board/CarMediaLab/flea3/Kconfig"
1589 source "board/Marvell/aspenite/Kconfig"
1590 source "board/Marvell/gplugd/Kconfig"
1591 source "board/armadeus/apf27/Kconfig"
1592 source "board/armltd/vexpress/Kconfig"
1593 source "board/armltd/vexpress64/Kconfig"
1594 source "board/broadcom/bcm23550_w1d/Kconfig"
1595 source "board/broadcom/bcm28155_ap/Kconfig"
1596 source "board/broadcom/bcm963158/Kconfig"
1597 source "board/broadcom/bcm968580xref/Kconfig"
1598 source "board/broadcom/bcmcygnus/Kconfig"
1599 source "board/broadcom/bcmnsp/Kconfig"
1600 source "board/broadcom/bcmns2/Kconfig"
1601 source "board/cavium/thunderx/Kconfig"
1602 source "board/cirrus/edb93xx/Kconfig"
1603 source "board/eets/pdu001/Kconfig"
1604 source "board/emulation/qemu-arm/Kconfig"
1605 source "board/freescale/ls2080a/Kconfig"
1606 source "board/freescale/ls2080aqds/Kconfig"
1607 source "board/freescale/ls2080ardb/Kconfig"
1608 source "board/freescale/ls1088a/Kconfig"
1609 source "board/freescale/ls1021aqds/Kconfig"
1610 source "board/freescale/ls1043aqds/Kconfig"
1611 source "board/freescale/ls1021atwr/Kconfig"
1612 source "board/freescale/ls1021aiot/Kconfig"
1613 source "board/freescale/ls1046aqds/Kconfig"
1614 source "board/freescale/ls1043ardb/Kconfig"
1615 source "board/freescale/ls1046ardb/Kconfig"
1616 source "board/freescale/ls1012aqds/Kconfig"
1617 source "board/freescale/ls1012ardb/Kconfig"
1618 source "board/freescale/ls1012afrdm/Kconfig"
1619 source "board/freescale/lx2160a/Kconfig"
1620 source "board/freescale/mx35pdk/Kconfig"
1621 source "board/freescale/s32v234evb/Kconfig"
1622 source "board/grinn/chiliboard/Kconfig"
1623 source "board/gumstix/pepper/Kconfig"
1624 source "board/h2200/Kconfig"
1625 source "board/hisilicon/hikey/Kconfig"
1626 source "board/hisilicon/poplar/Kconfig"
1627 source "board/isee/igep003x/Kconfig"
1628 source "board/phytec/pcm051/Kconfig"
1629 source "board/silica/pengwyn/Kconfig"
1630 source "board/spear/spear300/Kconfig"
1631 source "board/spear/spear310/Kconfig"
1632 source "board/spear/spear320/Kconfig"
1633 source "board/spear/spear600/Kconfig"
1634 source "board/spear/x600/Kconfig"
1635 source "board/st/stv0991/Kconfig"
1636 source "board/tcl/sl50/Kconfig"
1637 source "board/ucRobotics/bubblegum_96/Kconfig"
1638 source "board/birdland/bav335x/Kconfig"
1639 source "board/toradex/colibri_pxa270/Kconfig"
1640 source "board/vscom/baltos/Kconfig"
1641 source "board/woodburn/Kconfig"
1642 source "board/xilinx/Kconfig"
1643 source "board/xilinx/zynq/Kconfig"
1644 source "board/xilinx/zynqmp/Kconfig"
1645 source "board/zipitz2/Kconfig"
1646
1647 source "arch/arm/Kconfig.debug"
1648
1649 endmenu
1650
1651 config SPL_LDSCRIPT
1652 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1653 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1654 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1655
1656