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Merge tag 'mmc-6-19' of https://github.com/MrVan/u-boot
[thirdparty/u-boot.git] / arch / arm / Kconfig
1 menu "ARM architecture"
2 depends on ARM
3
4 config SYS_ARCH
5 default "arm"
6
7 config ARM64
8 bool
9 select PHYS_64BIT
10 select SYS_CACHE_SHIFT_6
11
12 if ARM64
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 help
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
22
23 config SYS_INIT_SP_BSS_OFFSET
24 int
25 help
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Define this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime. This
31 option's value is the offset added to &_bss_start in order to
32 calculate the stack pointer. This offset should be large enough so
33 that the early malloc region, global data (gd), and early stack usage
34 do not overlap any appended DTB.
35
36 config LINUX_KERNEL_IMAGE_HEADER
37 bool
38 help
39 Place a Linux kernel image header at the start of the U-Boot binary.
40 The format of the header is described in the Linux kernel source at
41 Documentation/arm64/booting.txt. This feature is useful since the
42 image header reports the amount of memory (BSS and similar) that
43 U-Boot needs to use, but which isn't part of the binary.
44
45 if LINUX_KERNEL_IMAGE_HEADER
46 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
47 hex
48 help
49 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
50 TEXT_OFFSET value written in to the Linux kernel image header.
51 endif
52 endif
53
54 config STATIC_RELA
55 bool
56 default y if ARM64 && !POSITION_INDEPENDENT
57
58 config DMA_ADDR_T_64BIT
59 bool
60 default y if ARM64
61
62 config HAS_VBAR
63 bool
64
65 config HAS_THUMB2
66 bool
67
68 # Used for compatibility with asm files copied from the kernel
69 config ARM_ASM_UNIFIED
70 bool
71 default y
72
73 # Used for compatibility with asm files copied from the kernel
74 config THUMB2_KERNEL
75 bool
76
77 config SYS_ICACHE_OFF
78 bool "Do not enable icache"
79 default n
80 help
81 Do not enable instruction cache in U-Boot.
82
83 config SPL_SYS_ICACHE_OFF
84 bool "Do not enable icache in SPL"
85 depends on SPL
86 default SYS_ICACHE_OFF
87 help
88 Do not enable instruction cache in SPL.
89
90 config SYS_DCACHE_OFF
91 bool "Do not enable dcache"
92 default n
93 help
94 Do not enable data cache in U-Boot.
95
96 config SPL_SYS_DCACHE_OFF
97 bool "Do not enable dcache in SPL"
98 depends on SPL
99 default SYS_DCACHE_OFF
100 help
101 Do not enable data cache in SPL.
102
103 config SYS_ARM_CACHE_CP15
104 bool "CP15 based cache enabling support"
105 help
106 Select this if your processor suports enabling caches by using
107 CP15 registers.
108
109 config SYS_ARM_MMU
110 bool "MMU-based Paged Memory Management Support"
111 select SYS_ARM_CACHE_CP15
112 help
113 Select if you want MMU-based virtualised addressing space
114 support by paged memory management.
115
116 config SYS_ARM_MPU
117 bool 'Use the ARM v7 PMSA Compliant MPU'
118 help
119 Some ARM systems without an MMU have instead a Memory Protection
120 Unit (MPU) that defines the type and permissions for regions of
121 memory.
122 If your CPU has an MPU then you should choose 'y' here unless you
123 know that you do not want to use the MPU.
124
125 # If set, the workarounds for these ARM errata are applied early during U-Boot
126 # startup. Note that in general these options force the workarounds to be
127 # applied; no CPU-type/version detection exists, unlike the similar options in
128 # the Linux kernel. Do not set these options unless they apply! Also note that
129 # the following can be machine specific errata. These do have ability to
130 # provide rudimentary version and machine specific checks, but expect no
131 # product checks:
132 # CONFIG_ARM_ERRATA_430973
133 # CONFIG_ARM_ERRATA_454179
134 # CONFIG_ARM_ERRATA_621766
135 # CONFIG_ARM_ERRATA_798870
136 # CONFIG_ARM_ERRATA_801819
137 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
138 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
139
140 config ARM_ERRATA_430973
141 bool
142
143 config ARM_ERRATA_454179
144 bool
145
146 config ARM_ERRATA_621766
147 bool
148
149 config ARM_ERRATA_716044
150 bool
151
152 config ARM_ERRATA_725233
153 bool
154
155 config ARM_ERRATA_742230
156 bool
157
158 config ARM_ERRATA_743622
159 bool
160
161 config ARM_ERRATA_751472
162 bool
163
164 config ARM_ERRATA_761320
165 bool
166
167 config ARM_ERRATA_773022
168 bool
169
170 config ARM_ERRATA_774769
171 bool
172
173 config ARM_ERRATA_794072
174 bool
175
176 config ARM_ERRATA_798870
177 bool
178
179 config ARM_ERRATA_801819
180 bool
181
182 config ARM_ERRATA_826974
183 bool
184
185 config ARM_ERRATA_828024
186 bool
187
188 config ARM_ERRATA_829520
189 bool
190
191 config ARM_ERRATA_833069
192 bool
193
194 config ARM_ERRATA_833471
195 bool
196
197 config ARM_ERRATA_845369
198 bool
199
200 config ARM_ERRATA_852421
201 bool
202
203 config ARM_ERRATA_852423
204 bool
205
206 config ARM_ERRATA_855873
207 bool
208
209 config ARM_CORTEX_A8_CVE_2017_5715
210 bool
211
212 config ARM_CORTEX_A15_CVE_2017_5715
213 bool
214
215 config CPU_ARM720T
216 bool
217 select SYS_CACHE_SHIFT_5
218 imply SYS_ARM_MMU
219
220 config CPU_ARM920T
221 bool
222 select SYS_CACHE_SHIFT_5
223 imply SYS_ARM_MMU
224
225 config CPU_ARM926EJS
226 bool
227 select SYS_CACHE_SHIFT_5
228 imply SYS_ARM_MMU
229
230 config CPU_ARM946ES
231 bool
232 select SYS_CACHE_SHIFT_5
233 imply SYS_ARM_MMU
234
235 config CPU_ARM1136
236 bool
237 select SYS_CACHE_SHIFT_5
238 imply SYS_ARM_MMU
239
240 config CPU_ARM1176
241 bool
242 select HAS_VBAR
243 select SYS_CACHE_SHIFT_5
244 imply SYS_ARM_MMU
245
246 config CPU_V7A
247 bool
248 select HAS_THUMB2
249 select HAS_VBAR
250 select SYS_CACHE_SHIFT_6
251 imply SYS_ARM_MMU
252
253 config CPU_V7M
254 bool
255 select HAS_THUMB2
256 select SYS_ARM_MPU
257 select SYS_CACHE_SHIFT_5
258 select SYS_THUMB_BUILD
259 select THUMB2_KERNEL
260
261 config CPU_V7R
262 bool
263 select HAS_THUMB2
264 select SYS_ARM_CACHE_CP15
265 select SYS_ARM_MPU
266 select SYS_CACHE_SHIFT_6
267
268 config CPU_PXA
269 bool
270 select SYS_CACHE_SHIFT_5
271 imply SYS_ARM_MMU
272
273 config CPU_SA1100
274 bool
275 select SYS_CACHE_SHIFT_5
276 imply SYS_ARM_MMU
277
278 config SYS_CPU
279 default "arm720t" if CPU_ARM720T
280 default "arm920t" if CPU_ARM920T
281 default "arm926ejs" if CPU_ARM926EJS
282 default "arm946es" if CPU_ARM946ES
283 default "arm1136" if CPU_ARM1136
284 default "arm1176" if CPU_ARM1176
285 default "armv7" if CPU_V7A
286 default "armv7" if CPU_V7R
287 default "armv7m" if CPU_V7M
288 default "pxa" if CPU_PXA
289 default "sa1100" if CPU_SA1100
290 default "armv8" if ARM64
291
292 config SYS_ARM_ARCH
293 int
294 default 4 if CPU_ARM720T
295 default 4 if CPU_ARM920T
296 default 5 if CPU_ARM926EJS
297 default 5 if CPU_ARM946ES
298 default 6 if CPU_ARM1136
299 default 6 if CPU_ARM1176
300 default 7 if CPU_V7A
301 default 7 if CPU_V7M
302 default 7 if CPU_V7R
303 default 5 if CPU_PXA
304 default 4 if CPU_SA1100
305 default 8 if ARM64
306
307 config SYS_CACHE_SHIFT_5
308 bool
309
310 config SYS_CACHE_SHIFT_6
311 bool
312
313 config SYS_CACHE_SHIFT_7
314 bool
315
316 config SYS_CACHELINE_SIZE
317 int
318 default 128 if SYS_CACHE_SHIFT_7
319 default 64 if SYS_CACHE_SHIFT_6
320 default 32 if SYS_CACHE_SHIFT_5
321
322 config SYS_ARCH_TIMER
323 bool "ARM Generic Timer support"
324 depends on CPU_V7A || ARM64
325 default y if ARM64
326 help
327 The ARM Generic Timer (aka arch-timer) provides an architected
328 interface to a timer source on an SoC.
329 It is mandantory for ARMv8 implementation and widely available
330 on ARMv7 systems.
331
332 config ARM_SMCCC
333 bool "Support for ARM SMC Calling Convention (SMCCC)"
334 depends on CPU_V7A || ARM64
335 select ARM_PSCI_FW
336 help
337 Say Y here if you want to enable ARM SMC Calling Convention.
338 This should be enabled if U-Boot needs to communicate with system
339 firmware (for example, PSCI) according to SMCCC.
340
341 config SEMIHOSTING
342 bool "support boot from semihosting"
343 help
344 In emulated environments, semihosting is a way for
345 the hosted environment to call out to the emulator to
346 retrieve files from the host machine.
347
348 config SYS_THUMB_BUILD
349 bool "Build U-Boot using the Thumb instruction set"
350 depends on !ARM64
351 help
352 Use this flag to build U-Boot using the Thumb instruction set for
353 ARM architectures. Thumb instruction set provides better code
354 density. For ARM architectures that support Thumb2 this flag will
355 result in Thumb2 code generated by GCC.
356
357 config SPL_SYS_THUMB_BUILD
358 bool "Build SPL using the Thumb instruction set"
359 default y if SYS_THUMB_BUILD
360 depends on !ARM64
361 help
362 Use this flag to build SPL using the Thumb instruction set for
363 ARM architectures. Thumb instruction set provides better code
364 density. For ARM architectures that support Thumb2 this flag will
365 result in Thumb2 code generated by GCC.
366
367 config TPL_SYS_THUMB_BUILD
368 bool "Build TPL using the Thumb instruction set"
369 default y if SYS_THUMB_BUILD
370 depends on TPL && !ARM64
371 help
372 Use this flag to build SPL using the Thumb instruction set for
373 ARM architectures. Thumb instruction set provides better code
374 density. For ARM architectures that support Thumb2 this flag will
375 result in Thumb2 code generated by GCC.
376
377
378 config SYS_L2CACHE_OFF
379 bool "L2cache off"
380 help
381 If SoC does not support L2CACHE or one do not want to enable
382 L2CACHE, choose this option.
383
384 config ENABLE_ARM_SOC_BOOT0_HOOK
385 bool "prepare BOOT0 header"
386 help
387 If the SoC's BOOT0 requires a header area filled with (magic)
388 values, then choose this option, and create a file included as
389 <asm/arch/boot0.h> which contains the required assembler code.
390
391 config ARM_CORTEX_CPU_IS_UP
392 bool
393 default n
394
395 config USE_ARCH_MEMCPY
396 bool "Use an assembly optimized implementation of memcpy"
397 default y
398 depends on !ARM64
399 help
400 Enable the generation of an optimized version of memcpy.
401 Such implementation may be faster under some conditions
402 but may increase the binary size.
403
404 config SPL_USE_ARCH_MEMCPY
405 bool "Use an assembly optimized implementation of memcpy for SPL"
406 default y if USE_ARCH_MEMCPY
407 depends on !ARM64
408 help
409 Enable the generation of an optimized version of memcpy.
410 Such implementation may be faster under some conditions
411 but may increase the binary size.
412
413 config TPL_USE_ARCH_MEMCPY
414 bool "Use an assembly optimized implementation of memcpy for TPL"
415 default y if USE_ARCH_MEMCPY
416 depends on !ARM64
417 help
418 Enable the generation of an optimized version of memcpy.
419 Such implementation may be faster under some conditions
420 but may increase the binary size.
421
422 config USE_ARCH_MEMSET
423 bool "Use an assembly optimized implementation of memset"
424 default y
425 depends on !ARM64
426 help
427 Enable the generation of an optimized version of memset.
428 Such implementation may be faster under some conditions
429 but may increase the binary size.
430
431 config SPL_USE_ARCH_MEMSET
432 bool "Use an assembly optimized implementation of memset for SPL"
433 default y if USE_ARCH_MEMSET
434 depends on !ARM64
435 help
436 Enable the generation of an optimized version of memset.
437 Such implementation may be faster under some conditions
438 but may increase the binary size.
439
440 config TPL_USE_ARCH_MEMSET
441 bool "Use an assembly optimized implementation of memset for TPL"
442 default y if USE_ARCH_MEMSET
443 depends on !ARM64
444 help
445 Enable the generation of an optimized version of memset.
446 Such implementation may be faster under some conditions
447 but may increase the binary size.
448
449 config ARM64_SUPPORT_AARCH32
450 bool "ARM64 system support AArch32 execution state"
451 default y if ARM64 && !TARGET_THUNDERX_88XX
452 help
453 This ARM64 system supports AArch32 execution state.
454
455 choice
456 prompt "Target select"
457 default TARGET_HIKEY
458
459 config ARCH_AT91
460 bool "Atmel AT91"
461 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
462
463 config TARGET_EDB93XX
464 bool "Support edb93xx"
465 select CPU_ARM920T
466 select PL010_SERIAL
467
468 config TARGET_ASPENITE
469 bool "Support aspenite"
470 select CPU_ARM926EJS
471
472 config TARGET_GPLUGD
473 bool "Support gplugd"
474 select CPU_ARM926EJS
475
476 config ARCH_DAVINCI
477 bool "TI DaVinci"
478 select CPU_ARM926EJS
479 imply CMD_SAVES
480 help
481 Support for TI's DaVinci platform.
482
483 config KIRKWOOD
484 bool "Marvell Kirkwood"
485 select ARCH_MISC_INIT
486 select BOARD_EARLY_INIT_F
487 select CPU_ARM926EJS
488
489 config ARCH_MVEBU
490 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
491 select DM
492 select DM_ETH
493 select DM_SERIAL
494 select DM_SPI
495 select DM_SPI_FLASH
496 select OF_CONTROL
497 select OF_SEPARATE
498 select SPI
499 imply CMD_DM
500
501 config TARGET_APF27
502 bool "Support apf27"
503 select CPU_ARM926EJS
504 select SUPPORT_SPL
505
506 config ORION5X
507 bool "Marvell Orion"
508 select CPU_ARM926EJS
509
510 config TARGET_SPEAR300
511 bool "Support spear300"
512 select BOARD_EARLY_INIT_F
513 select CPU_ARM926EJS
514 select PL011_SERIAL
515 imply CMD_SAVES
516
517 config TARGET_SPEAR310
518 bool "Support spear310"
519 select BOARD_EARLY_INIT_F
520 select CPU_ARM926EJS
521 select PL011_SERIAL
522 imply CMD_SAVES
523
524 config TARGET_SPEAR320
525 bool "Support spear320"
526 select BOARD_EARLY_INIT_F
527 select CPU_ARM926EJS
528 select PL011_SERIAL
529 imply CMD_SAVES
530
531 config TARGET_SPEAR600
532 bool "Support spear600"
533 select BOARD_EARLY_INIT_F
534 select CPU_ARM926EJS
535 select PL011_SERIAL
536 imply CMD_SAVES
537
538 config TARGET_STV0991
539 bool "Support stv0991"
540 select CPU_V7A
541 select DM
542 select DM_SERIAL
543 select DM_SPI
544 select DM_SPI_FLASH
545 select PL01X_SERIAL
546 select SPI
547 select SPI_FLASH
548 imply CMD_DM
549
550 config TARGET_X600
551 bool "Support x600"
552 select BOARD_LATE_INIT
553 select CPU_ARM926EJS
554 select PL011_SERIAL
555 select SUPPORT_SPL
556
557 config TARGET_WOODBURN
558 bool "Support woodburn"
559 select CPU_ARM1136
560
561 config TARGET_WOODBURN_SD
562 bool "Support woodburn_sd"
563 select CPU_ARM1136
564 select SUPPORT_SPL
565
566 config TARGET_FLEA3
567 bool "Support flea3"
568 select CPU_ARM1136
569
570 config TARGET_MX35PDK
571 bool "Support mx35pdk"
572 select BOARD_LATE_INIT
573 select CPU_ARM1136
574
575 config ARCH_BCM283X
576 bool "Broadcom BCM283X family"
577 select DM
578 select DM_GPIO
579 select DM_SERIAL
580 select OF_CONTROL
581 select PL01X_SERIAL
582 select SERIAL_SEARCH_ALL
583 imply CMD_DM
584 imply FAT_WRITE
585
586 config ARCH_BCM63158
587 bool "Broadcom BCM63158 family"
588 select DM
589 select OF_CONTROL
590 imply CMD_DM
591
592 config ARCH_BCM6858
593 bool "Broadcom BCM6858 family"
594 select DM
595 select OF_CONTROL
596 imply CMD_DM
597
598 config TARGET_VEXPRESS_CA15_TC2
599 bool "Support vexpress_ca15_tc2"
600 select CPU_V7A
601 select CPU_V7_HAS_NONSEC
602 select CPU_V7_HAS_VIRT
603 select PL011_SERIAL
604
605 config ARCH_BCMSTB
606 bool "Broadcom BCM7XXX family"
607 select CPU_V7A
608 select DM
609 select OF_CONTROL
610 select OF_PRIOR_STAGE
611 imply CMD_DM
612 help
613 This enables support for Broadcom ARM-based set-top box
614 chipsets, including the 7445 family of chips.
615
616 config TARGET_VEXPRESS_CA5X2
617 bool "Support vexpress_ca5x2"
618 select CPU_V7A
619 select PL011_SERIAL
620
621 config TARGET_VEXPRESS_CA9X4
622 bool "Support vexpress_ca9x4"
623 select CPU_V7A
624 select PL011_SERIAL
625
626 config TARGET_BCM23550_W1D
627 bool "Support bcm23550_w1d"
628 select CPU_V7A
629 imply CRC32_VERIFY
630 imply FAT_WRITE
631
632 config TARGET_BCM28155_AP
633 bool "Support bcm28155_ap"
634 select CPU_V7A
635 imply CRC32_VERIFY
636 imply FAT_WRITE
637
638 config TARGET_BCMCYGNUS
639 bool "Support bcmcygnus"
640 select CPU_V7A
641 imply BCM_SF2_ETH
642 imply BCM_SF2_ETH_GMAC
643 imply CMD_HASH
644 imply CRC32_VERIFY
645 imply FAT_WRITE
646 imply HASH_VERIFY
647 imply NETDEVICES
648
649 config TARGET_BCMNSP
650 bool "Support bcmnsp"
651 select CPU_V7A
652
653 config TARGET_BCMNS2
654 bool "Support Broadcom Northstar2"
655 select ARM64
656 help
657 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
658 ARMv8 Cortex-A57 processors targeting a broad range of networking
659 applications
660
661 config ARCH_EXYNOS
662 bool "Samsung EXYNOS"
663 select DM
664 select DM_GPIO
665 select DM_I2C
666 select DM_KEYBOARD
667 select DM_SERIAL
668 select DM_SPI
669 select DM_SPI_FLASH
670 select SPI
671 imply SYS_THUMB_BUILD
672 imply CMD_DM
673 imply FAT_WRITE
674
675 config ARCH_S5PC1XX
676 bool "Samsung S5PC1XX"
677 select CPU_V7A
678 select DM
679 select DM_GPIO
680 select DM_I2C
681 select DM_SERIAL
682 imply CMD_DM
683
684 config ARCH_HIGHBANK
685 bool "Calxeda Highbank"
686 select CPU_V7A
687 select PL011_SERIAL
688
689 config ARCH_INTEGRATOR
690 bool "ARM Ltd. Integrator family"
691 select DM
692 select DM_SERIAL
693 select PL01X_SERIAL
694 imply CMD_DM
695
696 config ARCH_KEYSTONE
697 bool "TI Keystone"
698 select CMD_POWEROFF
699 select CPU_V7A
700 select SUPPORT_SPL
701 select SYS_ARCH_TIMER
702 select SYS_THUMB_BUILD
703 imply CMD_MTDPARTS
704 imply CMD_SAVES
705 imply FIT
706
707 config ARCH_K3
708 bool "Texas Instruments' K3 Architecture"
709 select SPL
710 select SUPPORT_SPL
711 select FIT
712
713 config ARCH_OMAP2PLUS
714 bool "TI OMAP2+"
715 select CPU_V7A
716 select SPL_BOARD_INIT if SPL
717 select SPL_STACK_R if SPL
718 select SUPPORT_SPL
719 imply FIT
720
721 config ARCH_MESON
722 bool "Amlogic Meson"
723 imply DISTRO_DEFAULTS
724 help
725 Support for the Meson SoC family developed by Amlogic Inc.,
726 targeted at media players and tablet computers. We currently
727 support the S905 (GXBaby) 64-bit SoC.
728
729 config ARCH_MEDIATEK
730 bool "MediaTek SoCs"
731 select BINMAN
732 select DM
733 select OF_CONTROL
734 select SPL_DM if SPL
735 select SPL_LIBCOMMON_SUPPORT if SPL
736 select SPL_LIBGENERIC_SUPPORT if SPL
737 select SPL_OF_CONTROL if SPL
738 select SUPPORT_SPL
739 help
740 Support for the MediaTek SoCs family developed by MediaTek Inc.
741 Please refer to doc/README.mediatek for more information.
742
743 config ARCH_LPC32XX
744 bool "NXP LPC32xx platform"
745 select CPU_ARM926EJS
746 select DM
747 select DM_GPIO
748 select DM_SERIAL
749 select SPL_DM if SPL
750 select SUPPORT_SPL
751 imply CMD_DM
752
753 config ARCH_IMX8
754 bool "NXP i.MX8 platform"
755 select ARM64
756 select DM
757 select OF_CONTROL
758
759 config ARCH_IMX8M
760 bool "NXP i.MX8M platform"
761 select ARM64
762 select DM
763 select SUPPORT_SPL
764 imply CMD_DM
765
766 config ARCH_MX23
767 bool "NXP i.MX23 family"
768 select CPU_ARM926EJS
769 select PL011_SERIAL
770 select SUPPORT_SPL
771
772 config ARCH_MX25
773 bool "NXP MX25"
774 select CPU_ARM926EJS
775 imply MXC_GPIO
776
777 config ARCH_MX28
778 bool "NXP i.MX28 family"
779 select CPU_ARM926EJS
780 select PL011_SERIAL
781 select SUPPORT_SPL
782
783 config ARCH_MX31
784 bool "NXP i.MX31 family"
785 select CPU_ARM1136
786
787 config ARCH_MX7ULP
788 bool "NXP MX7ULP"
789 select CPU_V7A
790 select ROM_UNIFIED_SECTIONS
791 imply MXC_GPIO
792
793 config ARCH_MX7
794 bool "Freescale MX7"
795 select ARCH_MISC_INIT
796 select BOARD_EARLY_INIT_F
797 select CPU_V7A
798 select SYS_FSL_HAS_SEC if SECURE_BOOT
799 select SYS_FSL_SEC_COMPAT_4
800 select SYS_FSL_SEC_LE
801 imply MXC_GPIO
802
803 config ARCH_MX6
804 bool "Freescale MX6"
805 select CPU_V7A
806 select SYS_FSL_HAS_SEC if SECURE_BOOT
807 select SYS_FSL_SEC_COMPAT_4
808 select SYS_FSL_SEC_LE
809 select SYS_THUMB_BUILD if SPL
810 imply MXC_GPIO
811
812 if ARCH_MX6
813 config SPL_LDSCRIPT
814 default "arch/arm/mach-omap2/u-boot-spl.lds"
815 endif
816
817 config ARCH_MX5
818 bool "Freescale MX5"
819 select BOARD_EARLY_INIT_F
820 select CPU_V7A
821 imply MXC_GPIO
822
823 config ARCH_OWL
824 bool "Actions Semi OWL SoCs"
825 select ARM64
826 select DM
827 select DM_SERIAL
828 select OF_CONTROL
829 imply CMD_DM
830
831 config ARCH_QEMU
832 bool "QEMU Virtual Platform"
833 select DM
834 select DM_SERIAL
835 select OF_CONTROL
836 select PL01X_SERIAL
837 imply CMD_DM
838 imply DM_RTC
839 imply RTC_PL031
840
841 config ARCH_RMOBILE
842 bool "Renesas ARM SoCs"
843 select BOARD_EARLY_INIT_F if !RZA1
844 select DM
845 select DM_SERIAL
846 imply CMD_DM
847 imply FAT_WRITE
848 imply SYS_THUMB_BUILD
849 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
850
851 config TARGET_S32V234EVB
852 bool "Support s32v234evb"
853 select ARM64
854 select SYS_FSL_ERRATUM_ESDHC111
855
856 config ARCH_SNAPDRAGON
857 bool "Qualcomm Snapdragon SoCs"
858 select ARM64
859 select DM
860 select DM_GPIO
861 select DM_SERIAL
862 select MSM_SMEM
863 select OF_CONTROL
864 select OF_SEPARATE
865 select SMEM
866 select SPMI
867 imply CMD_DM
868
869 config ARCH_SOCFPGA
870 bool "Altera SOCFPGA family"
871 select ARCH_EARLY_INIT_R
872 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
873 select ARM64 if TARGET_SOCFPGA_STRATIX10
874 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
875 select DM
876 select DM_SERIAL
877 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
878 select OF_CONTROL
879 select SPL_DM_RESET if DM_RESET
880 select SPL_DM_SERIAL
881 select SPL_LIBCOMMON_SUPPORT
882 select SPL_LIBGENERIC_SUPPORT
883 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
884 select SPL_OF_CONTROL
885 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
886 select SPL_SERIAL_SUPPORT
887 select SPL_WATCHDOG_SUPPORT
888 select SUPPORT_SPL
889 select SYS_NS16550
890 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
891 imply CMD_DM
892 imply CMD_MTDPARTS
893 imply CRC32_VERIFY
894 imply DM_SPI
895 imply DM_SPI_FLASH
896 imply FAT_WRITE
897 imply SPL
898 imply SPL_DM
899 imply SPL_LIBDISK_SUPPORT
900 imply SPL_MMC_SUPPORT
901 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
902 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
903 imply SPL_SPI_FLASH_SUPPORT
904 imply SPL_SPI_SUPPORT
905 imply L2X0_CACHE
906
907 config ARCH_SUNXI
908 bool "Support sunxi (Allwinner) SoCs"
909 select BINMAN
910 select CMD_GPIO
911 select CMD_MMC if MMC
912 select CMD_USB if DISTRO_DEFAULTS
913 select CLK
914 select DM
915 select DM_ETH
916 select DM_GPIO
917 select DM_KEYBOARD
918 select DM_MMC if MMC
919 select DM_SCSI if SCSI
920 select DM_SERIAL
921 select DM_USB if DISTRO_DEFAULTS
922 select OF_BOARD_SETUP
923 select OF_CONTROL
924 select OF_SEPARATE
925 select SPECIFY_CONSOLE_INDEX
926 select SPL_STACK_R if SPL
927 select SPL_SYS_MALLOC_SIMPLE if SPL
928 select SPL_SYS_THUMB_BUILD if !ARM64
929 select SYS_NS16550
930 select SYS_THUMB_BUILD if !ARM64
931 select USB if DISTRO_DEFAULTS
932 select USB_KEYBOARD if DISTRO_DEFAULTS
933 select USB_STORAGE if DISTRO_DEFAULTS
934 select USE_TINY_PRINTF
935 imply CMD_DM
936 imply CMD_GPT
937 imply CMD_UBI if NAND
938 imply DISTRO_DEFAULTS
939 imply FAT_WRITE
940 imply FIT
941 imply OF_LIBFDT_OVERLAY
942 imply PRE_CONSOLE_BUFFER
943 imply SPL_GPIO_SUPPORT
944 imply SPL_LIBCOMMON_SUPPORT
945 imply SPL_LIBGENERIC_SUPPORT
946 imply SPL_MMC_SUPPORT if MMC
947 imply SPL_POWER_SUPPORT
948 imply SPL_SERIAL_SUPPORT
949 imply USB_GADGET
950
951 config ARCH_VERSAL
952 bool "Support Xilinx Versal Platform"
953 select ARM64
954 select CLK
955 select DM
956 select DM_ETH if NET
957 select DM_MMC if MMC
958 select DM_SERIAL
959 select OF_CONTROL
960
961 config ARCH_VF610
962 bool "Freescale Vybrid"
963 select CPU_V7A
964 select SYS_FSL_ERRATUM_ESDHC111
965 imply CMD_MTDPARTS
966 imply NAND
967
968 config ARCH_ZYNQ
969 bool "Xilinx Zynq based platform"
970 select BOARD_EARLY_INIT_F if WDT
971 select CLK
972 select CLK_ZYNQ
973 select CPU_V7A
974 select DM
975 select DM_ETH if NET
976 select DM_MMC if MMC
977 select DM_SERIAL
978 select DM_SPI
979 select DM_SPI_FLASH
980 select DM_USB if USB
981 select OF_CONTROL
982 select SPI
983 select SPL_BOARD_INIT if SPL
984 select SPL_CLK if SPL
985 select SPL_DM if SPL
986 select SPL_OF_CONTROL if SPL
987 select SPL_SEPARATE_BSS if SPL
988 select SUPPORT_SPL
989 imply ARCH_EARLY_INIT_R
990 imply BOARD_LATE_INIT
991 imply CMD_CLK
992 imply CMD_DM
993 imply CMD_SPL
994 imply FAT_WRITE
995
996 config ARCH_ZYNQMP_R5
997 bool "Xilinx ZynqMP R5 based platform"
998 select CLK
999 select CPU_V7R
1000 select DM
1001 select DM_ETH if NET
1002 select DM_MMC if MMC
1003 select DM_SERIAL
1004 select OF_CONTROL
1005 imply CMD_DM
1006 imply DM_USB_GADGET
1007
1008 config ARCH_ZYNQMP
1009 bool "Xilinx ZynqMP based platform"
1010 select ARM64
1011 select CLK
1012 select DM
1013 select DM_ETH if NET
1014 select DM_MMC if MMC
1015 select DM_SERIAL
1016 select DM_SPI if SPI
1017 select DM_SPI_FLASH if DM_SPI
1018 select DM_USB if USB
1019 select OF_CONTROL
1020 select SPL_BOARD_INIT if SPL
1021 select SPL_CLK if SPL
1022 select SPL_SEPARATE_BSS if SPL
1023 select SUPPORT_SPL
1024 imply BOARD_LATE_INIT
1025 imply CMD_DM
1026 imply FAT_WRITE
1027 imply MP
1028 imply DM_USB_GADGET
1029
1030 config TEGRA
1031 bool "NVIDIA Tegra"
1032 imply DISTRO_DEFAULTS
1033 imply FAT_WRITE
1034
1035 config TARGET_VEXPRESS64_AEMV8A
1036 bool "Support vexpress_aemv8a"
1037 select ARM64
1038 select PL01X_SERIAL
1039
1040 config TARGET_VEXPRESS64_BASE_FVP
1041 bool "Support Versatile Express ARMv8a FVP BASE model"
1042 select ARM64
1043 select PL01X_SERIAL
1044 select SEMIHOSTING
1045
1046 config TARGET_VEXPRESS64_BASE_FVP_DRAM
1047 bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
1048 select ARM64
1049 select PL01X_SERIAL
1050 help
1051 This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
1052 the default config to allow the user to load the images directly into
1053 DRAM using model parameters rather than by using semi-hosting to load
1054 the files from the host filesystem.
1055
1056 config TARGET_VEXPRESS64_JUNO
1057 bool "Support Versatile Express Juno Development Platform"
1058 select ARM64
1059 select PL01X_SERIAL
1060
1061 config TARGET_LS2080A_EMU
1062 bool "Support ls2080a_emu"
1063 select ARCH_LS2080A
1064 select ARCH_MISC_INIT
1065 select ARM64
1066 select ARMV8_MULTIENTRY
1067 select FSL_DDR_SYNC_REFRESH
1068 help
1069 Support for Freescale LS2080A_EMU platform
1070 The LS2080A Development System (EMULATOR) is a pre silicon
1071 development platform that supports the QorIQ LS2080A
1072 Layerscape Architecture processor.
1073
1074 config TARGET_LS2080A_SIMU
1075 bool "Support ls2080a_simu"
1076 select ARCH_LS2080A
1077 select ARCH_MISC_INIT
1078 select ARM64
1079 select ARMV8_MULTIENTRY
1080 help
1081 Support for Freescale LS2080A_SIMU platform
1082 The LS2080A Development System (QDS) is a pre silicon
1083 development platform that supports the QorIQ LS2080A
1084 Layerscape Architecture processor.
1085
1086 config TARGET_LS1088AQDS
1087 bool "Support ls1088aqds"
1088 select ARCH_LS1088A
1089 select ARCH_MISC_INIT
1090 select ARM64
1091 select ARMV8_MULTIENTRY
1092 select BOARD_LATE_INIT
1093 select SUPPORT_SPL
1094 select FSL_DDR_INTERACTIVE if !SD_BOOT
1095 help
1096 Support for NXP LS1088AQDS platform
1097 The LS1088A Development System (QDS) is a high-performance
1098 development platform that supports the QorIQ LS1088A
1099 Layerscape Architecture processor.
1100
1101 config TARGET_LS2080AQDS
1102 bool "Support ls2080aqds"
1103 select ARCH_LS2080A
1104 select ARCH_MISC_INIT
1105 select ARM64
1106 select ARMV8_MULTIENTRY
1107 select BOARD_LATE_INIT
1108 select SUPPORT_SPL
1109 imply SCSI
1110 imply SCSI_AHCI
1111 select FSL_DDR_BIST
1112 select FSL_DDR_INTERACTIVE if !SPL
1113 help
1114 Support for Freescale LS2080AQDS platform
1115 The LS2080A Development System (QDS) is a high-performance
1116 development platform that supports the QorIQ LS2080A
1117 Layerscape Architecture processor.
1118
1119 config TARGET_LS2080ARDB
1120 bool "Support ls2080ardb"
1121 select ARCH_LS2080A
1122 select ARCH_MISC_INIT
1123 select ARM64
1124 select ARMV8_MULTIENTRY
1125 select BOARD_LATE_INIT
1126 select SUPPORT_SPL
1127 select FSL_DDR_BIST
1128 select FSL_DDR_INTERACTIVE if !SPL
1129 imply SCSI
1130 imply SCSI_AHCI
1131 help
1132 Support for Freescale LS2080ARDB platform.
1133 The LS2080A Reference design board (RDB) is a high-performance
1134 development platform that supports the QorIQ LS2080A
1135 Layerscape Architecture processor.
1136
1137 config TARGET_LS2081ARDB
1138 bool "Support ls2081ardb"
1139 select ARCH_LS2080A
1140 select ARCH_MISC_INIT
1141 select ARM64
1142 select ARMV8_MULTIENTRY
1143 select BOARD_LATE_INIT
1144 select SUPPORT_SPL
1145 help
1146 Support for Freescale LS2081ARDB platform.
1147 The LS2081A Reference design board (RDB) is a high-performance
1148 development platform that supports the QorIQ LS2081A/LS2041A
1149 Layerscape Architecture processor.
1150
1151 config TARGET_LX2160ARDB
1152 bool "Support lx2160ardb"
1153 select ARCH_LX2160A
1154 select ARCH_MISC_INIT
1155 select ARM64
1156 select ARMV8_MULTIENTRY
1157 select BOARD_LATE_INIT
1158 help
1159 Support for NXP LX2160ARDB platform.
1160 The lx2160ardb (LX2160A Reference design board (RDB)
1161 is a high-performance development platform that supports the
1162 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1163
1164 config TARGET_LX2160AQDS
1165 bool "Support lx2160aqds"
1166 select ARCH_LX2160A
1167 select ARCH_MISC_INIT
1168 select ARM64
1169 select ARMV8_MULTIENTRY
1170 select BOARD_LATE_INIT
1171 help
1172 Support for NXP LX2160AQDS platform.
1173 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1174 is a high-performance development platform that supports the
1175 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1176
1177 config TARGET_HIKEY
1178 bool "Support HiKey 96boards Consumer Edition Platform"
1179 select ARM64
1180 select DM
1181 select DM_GPIO
1182 select DM_SERIAL
1183 select OF_CONTROL
1184 select PL01X_SERIAL
1185 select SPECIFY_CONSOLE_INDEX
1186 imply CMD_DM
1187 help
1188 Support for HiKey 96boards platform. It features a HI6220
1189 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1190
1191 config TARGET_POPLAR
1192 bool "Support Poplar 96boards Enterprise Edition Platform"
1193 select ARM64
1194 select DM
1195 select DM_SERIAL
1196 select DM_USB
1197 select OF_CONTROL
1198 select PL01X_SERIAL
1199 imply CMD_DM
1200 help
1201 Support for Poplar 96boards EE platform. It features a HI3798cv200
1202 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1203 making it capable of running any commercial set-top solution based on
1204 Linux or Android.
1205
1206 config TARGET_LS1012AQDS
1207 bool "Support ls1012aqds"
1208 select ARCH_LS1012A
1209 select ARM64
1210 select BOARD_LATE_INIT
1211 help
1212 Support for Freescale LS1012AQDS platform.
1213 The LS1012A Development System (QDS) is a high-performance
1214 development platform that supports the QorIQ LS1012A
1215 Layerscape Architecture processor.
1216
1217 config TARGET_LS1012ARDB
1218 bool "Support ls1012ardb"
1219 select ARCH_LS1012A
1220 select ARM64
1221 select BOARD_LATE_INIT
1222 imply SCSI
1223 imply SCSI_AHCI
1224 help
1225 Support for Freescale LS1012ARDB platform.
1226 The LS1012A Reference design board (RDB) is a high-performance
1227 development platform that supports the QorIQ LS1012A
1228 Layerscape Architecture processor.
1229
1230 config TARGET_LS1012A2G5RDB
1231 bool "Support ls1012a2g5rdb"
1232 select ARCH_LS1012A
1233 select ARM64
1234 select BOARD_LATE_INIT
1235 imply SCSI
1236 help
1237 Support for Freescale LS1012A2G5RDB platform.
1238 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1239 development platform that supports the QorIQ LS1012A
1240 Layerscape Architecture processor.
1241
1242 config TARGET_LS1012AFRWY
1243 bool "Support ls1012afrwy"
1244 select ARCH_LS1012A
1245 select ARM64
1246 select BOARD_LATE_INIT
1247 imply SCSI
1248 imply SCSI_AHCI
1249 help
1250 Support for Freescale LS1012AFRWY platform.
1251 The LS1012A FRWY board (FRWY) is a high-performance
1252 development platform that supports the QorIQ LS1012A
1253 Layerscape Architecture processor.
1254
1255 config TARGET_LS1012AFRDM
1256 bool "Support ls1012afrdm"
1257 select ARCH_LS1012A
1258 select ARM64
1259 help
1260 Support for Freescale LS1012AFRDM platform.
1261 The LS1012A Freedom board (FRDM) is a high-performance
1262 development platform that supports the QorIQ LS1012A
1263 Layerscape Architecture processor.
1264
1265 config TARGET_LS1028AQDS
1266 bool "Support ls1028aqds"
1267 select ARCH_LS1028A
1268 select ARM64
1269 select ARMV8_MULTIENTRY
1270 help
1271 Support for Freescale LS1028AQDS platform
1272 The LS1028A Development System (QDS) is a high-performance
1273 development platform that supports the QorIQ LS1028A
1274 Layerscape Architecture processor.
1275
1276 config TARGET_LS1028ARDB
1277 bool "Support ls1028ardb"
1278 select ARCH_LS1028A
1279 select ARM64
1280 select ARMV8_MULTIENTRY
1281 help
1282 Support for Freescale LS1028ARDB platform
1283 The LS1028A Development System (RDB) is a high-performance
1284 development platform that supports the QorIQ LS1028A
1285 Layerscape Architecture processor.
1286
1287 config TARGET_LS1088ARDB
1288 bool "Support ls1088ardb"
1289 select ARCH_LS1088A
1290 select ARCH_MISC_INIT
1291 select ARM64
1292 select ARMV8_MULTIENTRY
1293 select BOARD_LATE_INIT
1294 select SUPPORT_SPL
1295 select FSL_DDR_INTERACTIVE if !SD_BOOT
1296 help
1297 Support for NXP LS1088ARDB platform.
1298 The LS1088A Reference design board (RDB) is a high-performance
1299 development platform that supports the QorIQ LS1088A
1300 Layerscape Architecture processor.
1301
1302 config TARGET_LS1021AQDS
1303 bool "Support ls1021aqds"
1304 select ARCH_LS1021A
1305 select ARCH_SUPPORT_PSCI
1306 select BOARD_EARLY_INIT_F
1307 select BOARD_LATE_INIT
1308 select CPU_V7A
1309 select CPU_V7_HAS_NONSEC
1310 select CPU_V7_HAS_VIRT
1311 select LS1_DEEP_SLEEP
1312 select SUPPORT_SPL
1313 select SYS_FSL_DDR
1314 select FSL_DDR_INTERACTIVE
1315 imply SCSI
1316
1317 config TARGET_LS1021ATWR
1318 bool "Support ls1021atwr"
1319 select ARCH_LS1021A
1320 select ARCH_SUPPORT_PSCI
1321 select BOARD_EARLY_INIT_F
1322 select BOARD_LATE_INIT
1323 select CPU_V7A
1324 select CPU_V7_HAS_NONSEC
1325 select CPU_V7_HAS_VIRT
1326 select LS1_DEEP_SLEEP
1327 select SUPPORT_SPL
1328 imply SCSI
1329
1330 config TARGET_LS1021AIOT
1331 bool "Support ls1021aiot"
1332 select ARCH_LS1021A
1333 select ARCH_SUPPORT_PSCI
1334 select BOARD_LATE_INIT
1335 select CPU_V7A
1336 select CPU_V7_HAS_NONSEC
1337 select CPU_V7_HAS_VIRT
1338 select SUPPORT_SPL
1339 imply SCSI
1340 help
1341 Support for Freescale LS1021AIOT platform.
1342 The LS1021A Freescale board (IOT) is a high-performance
1343 development platform that supports the QorIQ LS1021A
1344 Layerscape Architecture processor.
1345
1346 config TARGET_LS1043AQDS
1347 bool "Support ls1043aqds"
1348 select ARCH_LS1043A
1349 select ARM64
1350 select ARMV8_MULTIENTRY
1351 select BOARD_EARLY_INIT_F
1352 select BOARD_LATE_INIT
1353 select SUPPORT_SPL
1354 select FSL_DDR_INTERACTIVE if !SPL
1355 imply SCSI
1356 imply SCSI_AHCI
1357 help
1358 Support for Freescale LS1043AQDS platform.
1359
1360 config TARGET_LS1043ARDB
1361 bool "Support ls1043ardb"
1362 select ARCH_LS1043A
1363 select ARM64
1364 select ARMV8_MULTIENTRY
1365 select BOARD_EARLY_INIT_F
1366 select BOARD_LATE_INIT
1367 select SUPPORT_SPL
1368 help
1369 Support for Freescale LS1043ARDB platform.
1370
1371 config TARGET_LS1046AQDS
1372 bool "Support ls1046aqds"
1373 select ARCH_LS1046A
1374 select ARM64
1375 select ARMV8_MULTIENTRY
1376 select BOARD_EARLY_INIT_F
1377 select BOARD_LATE_INIT
1378 select DM_SPI_FLASH if DM_SPI
1379 select SUPPORT_SPL
1380 select FSL_DDR_BIST if !SPL
1381 select FSL_DDR_INTERACTIVE if !SPL
1382 select FSL_DDR_INTERACTIVE if !SPL
1383 imply SCSI
1384 help
1385 Support for Freescale LS1046AQDS platform.
1386 The LS1046A Development System (QDS) is a high-performance
1387 development platform that supports the QorIQ LS1046A
1388 Layerscape Architecture processor.
1389
1390 config TARGET_LS1046ARDB
1391 bool "Support ls1046ardb"
1392 select ARCH_LS1046A
1393 select ARM64
1394 select ARMV8_MULTIENTRY
1395 select BOARD_EARLY_INIT_F
1396 select BOARD_LATE_INIT
1397 select DM_SPI_FLASH if DM_SPI
1398 select POWER_MC34VR500
1399 select SUPPORT_SPL
1400 select FSL_DDR_BIST
1401 select FSL_DDR_INTERACTIVE if !SPL
1402 imply SCSI
1403 help
1404 Support for Freescale LS1046ARDB platform.
1405 The LS1046A Reference Design Board (RDB) is a high-performance
1406 development platform that supports the QorIQ LS1046A
1407 Layerscape Architecture processor.
1408
1409 config TARGET_LS1046AFRWY
1410 bool "Support ls1046afrwy"
1411 select ARCH_LS1046A
1412 select ARM64
1413 select ARMV8_MULTIENTRY
1414 select BOARD_EARLY_INIT_F
1415 select BOARD_LATE_INIT
1416 select DM_SPI_FLASH if DM_SPI
1417 imply SCSI
1418 help
1419 Support for Freescale LS1046AFRWY platform.
1420 The LS1046A Freeway Board (FRWY) is a high-performance
1421 development platform that supports the QorIQ LS1046A
1422 Layerscape Architecture processor.
1423 config TARGET_H2200
1424 bool "Support h2200"
1425 select CPU_PXA
1426
1427 config TARGET_COLIBRI_PXA270
1428 bool "Support colibri_pxa270"
1429 select CPU_PXA
1430
1431 config ARCH_UNIPHIER
1432 bool "Socionext UniPhier SoCs"
1433 select BOARD_LATE_INIT
1434 select DM
1435 select DM_GPIO
1436 select DM_I2C
1437 select DM_MMC
1438 select DM_RESET
1439 select DM_SERIAL
1440 select DM_USB
1441 select OF_BOARD_SETUP
1442 select OF_CONTROL
1443 select OF_LIBFDT
1444 select PINCTRL
1445 select SPL_BOARD_INIT if SPL
1446 select SPL_DM if SPL
1447 select SPL_LIBCOMMON_SUPPORT if SPL
1448 select SPL_LIBGENERIC_SUPPORT if SPL
1449 select SPL_OF_CONTROL if SPL
1450 select SPL_PINCTRL if SPL
1451 select SUPPORT_SPL
1452 imply CMD_DM
1453 imply DISTRO_DEFAULTS
1454 imply FAT_WRITE
1455 help
1456 Support for UniPhier SoC family developed by Socionext Inc.
1457 (formerly, System LSI Business Division of Panasonic Corporation)
1458
1459 config STM32
1460 bool "Support STMicroelectronics STM32 MCU with cortex M"
1461 select CPU_V7M
1462 select DM
1463 select DM_SERIAL
1464 imply CMD_DM
1465
1466 config ARCH_STI
1467 bool "Support STMicrolectronics SoCs"
1468 select BLK
1469 select CPU_V7A
1470 select DM
1471 select DM_MMC
1472 select DM_RESET
1473 select DM_SERIAL
1474 imply CMD_DM
1475 help
1476 Support for STMicroelectronics STiH407/10 SoC family.
1477 This SoC is used on Linaro 96Board STiH410-B2260
1478
1479 config ARCH_STM32MP
1480 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1481 select ARCH_MISC_INIT
1482 select BOARD_LATE_INIT
1483 select CLK
1484 select DM
1485 select DM_GPIO
1486 select DM_RESET
1487 select DM_SERIAL
1488 select MISC
1489 select OF_CONTROL
1490 select OF_LIBFDT
1491 select PINCTRL
1492 select REGMAP
1493 select SUPPORT_SPL
1494 select SYSCON
1495 select SYSRESET
1496 select SYS_THUMB_BUILD
1497 imply SPL_SYSRESET
1498 imply CMD_DM
1499 imply CMD_POWEROFF
1500 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1501 imply USE_PREBOOT
1502 help
1503 Support for STM32MP SoC family developed by STMicroelectronics,
1504 MPUs based on ARM cortex A core
1505 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1506 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1507 chain.
1508 SPL is the unsecure FSBL for the basic boot chain.
1509
1510 config ARCH_ROCKCHIP
1511 bool "Support Rockchip SoCs"
1512 select BLK
1513 select DM
1514 select DM_GPIO
1515 select DM_I2C
1516 select DM_MMC
1517 select DM_PWM
1518 select DM_REGULATOR
1519 select DM_SERIAL
1520 select DM_SPI
1521 select DM_SPI_FLASH
1522 select DM_USB if USB
1523 select ENABLE_ARM_SOC_BOOT0_HOOK
1524 select OF_CONTROL
1525 select SPI
1526 select SPL_DM if SPL
1527 select SPL_SYS_MALLOC_SIMPLE if SPL
1528 select SYS_MALLOC_F
1529 select SYS_THUMB_BUILD if !ARM64
1530 imply ADC
1531 imply CMD_DM
1532 imply DEBUG_UART_BOARD_INIT
1533 imply DISTRO_DEFAULTS
1534 imply FAT_WRITE
1535 imply SARADC_ROCKCHIP
1536 imply SPL_SYSRESET
1537 imply SYS_NS16550
1538 imply TPL_SYSRESET
1539 imply USB_FUNCTION_FASTBOOT
1540
1541 config TARGET_THUNDERX_88XX
1542 bool "Support ThunderX 88xx"
1543 select ARM64
1544 select OF_CONTROL
1545 select PL01X_SERIAL
1546 select SYS_CACHE_SHIFT_7
1547
1548 config ARCH_ASPEED
1549 bool "Support Aspeed SoCs"
1550 select DM
1551 select OF_CONTROL
1552 imply CMD_DM
1553
1554 endchoice
1555
1556 config TI_SECURE_DEVICE
1557 bool "HS Device Type Support"
1558 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1559 help
1560 If a high secure (HS) device type is being used, this config
1561 must be set. This option impacts various aspects of the
1562 build system (to create signed boot images that can be
1563 authenticated) and the code. See the doc/README.ti-secure
1564 file for further details.
1565
1566 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1567 config ISW_ENTRY_ADDR
1568 hex "Address in memory or XIP address of bootloader entry point"
1569 default 0x402F4000 if AM43XX
1570 default 0x402F0400 if AM33XX
1571 default 0x40301350 if OMAP54XX
1572 help
1573 After any reset, the boot ROM searches the boot media for a valid
1574 boot image. For non-XIP devices, the ROM then copies the image into
1575 internal memory. For all boot modes, after the ROM processes the
1576 boot image it eventually computes the entry point address depending
1577 on the device type (secure/non-secure), boot media (xip/non-xip) and
1578 image headers.
1579 endif
1580
1581 source "arch/arm/mach-aspeed/Kconfig"
1582
1583 source "arch/arm/mach-at91/Kconfig"
1584
1585 source "arch/arm/mach-bcm283x/Kconfig"
1586
1587 source "arch/arm/mach-bcmstb/Kconfig"
1588
1589 source "arch/arm/mach-davinci/Kconfig"
1590
1591 source "arch/arm/mach-exynos/Kconfig"
1592
1593 source "arch/arm/mach-highbank/Kconfig"
1594
1595 source "arch/arm/mach-integrator/Kconfig"
1596
1597 source "arch/arm/mach-k3/Kconfig"
1598
1599 source "arch/arm/mach-keystone/Kconfig"
1600
1601 source "arch/arm/mach-kirkwood/Kconfig"
1602
1603 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1604
1605 source "arch/arm/mach-mvebu/Kconfig"
1606
1607 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1608
1609 source "arch/arm/mach-imx/mx2/Kconfig"
1610
1611 source "arch/arm/mach-imx/mx3/Kconfig"
1612
1613 source "arch/arm/mach-imx/mx5/Kconfig"
1614
1615 source "arch/arm/mach-imx/mx6/Kconfig"
1616
1617 source "arch/arm/mach-imx/mx7/Kconfig"
1618
1619 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1620
1621 source "arch/arm/mach-imx/imx8/Kconfig"
1622
1623 source "arch/arm/mach-imx/imx8m/Kconfig"
1624
1625 source "arch/arm/mach-imx/mxs/Kconfig"
1626
1627 source "arch/arm/mach-omap2/Kconfig"
1628
1629 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1630
1631 source "arch/arm/mach-orion5x/Kconfig"
1632
1633 source "arch/arm/mach-owl/Kconfig"
1634
1635 source "arch/arm/mach-rmobile/Kconfig"
1636
1637 source "arch/arm/mach-meson/Kconfig"
1638
1639 source "arch/arm/mach-mediatek/Kconfig"
1640
1641 source "arch/arm/mach-qemu/Kconfig"
1642
1643 source "arch/arm/mach-rockchip/Kconfig"
1644
1645 source "arch/arm/mach-s5pc1xx/Kconfig"
1646
1647 source "arch/arm/mach-snapdragon/Kconfig"
1648
1649 source "arch/arm/mach-socfpga/Kconfig"
1650
1651 source "arch/arm/mach-sti/Kconfig"
1652
1653 source "arch/arm/mach-stm32/Kconfig"
1654
1655 source "arch/arm/mach-stm32mp/Kconfig"
1656
1657 source "arch/arm/mach-sunxi/Kconfig"
1658
1659 source "arch/arm/mach-tegra/Kconfig"
1660
1661 source "arch/arm/mach-uniphier/Kconfig"
1662
1663 source "arch/arm/cpu/armv7/vf610/Kconfig"
1664
1665 source "arch/arm/mach-zynq/Kconfig"
1666
1667 source "arch/arm/mach-zynqmp/Kconfig"
1668
1669 source "arch/arm/mach-versal/Kconfig"
1670
1671 source "arch/arm/mach-zynqmp-r5/Kconfig"
1672
1673 source "arch/arm/cpu/armv7/Kconfig"
1674
1675 source "arch/arm/cpu/armv8/Kconfig"
1676
1677 source "arch/arm/mach-imx/Kconfig"
1678
1679 source "board/bosch/shc/Kconfig"
1680 source "board/bosch/guardian/Kconfig"
1681 source "board/CarMediaLab/flea3/Kconfig"
1682 source "board/Marvell/aspenite/Kconfig"
1683 source "board/Marvell/gplugd/Kconfig"
1684 source "board/armadeus/apf27/Kconfig"
1685 source "board/armltd/vexpress/Kconfig"
1686 source "board/armltd/vexpress64/Kconfig"
1687 source "board/broadcom/bcm23550_w1d/Kconfig"
1688 source "board/broadcom/bcm28155_ap/Kconfig"
1689 source "board/broadcom/bcm963158/Kconfig"
1690 source "board/broadcom/bcm968580xref/Kconfig"
1691 source "board/broadcom/bcmcygnus/Kconfig"
1692 source "board/broadcom/bcmnsp/Kconfig"
1693 source "board/broadcom/bcmns2/Kconfig"
1694 source "board/cavium/thunderx/Kconfig"
1695 source "board/cirrus/edb93xx/Kconfig"
1696 source "board/eets/pdu001/Kconfig"
1697 source "board/emulation/qemu-arm/Kconfig"
1698 source "board/freescale/ls2080a/Kconfig"
1699 source "board/freescale/ls2080aqds/Kconfig"
1700 source "board/freescale/ls2080ardb/Kconfig"
1701 source "board/freescale/ls1088a/Kconfig"
1702 source "board/freescale/ls1028a/Kconfig"
1703 source "board/freescale/ls1021aqds/Kconfig"
1704 source "board/freescale/ls1043aqds/Kconfig"
1705 source "board/freescale/ls1021atwr/Kconfig"
1706 source "board/freescale/ls1021aiot/Kconfig"
1707 source "board/freescale/ls1046aqds/Kconfig"
1708 source "board/freescale/ls1043ardb/Kconfig"
1709 source "board/freescale/ls1046ardb/Kconfig"
1710 source "board/freescale/ls1046afrwy/Kconfig"
1711 source "board/freescale/ls1012aqds/Kconfig"
1712 source "board/freescale/ls1012ardb/Kconfig"
1713 source "board/freescale/ls1012afrdm/Kconfig"
1714 source "board/freescale/lx2160a/Kconfig"
1715 source "board/freescale/mx35pdk/Kconfig"
1716 source "board/freescale/s32v234evb/Kconfig"
1717 source "board/grinn/chiliboard/Kconfig"
1718 source "board/gumstix/pepper/Kconfig"
1719 source "board/h2200/Kconfig"
1720 source "board/hisilicon/hikey/Kconfig"
1721 source "board/hisilicon/poplar/Kconfig"
1722 source "board/isee/igep003x/Kconfig"
1723 source "board/phytec/pcm051/Kconfig"
1724 source "board/silica/pengwyn/Kconfig"
1725 source "board/spear/spear300/Kconfig"
1726 source "board/spear/spear310/Kconfig"
1727 source "board/spear/spear320/Kconfig"
1728 source "board/spear/spear600/Kconfig"
1729 source "board/spear/x600/Kconfig"
1730 source "board/st/stv0991/Kconfig"
1731 source "board/tcl/sl50/Kconfig"
1732 source "board/ucRobotics/bubblegum_96/Kconfig"
1733 source "board/birdland/bav335x/Kconfig"
1734 source "board/toradex/colibri_pxa270/Kconfig"
1735 source "board/variscite/dart_6ul/Kconfig"
1736 source "board/vscom/baltos/Kconfig"
1737 source "board/woodburn/Kconfig"
1738 source "board/xilinx/Kconfig"
1739 source "board/xilinx/zynq/Kconfig"
1740 source "board/xilinx/zynqmp/Kconfig"
1741
1742 source "arch/arm/Kconfig.debug"
1743
1744 endmenu
1745
1746 config SPL_LDSCRIPT
1747 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1748 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1749 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1750
1751