arch/microblaze/cpu/u-boot-spl.lds

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2013 - 2014 Xilinx, Inc
   4  *
   5  * Michal Simek <michal.simek@xilinx.com>
   6  */
   7
   8 #include <asm-offsets.h>
   9
  10 OUTPUT_ARCH(microblaze)
  11 ENTRY(_start)
  12
  13 SECTIONS
  14 {
  15         .text ALIGN(0x4):
  16         {
  17                 __text_start = .;
  18                 arch/microblaze/cpu/start.o (.text)
  19                 *(.text)
  20                 *(.text.*)
  21                 __text_end = .;
  22         }
  23
  24         .rodata ALIGN(0x4):
  25         {
  26                 __rodata_start = .;
  27                 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
  28                 __rodata_end = .;
  29         }
  30
  31         .data ALIGN(0x4):
  32         {
  33                 __data_start = .;
  34                 *(.data)
  35                 *(.data.*)
  36                 __data_end = .;
  37         }
  38
  39         . = ALIGN(4);
  40         .u_boot_list : {
  41                 KEEP(*(SORT(.u_boot_list*)));
  42         }
  43         __init_end = . ;
  44
  45         .bss ALIGN(0x4):
  46         {
  47                 __bss_start = .;
  48                 *(.sbss)
  49                 *(.scommon)
  50                 *(.bss)
  51                 *(.bss.*)
  52                 *(COMMON)
  53                 . = ALIGN(4);
  54                 __bss_end = .;
  55         }
  56         __end = . ;
  57 }
  58
  59 #if defined(CONFIG_SPL_MAX_FOOTPRINT)
  60 ASSERT(__end - _start < (CONFIG_SPL_MAX_FOOTPRINT), \
  61         "SPL image plus BSS too big");
  62 #endif