1 // SPDX-License-Identifier: GPL-2.0+
3 * Pinmux configuration for CompuLab CL-SOM-AM57x board
5 * (C) Copyright 2016 CompuLab, Ltd. http://compulab.co.il/
7 * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
9 #include <asm/arch/sys_proto.h>
10 #include <asm/arch/mux_dra7xx.h>
13 static const struct pad_conf_entry cl_som_am57x_padconf_console
[] = {
14 {UART3_RXD
, (M0
| PIN_INPUT_PULLUP
| SLEWCONTROL
)}, /* UART3_RXD */
15 {UART3_TXD
, (M0
| PIN_INPUT_PULLUP
| SLEWCONTROL
)}, /* UART3_TXD */
19 static const struct pad_conf_entry cl_som_am57x_padconf_pmic
[] = {
20 {MCASP1_ACLKR
, (M10
| PIN_INPUT
)}, /* MCASP1_ACLKR.I2C4_SDA */
21 {MCASP1_FSR
, (M10
| PIN_INPUT
)}, /* MCASP1_FSR.I2C4_SCL */
25 static const struct pad_conf_entry cl_som_am57x_padconf_green_led
[] = {
26 {GPMC_A15
, (M14
| PIN_OUTPUT_PULLDOWN
)}, /* GPMC_A15.GPIO2_5 */
30 static const struct pad_conf_entry cl_som_am57x_padconf_sd_card
[] = {
31 {MMC1_CLK
, (M0
| PIN_INPUT_PULLUP
)}, /* MMC1_CLK */
32 {MMC1_CMD
, (M0
| PIN_INPUT_PULLUP
)}, /* MMC1_CMD */
33 {MMC1_DAT0
, (M0
| PIN_INPUT_PULLUP
)}, /* MMC1_DAT0 */
34 {MMC1_DAT1
, (M0
| PIN_INPUT_PULLUP
)}, /* MMC1_DAT1 */
35 {MMC1_DAT2
, (M0
| PIN_INPUT_PULLUP
)}, /* MMC1_DAT2 */
36 {MMC1_DAT3
, (M0
| PIN_INPUT_PULLUP
)}, /* MMC1_DAT3 */
37 {MMC1_SDCD
, (M14
| PIN_INPUT
) }, /* MMC1_SDCD */
38 {MMC1_SDWP
, (M14
| PIN_INPUT
) }, /* MMC1_SDWP */
41 /* WiFi - must be in the safe mode on boot */
42 static const struct pad_conf_entry cl_som_am57x_padconf_wifi
[] = {
43 {UART1_CTSN
, (M15
| PIN_INPUT_PULLDOWN
)}, /* UART1_CTSN */
44 {UART1_RTSN
, (M15
| PIN_INPUT_PULLDOWN
)}, /* UART1_RTSN */
45 {UART2_RXD
, (M15
| PIN_INPUT_PULLDOWN
)}, /* UART2_RXD */
46 {UART2_TXD
, (M15
| PIN_INPUT_PULLDOWN
)}, /* UART2_TXD */
47 {UART2_CTSN
, (M15
| PIN_INPUT_PULLDOWN
)}, /* UART2_CTSN */
48 {UART2_RTSN
, (M15
| PIN_INPUT_PULLDOWN
)}, /* UART2_RTSN */
52 static const struct pad_conf_entry cl_som_am57x_padconf_qspi
[] = {
53 {GPMC_A13
, (M1
| PIN_INPUT
) }, /* GPMC_A13.QSPI1_RTCLK */
54 {GPMC_A18
, (M1
| PIN_INPUT
) }, /* GPMC_A18.QSPI1_SCLK */
55 {GPMC_A16
, (M1
| PIN_INPUT
) }, /* GPMC_A16.QSPI1_D0 */
56 {GPMC_A17
, (M1
| PIN_INPUT
) }, /* GPMC_A17.QSPI1_D1 */
57 {GPMC_CS2
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_CS2.QSPI1_CS0 */
60 /* GPIO Expander I2C */
61 static const struct pad_conf_entry cl_som_am57x_padconf_i2c_gpio
[] = {
62 {MCASP1_AXR0
, (M10
| PIN_INPUT
)}, /* MCASP1_AXR0.I2C5_SDA */
63 {MCASP1_AXR1
, (M10
| PIN_INPUT
)}, /* MCASP1_AXR1.I2C5_SCL */
66 /* eMMC internal storage */
67 static const struct pad_conf_entry cl_som_am57x_padconf_emmc
[] = {
68 {GPMC_A19
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A19.MMC2_DAT4 */
69 {GPMC_A20
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A20.MMC2_DAT5 */
70 {GPMC_A21
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A21.MMC2_DAT6 */
71 {GPMC_A22
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A22.MMC2_DAT7 */
72 {GPMC_A23
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A23.MMC2_CLK */
73 {GPMC_A24
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A24.MMC2_DAT0 */
74 {GPMC_A25
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A25.MMC2_DAT1 */
75 {GPMC_A26
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A26.MMC2_DAT2 */
76 {GPMC_A27
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_A27.MMC2_DAT3 */
77 {GPMC_CS1
, (M1
| PIN_INPUT_PULLUP
)}, /* GPMC_CS1.MMC2_CMD */
81 static const struct pad_conf_entry cl_som_am57x_padconf_usb
[] = {
82 /* USB1_DRVVBUS.USB1_DRVVBUS */
83 {USB1_DRVVBUS
, (M0
| PIN_OUTPUT_PULLDOWN
| SLEWCONTROL
) },
87 static const struct pad_conf_entry cl_som_am57x_padconf_ethernet
[] = {
89 {VIN2A_D10
, (M3
| PIN_OUTPUT_PULLUP
) }, /* VIN2A_D10.MDIO_MCLK */
90 {VIN2A_D11
, (M3
| PIN_INPUT_PULLUP
) }, /* VIN2A_D11.MDIO_D */
91 /* EMAC Slave 1 at addr 0x1 - Default interface */
92 {VIN2A_D12
, (M3
| PIN_OUTPUT
) }, /* VIN2A_D12.RGMII1_TXC */
93 {VIN2A_D13
, (M3
| PIN_OUTPUT
) }, /* VIN2A_D13.RGMII1_TXCTL */
94 {VIN2A_D14
, (M3
| PIN_OUTPUT
) }, /* VIN2A_D14.RGMII1_TXD3 */
95 {VIN2A_D15
, (M3
| PIN_OUTPUT
) }, /* VIN2A_D15.RGMII1_TXD2 */
96 {VIN2A_D16
, (M3
| PIN_OUTPUT
) }, /* VIN2A_D16.RGMII1_TXD1 */
97 {VIN2A_D17
, (M3
| PIN_OUTPUT
) }, /* VIN2A_D17.RGMII1_TXD0 */
98 {VIN2A_D18
, (M3
| PIN_INPUT_PULLDOWN
) }, /* VIN2A_D18.RGMII1_RXC */
99 {VIN2A_D19
, (M3
| PIN_INPUT_PULLDOWN
) }, /* VIN2A_D19.RGMII1_RXCTL */
100 {VIN2A_D20
, (M3
| PIN_INPUT_PULLDOWN
) }, /* VIN2A_D20.RGMII1_RXD3 */
101 {VIN2A_D21
, (M3
| PIN_INPUT_PULLDOWN
) }, /* VIN2A_D21.RGMII1_RXD2 */
102 {VIN2A_D22
, (M3
| PIN_INPUT_PULLDOWN
) }, /* VIN2A_D22.RGMII1_RXD1 */
103 {VIN2A_D23
, (M3
| PIN_INPUT_PULLDOWN
) }, /* VIN2A_D23.RGMII1_RXD0 */
104 /* Eth PHY1 reset GPIOs*/
105 {VIN2A_CLK0
, (M14
| PIN_OUTPUT_PULLDOWN
)}, /* VIN2A_CLK0.GPIO3_28 */
108 #define SET_MUX(mux_array) do_set_mux32((*ctrl)->control_padconf_core_base, \
109 mux_array, ARRAY_SIZE(mux_array))
111 void set_muxconf_regs(void)
113 SET_MUX(cl_som_am57x_padconf_console
);
114 SET_MUX(cl_som_am57x_padconf_pmic
);
115 SET_MUX(cl_som_am57x_padconf_green_led
);
116 SET_MUX(cl_som_am57x_padconf_sd_card
);
117 SET_MUX(cl_som_am57x_padconf_wifi
);
118 SET_MUX(cl_som_am57x_padconf_qspi
);
119 SET_MUX(cl_som_am57x_padconf_i2c_gpio
);
120 SET_MUX(cl_som_am57x_padconf_emmc
);
121 SET_MUX(cl_som_am57x_padconf_usb
);
122 SET_MUX(cl_som_am57x_padconf_ethernet
);