common/board_f.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 2011 The Chromium OS Authors.
   4  * (C) Copyright 2002-2006
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * (C) Copyright 2002
   8  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   9  * Marius Groeger <mgroeger@sysgo.de>
  10  */
  11
  12 #include <common.h>
  13 #include <bloblist.h>
  14 #include <console.h>
  15 #include <cpu.h>
  16 #include <dm.h>
  17 #include <environment.h>
  18 #include <fdtdec.h>
  19 #include <fs.h>
  20 #include <i2c.h>
  21 #include <initcall.h>
  22 #include <malloc.h>
  23 #include <mapmem.h>
  24 #include <os.h>
  25 #include <post.h>
  26 #include <relocate.h>
  27 #ifdef CONFIG_SPL
  28 #include <spl.h>
  29 #endif
  30 #include <status_led.h>
  31 #include <sysreset.h>
  32 #include <timer.h>
  33 #include <trace.h>
  34 #include <video.h>
  35 #include <watchdog.h>
  36 #ifdef CONFIG_MACH_TYPE
  37 #include <asm/mach-types.h>
  38 #endif
  39 #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  40 #include <asm/mp.h>
  41 #endif
  42 #include <asm/io.h>
  43 #include <asm/sections.h>
  44 #include <dm/root.h>
  45 #include <linux/errno.h>
  46
  47 /*
  48  * Pointer to initial global data area
  49  *
  50  * Here we initialize it if needed.
  51  */
  52 #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  53 #undef  XTRN_DECLARE_GLOBAL_DATA_PTR
  54 #define XTRN_DECLARE_GLOBAL_DATA_PTR    /* empty = allocate here */
  55 DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  56 #else
  57 DECLARE_GLOBAL_DATA_PTR;
  58 #endif
  59
  60 /*
  61  * TODO(sjg@chromium.org): IMO this code should be
  62  * refactored to a single function, something like:
  63  *
  64  * void led_set_state(enum led_colour_t colour, int on);
  65  */
  66 /************************************************************************
  67  * Coloured LED functionality
  68  ************************************************************************
  69  * May be supplied by boards if desired
  70  */
  71 __weak void coloured_LED_init(void) {}
  72 __weak void red_led_on(void) {}
  73 __weak void red_led_off(void) {}
  74 __weak void green_led_on(void) {}
  75 __weak void green_led_off(void) {}
  76 __weak void yellow_led_on(void) {}
  77 __weak void yellow_led_off(void) {}
  78 __weak void blue_led_on(void) {}
  79 __weak void blue_led_off(void) {}
  80
  81 /*
  82  * Why is gd allocated a register? Prior to reloc it might be better to
  83  * just pass it around to each function in this file?
  84  *
  85  * After reloc one could argue that it is hardly used and doesn't need
  86  * to be in a register. Or if it is it should perhaps hold pointers to all
  87  * global data for all modules, so that post-reloc we can avoid the massive
  88  * literal pool we get on ARM. Or perhaps just encourage each module to use
  89  * a structure...
  90  */
  91
  92 #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  93 static int init_func_watchdog_init(void)
  94 {
  95 # if defined(CONFIG_HW_WATCHDOG) && \
  96         (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  97         defined(CONFIG_SH) || \
  98         defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  99         defined(CONFIG_IMX_WATCHDOG))
 100         hw_watchdog_init();
 101         puts("       Watchdog enabled\n");
 102 # endif
 103         WATCHDOG_RESET();
 104
 105         return 0;
 106 }
 107
 108 int init_func_watchdog_reset(void)
 109 {
 110         WATCHDOG_RESET();
 111
 112         return 0;
 113 }
 114 #endif /* CONFIG_WATCHDOG */
 115
 116 __weak void board_add_ram_info(int use_default)
 117 {
 118         /* please define platform specific board_add_ram_info() */
 119 }
 120
 121 static int init_baud_rate(void)
 122 {
 123         gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
 124         return 0;
 125 }
 126
 127 static int display_text_info(void)
 128 {
 129 #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
 130         ulong bss_start, bss_end, text_base;
 131
 132         bss_start = (ulong)&__bss_start;
 133         bss_end = (ulong)&__bss_end;
 134
 135 #ifdef CONFIG_SYS_TEXT_BASE
 136         text_base = CONFIG_SYS_TEXT_BASE;
 137 #else
 138         text_base = CONFIG_SYS_MONITOR_BASE;
 139 #endif
 140
 141         debug("U-Boot code: %08lX -> %08lX  BSS: -> %08lX\n",
 142               text_base, bss_start, bss_end);
 143 #endif
 144
 145         return 0;
 146 }
 147
 148 #ifdef CONFIG_SYSRESET
 149 static int print_resetinfo(void)
 150 {
 151         struct udevice *dev;
 152         char status[256];
 153         int ret;
 154
 155         ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
 156         if (ret) {
 157                 debug("%s: No sysreset device found (error: %d)\n",
 158                       __func__, ret);
 159                 /* Not all boards have sysreset drivers available during early
 160                  * boot, so don't fail if one can't be found.
 161                  */
 162                 return 0;
 163         }
 164
 165         if (!sysreset_get_status(dev, status, sizeof(status)))
 166                 printf("%s", status);
 167
 168         return 0;
 169 }
 170 #endif
 171
 172 #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
 173 static int print_cpuinfo(void)
 174 {
 175         struct udevice *dev;
 176         char desc[512];
 177         int ret;
 178
 179         ret = uclass_first_device_err(UCLASS_CPU, &dev);
 180         if (ret) {
 181                 debug("%s: Could not get CPU device (err = %d)\n",
 182                       __func__, ret);
 183                 return ret;
 184         }
 185
 186         ret = cpu_get_desc(dev, desc, sizeof(desc));
 187         if (ret) {
 188                 debug("%s: Could not get CPU description (err = %d)\n",
 189                       dev->name, ret);
 190                 return ret;
 191         }
 192
 193         printf("CPU:   %s\n", desc);
 194
 195         return 0;
 196 }
 197 #endif
 198
 199 static int announce_dram_init(void)
 200 {
 201         puts("DRAM:  ");
 202         return 0;
 203 }
 204
 205 static int show_dram_config(void)
 206 {
 207         unsigned long long size;
 208
 209 #ifdef CONFIG_NR_DRAM_BANKS
 210         int i;
 211
 212         debug("\nRAM Configuration:\n");
 213         for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 214                 size += gd->bd->bi_dram[i].size;
 215                 debug("Bank #%d: %llx ", i,
 216                       (unsigned long long)(gd->bd->bi_dram[i].start));
 217 #ifdef DEBUG
 218                 print_size(gd->bd->bi_dram[i].size, "\n");
 219 #endif
 220         }
 221         debug("\nDRAM:  ");
 222 #else
 223         size = gd->ram_size;
 224 #endif
 225
 226         print_size(size, "");
 227         board_add_ram_info(0);
 228         putc('\n');
 229
 230         return 0;
 231 }
 232
 233 __weak int dram_init_banksize(void)
 234 {
 235 #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
 236         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
 237         gd->bd->bi_dram[0].size = get_effective_memsize();
 238 #endif
 239
 240         return 0;
 241 }
 242
 243 #if defined(CONFIG_SYS_I2C)
 244 static int init_func_i2c(void)
 245 {
 246         puts("I2C:   ");
 247 #ifdef CONFIG_SYS_I2C
 248         i2c_init_all();
 249 #else
 250         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 251 #endif
 252         puts("ready\n");
 253         return 0;
 254 }
 255 #endif
 256
 257 #if defined(CONFIG_VID)
 258 __weak int init_func_vid(void)
 259 {
 260         return 0;
 261 }
 262 #endif
 263
 264 static int setup_mon_len(void)
 265 {
 266 #if defined(__ARM__) || defined(__MICROBLAZE__)
 267         gd->mon_len = (ulong)&__bss_end - (ulong)_start;
 268 #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
 269         gd->mon_len = (ulong)&_end - (ulong)_init;
 270 #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
 271         gd->mon_len = CONFIG_SYS_MONITOR_LEN;
 272 #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
 273         gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
 274 #elif defined(CONFIG_SYS_MONITOR_BASE)
 275         /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
 276         gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
 277 #endif
 278         return 0;
 279 }
 280
 281 static int setup_spl_handoff(void)
 282 {
 283 #if CONFIG_IS_ENABLED(HANDOFF)
 284         gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
 285                                         sizeof(struct spl_handoff));
 286         debug("Found SPL hand-off info %p\n", gd->spl_handoff);
 287 #endif
 288
 289         return 0;
 290 }
 291
 292 __weak int arch_cpu_init(void)
 293 {
 294         return 0;
 295 }
 296
 297 __weak int mach_cpu_init(void)
 298 {
 299         return 0;
 300 }
 301
 302 /* Get the top of usable RAM */
 303 __weak ulong board_get_usable_ram_top(ulong total_size)
 304 {
 305 #ifdef CONFIG_SYS_SDRAM_BASE
 306         /*
 307          * Detect whether we have so much RAM that it goes past the end of our
 308          * 32-bit address space. If so, clip the usable RAM so it doesn't.
 309          */
 310         if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
 311                 /*
 312                  * Will wrap back to top of 32-bit space when reservations
 313                  * are made.
 314                  */
 315                 return 0;
 316 #endif
 317         return gd->ram_top;
 318 }
 319
 320 static int setup_dest_addr(void)
 321 {
 322         debug("Monitor len: %08lX\n", gd->mon_len);
 323         /*
 324          * Ram is setup, size stored in gd !!
 325          */
 326         debug("Ram size: %08lX\n", (ulong)gd->ram_size);
 327 #if defined(CONFIG_SYS_MEM_TOP_HIDE)
 328         /*
 329          * Subtract specified amount of memory to hide so that it won't
 330          * get "touched" at all by U-Boot. By fixing up gd->ram_size
 331          * the Linux kernel should now get passed the now "corrected"
 332          * memory size and won't touch it either. This should work
 333          * for arch/ppc and arch/powerpc. Only Linux board ports in
 334          * arch/powerpc with bootwrapper support, that recalculate the
 335          * memory size from the SDRAM controller setup will have to
 336          * get fixed.
 337          */
 338         gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
 339 #endif
 340 #ifdef CONFIG_SYS_SDRAM_BASE
 341         gd->ram_base = CONFIG_SYS_SDRAM_BASE;
 342 #endif
 343         gd->ram_top = gd->ram_base + get_effective_memsize();
 344         gd->ram_top = board_get_usable_ram_top(gd->mon_len);
 345         gd->relocaddr = gd->ram_top;
 346         debug("Ram top: %08lX\n", (ulong)gd->ram_top);
 347 #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
 348         /*
 349          * We need to make sure the location we intend to put secondary core
 350          * boot code is reserved and not used by any part of u-boot
 351          */
 352         if (gd->relocaddr > determine_mp_bootpg(NULL)) {
 353                 gd->relocaddr = determine_mp_bootpg(NULL);
 354                 debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
 355         }
 356 #endif
 357         return 0;
 358 }
 359
 360 #ifdef CONFIG_PRAM
 361 /* reserve protected RAM */
 362 static int reserve_pram(void)
 363 {
 364         ulong reg;
 365
 366         reg = env_get_ulong("pram", 10, CONFIG_PRAM);
 367         gd->relocaddr -= (reg << 10);           /* size is in kB */
 368         debug("Reserving %ldk for protected RAM at %08lx\n", reg,
 369               gd->relocaddr);
 370         return 0;
 371 }
 372 #endif /* CONFIG_PRAM */
 373
 374 /* Round memory pointer down to next 4 kB limit */
 375 static int reserve_round_4k(void)
 376 {
 377         gd->relocaddr &= ~(4096 - 1);
 378         return 0;
 379 }
 380
 381 #ifdef CONFIG_ARM
 382 __weak int reserve_mmu(void)
 383 {
 384 #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
 385         /* reserve TLB table */
 386         gd->arch.tlb_size = PGTABLE_SIZE;
 387         gd->relocaddr -= gd->arch.tlb_size;
 388
 389         /* round down to next 64 kB limit */
 390         gd->relocaddr &= ~(0x10000 - 1);
 391
 392         gd->arch.tlb_addr = gd->relocaddr;
 393         debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
 394               gd->arch.tlb_addr + gd->arch.tlb_size);
 395
 396 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
 397         /*
 398          * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
 399          * with location within secure ram.
 400          */
 401         gd->arch.tlb_allocated = gd->arch.tlb_addr;
 402 #endif
 403 #endif
 404
 405         return 0;
 406 }
 407 #endif
 408
 409 static int reserve_video(void)
 410 {
 411 #ifdef CONFIG_DM_VIDEO
 412         ulong addr;
 413         int ret;
 414
 415         addr = gd->relocaddr;
 416         ret = video_reserve(&addr);
 417         if (ret)
 418                 return ret;
 419         gd->relocaddr = addr;
 420 #elif defined(CONFIG_LCD)
 421 #  ifdef CONFIG_FB_ADDR
 422         gd->fb_base = CONFIG_FB_ADDR;
 423 #  else
 424         /* reserve memory for LCD display (always full pages) */
 425         gd->relocaddr = lcd_setmem(gd->relocaddr);
 426         gd->fb_base = gd->relocaddr;
 427 #  endif /* CONFIG_FB_ADDR */
 428 #elif defined(CONFIG_VIDEO) && \
 429                 (!defined(CONFIG_PPC)) && \
 430                 !defined(CONFIG_ARM) && !defined(CONFIG_X86) && \
 431                 !defined(CONFIG_M68K)
 432         /* reserve memory for video display (always full pages) */
 433         gd->relocaddr = video_setmem(gd->relocaddr);
 434         gd->fb_base = gd->relocaddr;
 435 #endif
 436
 437         return 0;
 438 }
 439
 440 static int reserve_trace(void)
 441 {
 442 #ifdef CONFIG_TRACE
 443         gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
 444         gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
 445         debug("Reserving %dk for trace data at: %08lx\n",
 446               CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
 447 #endif
 448
 449         return 0;
 450 }
 451
 452 static int reserve_uboot(void)
 453 {
 454         if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
 455                 /*
 456                  * reserve memory for U-Boot code, data & bss
 457                  * round down to next 4 kB limit
 458                  */
 459                 gd->relocaddr -= gd->mon_len;
 460                 gd->relocaddr &= ~(4096 - 1);
 461         #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
 462                 /* round down to next 64 kB limit so that IVPR stays aligned */
 463                 gd->relocaddr &= ~(65536 - 1);
 464         #endif
 465
 466                 debug("Reserving %ldk for U-Boot at: %08lx\n",
 467                       gd->mon_len >> 10, gd->relocaddr);
 468         }
 469
 470         gd->start_addr_sp = gd->relocaddr;
 471
 472         return 0;
 473 }
 474
 475 /* reserve memory for malloc() area */
 476 static int reserve_malloc(void)
 477 {
 478         gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
 479         debug("Reserving %dk for malloc() at: %08lx\n",
 480               TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
 481         return 0;
 482 }
 483
 484 /* (permanently) allocate a Board Info struct */
 485 static int reserve_board(void)
 486 {
 487         if (!gd->bd) {
 488                 gd->start_addr_sp -= sizeof(bd_t);
 489                 gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
 490                 memset(gd->bd, '\0', sizeof(bd_t));
 491                 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
 492                       sizeof(bd_t), gd->start_addr_sp);
 493         }
 494         return 0;
 495 }
 496
 497 static int setup_machine(void)
 498 {
 499 #ifdef CONFIG_MACH_TYPE
 500         gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
 501 #endif
 502         return 0;
 503 }
 504
 505 static int reserve_global_data(void)
 506 {
 507         gd->start_addr_sp -= sizeof(gd_t);
 508         gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
 509         debug("Reserving %zu Bytes for Global Data at: %08lx\n",
 510               sizeof(gd_t), gd->start_addr_sp);
 511         return 0;
 512 }
 513
 514 static int reserve_fdt(void)
 515 {
 516 #ifndef CONFIG_OF_EMBED
 517         /*
 518          * If the device tree is sitting immediately above our image then we
 519          * must relocate it. If it is embedded in the data section, then it
 520          * will be relocated with other data.
 521          */
 522         if (gd->fdt_blob) {
 523                 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
 524
 525                 gd->start_addr_sp -= gd->fdt_size;
 526                 gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
 527                 debug("Reserving %lu Bytes for FDT at: %08lx\n",
 528                       gd->fdt_size, gd->start_addr_sp);
 529         }
 530 #endif
 531
 532         return 0;
 533 }
 534
 535 static int reserve_bootstage(void)
 536 {
 537 #ifdef CONFIG_BOOTSTAGE
 538         int size = bootstage_get_size();
 539
 540         gd->start_addr_sp -= size;
 541         gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
 542         debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
 543               gd->start_addr_sp);
 544 #endif
 545
 546         return 0;
 547 }
 548
 549 __weak int arch_reserve_stacks(void)
 550 {
 551         return 0;
 552 }
 553
 554 static int reserve_stacks(void)
 555 {
 556         /* make stack pointer 16-byte aligned */
 557         gd->start_addr_sp -= 16;
 558         gd->start_addr_sp &= ~0xf;
 559
 560         /*
 561          * let the architecture-specific code tailor gd->start_addr_sp and
 562          * gd->irq_sp
 563          */
 564         return arch_reserve_stacks();
 565 }
 566
 567 static int reserve_bloblist(void)
 568 {
 569 #ifdef CONFIG_BLOBLIST
 570         gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
 571         gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
 572 #endif
 573
 574         return 0;
 575 }
 576
 577 static int display_new_sp(void)
 578 {
 579         debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
 580
 581         return 0;
 582 }
 583
 584 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 585         defined(CONFIG_SH)
 586 static int setup_board_part1(void)
 587 {
 588         bd_t *bd = gd->bd;
 589
 590         /*
 591          * Save local variables to board info struct
 592          */
 593         bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;        /* start of memory */
 594         bd->bi_memsize = gd->ram_size;                  /* size in bytes */
 595
 596 #ifdef CONFIG_SYS_SRAM_BASE
 597         bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;        /* start of SRAM */
 598         bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;         /* size  of SRAM */
 599 #endif
 600
 601 #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
 602         bd->bi_immr_base = CONFIG_SYS_IMMR;     /* base  of IMMR register     */
 603 #endif
 604 #if defined(CONFIG_M68K)
 605         bd->bi_mbar_base = CONFIG_SYS_MBAR;     /* base of internal registers */
 606 #endif
 607 #if defined(CONFIG_MPC83xx)
 608         bd->bi_immrbar = CONFIG_SYS_IMMR;
 609 #endif
 610
 611         return 0;
 612 }
 613 #endif
 614
 615 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 616 static int setup_board_part2(void)
 617 {
 618         bd_t *bd = gd->bd;
 619
 620         bd->bi_intfreq = gd->cpu_clk;   /* Internal Freq, in Hz */
 621         bd->bi_busfreq = gd->bus_clk;   /* Bus Freq,      in Hz */
 622 #if defined(CONFIG_CPM2)
 623         bd->bi_cpmfreq = gd->arch.cpm_clk;
 624         bd->bi_brgfreq = gd->arch.brg_clk;
 625         bd->bi_sccfreq = gd->arch.scc_clk;
 626         bd->bi_vco = gd->arch.vco_out;
 627 #endif /* CONFIG_CPM2 */
 628 #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
 629         bd->bi_pcifreq = gd->pci_clk;
 630 #endif
 631 #if defined(CONFIG_EXTRA_CLOCK)
 632         bd->bi_inpfreq = gd->arch.inp_clk;      /* input Freq in Hz */
 633         bd->bi_vcofreq = gd->arch.vco_clk;      /* vco Freq in Hz */
 634         bd->bi_flbfreq = gd->arch.flb_clk;      /* flexbus Freq in Hz */
 635 #endif
 636
 637         return 0;
 638 }
 639 #endif
 640
 641 #ifdef CONFIG_POST
 642 static int init_post(void)
 643 {
 644         post_bootmode_init();
 645         post_run(NULL, POST_ROM | post_bootmode_get(0));
 646
 647         return 0;
 648 }
 649 #endif
 650
 651 static int reloc_fdt(void)
 652 {
 653 #ifndef CONFIG_OF_EMBED
 654         if (gd->flags & GD_FLG_SKIP_RELOC)
 655                 return 0;
 656         if (gd->new_fdt) {
 657                 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
 658                 gd->fdt_blob = gd->new_fdt;
 659         }
 660 #endif
 661
 662         return 0;
 663 }
 664
 665 static int reloc_bootstage(void)
 666 {
 667 #ifdef CONFIG_BOOTSTAGE
 668         if (gd->flags & GD_FLG_SKIP_RELOC)
 669                 return 0;
 670         if (gd->new_bootstage) {
 671                 int size = bootstage_get_size();
 672
 673                 debug("Copying bootstage from %p to %p, size %x\n",
 674                       gd->bootstage, gd->new_bootstage, size);
 675                 memcpy(gd->new_bootstage, gd->bootstage, size);
 676                 gd->bootstage = gd->new_bootstage;
 677         }
 678 #endif
 679
 680         return 0;
 681 }
 682
 683 static int reloc_bloblist(void)
 684 {
 685 #ifdef CONFIG_BLOBLIST
 686         if (gd->flags & GD_FLG_SKIP_RELOC)
 687                 return 0;
 688         if (gd->new_bloblist) {
 689                 int size = CONFIG_BLOBLIST_SIZE;
 690
 691                 debug("Copying bloblist from %p to %p, size %x\n",
 692                       gd->bloblist, gd->new_bloblist, size);
 693                 memcpy(gd->new_bloblist, gd->bloblist, size);
 694                 gd->bloblist = gd->new_bloblist;
 695         }
 696 #endif
 697
 698         return 0;
 699 }
 700
 701 static int setup_reloc(void)
 702 {
 703         if (gd->flags & GD_FLG_SKIP_RELOC) {
 704                 debug("Skipping relocation due to flag\n");
 705                 return 0;
 706         }
 707
 708 #ifdef CONFIG_SYS_TEXT_BASE
 709 #ifdef ARM
 710         gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
 711 #elif defined(CONFIG_M68K)
 712         /*
 713          * On all ColdFire arch cpu, monitor code starts always
 714          * just after the default vector table location, so at 0x400
 715          */
 716         gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
 717 #else
 718         gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
 719 #endif
 720 #endif
 721         memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
 722
 723         debug("Relocation Offset is: %08lx\n", gd->reloc_off);
 724         debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
 725               gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
 726               gd->start_addr_sp);
 727
 728         return 0;
 729 }
 730
 731 #ifdef CONFIG_OF_BOARD_FIXUP
 732 static int fix_fdt(void)
 733 {
 734         return board_fix_fdt((void *)gd->fdt_blob);
 735 }
 736 #endif
 737
 738 /* ARM calls relocate_code from its crt0.S */
 739 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 740                 !CONFIG_IS_ENABLED(X86_64)
 741
 742 static int jump_to_copy(void)
 743 {
 744         if (gd->flags & GD_FLG_SKIP_RELOC)
 745                 return 0;
 746         /*
 747          * x86 is special, but in a nice way. It uses a trampoline which
 748          * enables the dcache if possible.
 749          *
 750          * For now, other archs use relocate_code(), which is implemented
 751          * similarly for all archs. When we do generic relocation, hopefully
 752          * we can make all archs enable the dcache prior to relocation.
 753          */
 754 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 755         /*
 756          * SDRAM and console are now initialised. The final stack can now
 757          * be setup in SDRAM. Code execution will continue in Flash, but
 758          * with the stack in SDRAM and Global Data in temporary memory
 759          * (CPU cache)
 760          */
 761         arch_setup_gd(gd->new_gd);
 762         board_init_f_r_trampoline(gd->start_addr_sp);
 763 #else
 764         relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
 765 #endif
 766
 767         return 0;
 768 }
 769 #endif
 770
 771 /* Record the board_init_f() bootstage (after arch_cpu_init()) */
 772 static int initf_bootstage(void)
 773 {
 774         bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
 775                         IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
 776         int ret;
 777
 778         ret = bootstage_init(!from_spl);
 779         if (ret)
 780                 return ret;
 781         if (from_spl) {
 782                 const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
 783                                                CONFIG_BOOTSTAGE_STASH_SIZE);
 784
 785                 ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
 786                 if (ret && ret != -ENOENT) {
 787                         debug("Failed to unstash bootstage: err=%d\n", ret);
 788                         return ret;
 789                 }
 790         }
 791
 792         bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
 793
 794         return 0;
 795 }
 796
 797 static int initf_console_record(void)
 798 {
 799 #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 800         return console_record_init();
 801 #else
 802         return 0;
 803 #endif
 804 }
 805
 806 static int initf_dm(void)
 807 {
 808 #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
 809         int ret;
 810
 811         bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
 812         ret = dm_init_and_scan(true);
 813         bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
 814         if (ret)
 815                 return ret;
 816 #endif
 817 #ifdef CONFIG_TIMER_EARLY
 818         ret = dm_timer_init();
 819         if (ret)
 820                 return ret;
 821 #endif
 822
 823         return 0;
 824 }
 825
 826 /* Architecture-specific memory reservation */
 827 __weak int reserve_arch(void)
 828 {
 829         return 0;
 830 }
 831
 832 __weak int arch_cpu_init_dm(void)
 833 {
 834         return 0;
 835 }
 836
 837 static const init_fnc_t init_sequence_f[] = {
 838         setup_mon_len,
 839 #ifdef CONFIG_OF_CONTROL
 840         fdtdec_setup,
 841 #endif
 842 #ifdef CONFIG_TRACE
 843         trace_early_init,
 844 #endif
 845         initf_malloc,
 846         log_init,
 847         initf_bootstage,        /* uses its own timer, so does not need DM */
 848 #ifdef CONFIG_BLOBLIST
 849         bloblist_init,
 850 #endif
 851         setup_spl_handoff,
 852         initf_console_record,
 853 #if defined(CONFIG_HAVE_FSP)
 854         arch_fsp_init,
 855 #endif
 856         arch_cpu_init,          /* basic arch cpu dependent setup */
 857         mach_cpu_init,          /* SoC/machine dependent CPU setup */
 858         initf_dm,
 859         arch_cpu_init_dm,
 860 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 861         board_early_init_f,
 862 #endif
 863 #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
 864         /* get CPU and bus clocks according to the environment variable */
 865         get_clocks,             /* get CPU and bus clocks (etc.) */
 866 #endif
 867 #if !defined(CONFIG_M68K)
 868         timer_init,             /* initialize timer */
 869 #endif
 870 #if defined(CONFIG_BOARD_POSTCLK_INIT)
 871         board_postclk_init,
 872 #endif
 873         env_init,               /* initialize environment */
 874         init_baud_rate,         /* initialze baudrate settings */
 875         serial_init,            /* serial communications setup */
 876         console_init_f,         /* stage 1 init of console */
 877         display_options,        /* say that we are here */
 878         display_text_info,      /* show debugging info if required */
 879 #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
 880         checkcpu,
 881 #endif
 882 #if defined(CONFIG_SYSRESET)
 883         print_resetinfo,
 884 #endif
 885 #if defined(CONFIG_DISPLAY_CPUINFO)
 886         print_cpuinfo,          /* display cpu info (and speed) */
 887 #endif
 888 #if defined(CONFIG_DTB_RESELECT)
 889         embedded_dtb_select,
 890 #endif
 891 #if defined(CONFIG_DISPLAY_BOARDINFO)
 892         show_board_info,
 893 #endif
 894         INIT_FUNC_WATCHDOG_INIT
 895 #if defined(CONFIG_MISC_INIT_F)
 896         misc_init_f,
 897 #endif
 898         INIT_FUNC_WATCHDOG_RESET
 899 #if defined(CONFIG_SYS_I2C)
 900         init_func_i2c,
 901 #endif
 902 #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
 903         init_func_vid,
 904 #endif
 905         announce_dram_init,
 906         dram_init,              /* configure available RAM banks */
 907 #ifdef CONFIG_POST
 908         post_init_f,
 909 #endif
 910         INIT_FUNC_WATCHDOG_RESET
 911 #if defined(CONFIG_SYS_DRAM_TEST)
 912         testdram,
 913 #endif /* CONFIG_SYS_DRAM_TEST */
 914         INIT_FUNC_WATCHDOG_RESET
 915
 916 #ifdef CONFIG_POST
 917         init_post,
 918 #endif
 919         INIT_FUNC_WATCHDOG_RESET
 920         /*
 921          * Now that we have DRAM mapped and working, we can
 922          * relocate the code and continue running from DRAM.
 923          *
 924          * Reserve memory at end of RAM for (top down in that order):
 925          *  - area that won't get touched by U-Boot and Linux (optional)
 926          *  - kernel log buffer
 927          *  - protected RAM
 928          *  - LCD framebuffer
 929          *  - monitor code
 930          *  - board info struct
 931          */
 932         setup_dest_addr,
 933 #ifdef CONFIG_PRAM
 934         reserve_pram,
 935 #endif
 936         reserve_round_4k,
 937 #ifdef CONFIG_ARM
 938         reserve_mmu,
 939 #endif
 940         reserve_video,
 941         reserve_trace,
 942         reserve_uboot,
 943         reserve_malloc,
 944         reserve_board,
 945         setup_machine,
 946         reserve_global_data,
 947         reserve_fdt,
 948         reserve_bootstage,
 949         reserve_bloblist,
 950         reserve_arch,
 951         reserve_stacks,
 952         dram_init_banksize,
 953         show_dram_config,
 954 #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
 955         defined(CONFIG_SH)
 956         setup_board_part1,
 957 #endif
 958 #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
 959         INIT_FUNC_WATCHDOG_RESET
 960         setup_board_part2,
 961 #endif
 962         display_new_sp,
 963 #ifdef CONFIG_OF_BOARD_FIXUP
 964         fix_fdt,
 965 #endif
 966         INIT_FUNC_WATCHDOG_RESET
 967         reloc_fdt,
 968         reloc_bootstage,
 969         reloc_bloblist,
 970         setup_reloc,
 971 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
 972         copy_uboot_to_ram,
 973         do_elf_reloc_fixups,
 974         clear_bss,
 975 #endif
 976 #if defined(CONFIG_XTENSA)
 977         clear_bss,
 978 #endif
 979 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 980                 !CONFIG_IS_ENABLED(X86_64)
 981         jump_to_copy,
 982 #endif
 983         NULL,
 984 };
 985
 986 void board_init_f(ulong boot_flags)
 987 {
 988         gd->flags = boot_flags;
 989         gd->have_console = 0;
 990
 991         if (initcall_run_list(init_sequence_f))
 992                 hang();
 993
 994 #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
 995                 !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
 996                 !defined(CONFIG_ARC)
 997         /* NOTREACHED - jump_to_copy() does not return */
 998         hang();
 999 #endif
1000 }
1001
1002 #if defined(CONFIG_X86) || defined(CONFIG_ARC)
1003 /*
1004  * For now this code is only used on x86.
1005  *
1006  * init_sequence_f_r is the list of init functions which are run when
1007  * U-Boot is executing from Flash with a semi-limited 'C' environment.
1008  * The following limitations must be considered when implementing an
1009  * '_f_r' function:
1010  *  - 'static' variables are read-only
1011  *  - Global Data (gd->xxx) is read/write
1012  *
1013  * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
1014  * supported).  It _should_, if possible, copy global data to RAM and
1015  * initialise the CPU caches (to speed up the relocation process)
1016  *
1017  * NOTE: At present only x86 uses this route, but it is intended that
1018  * all archs will move to this when generic relocation is implemented.
1019  */
1020 static const init_fnc_t init_sequence_f_r[] = {
1021 #if !CONFIG_IS_ENABLED(X86_64)
1022         init_cache_f_r,
1023 #endif
1024
1025         NULL,
1026 };
1027
1028 void board_init_f_r(void)
1029 {
1030         if (initcall_run_list(init_sequence_f_r))
1031                 hang();
1032
1033         /*
1034          * The pre-relocation drivers may be using memory that has now gone
1035          * away. Mark serial as unavailable - this will fall back to the debug
1036          * UART if available.
1037          *
1038          * Do the same with log drivers since the memory may not be available.
1039          */
1040         gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
1041 #ifdef CONFIG_TIMER
1042         gd->timer = NULL;
1043 #endif
1044
1045         /*
1046          * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
1047          * Transfer execution from Flash to RAM by calculating the address
1048          * of the in-RAM copy of board_init_r() and calling it
1049          */
1050         (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
1051
1052         /* NOTREACHED - board_init_r() does not return */
1053         hang();
1054 }
1055 #endif /* CONFIG_X86 */