1 # SPDX-License-Identifier: GPL-2.0+
3 # Copyright (c) 2015 Google, Inc
4 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 obj-
$(CONFIG_
$(SPL_TPL_
)CLK
) += clk-uclass.o clk_fixed_rate.o
11 obj-
$(CONFIG_ARCH_ASPEED
) += aspeed
/
12 obj-
$(CONFIG_ARCH_MEDIATEK
) += mediatek
/
13 obj-
$(CONFIG_ARCH_MESON
) += clk_meson.o clk_meson_axg.o
14 obj-
$(CONFIG_ARCH_ROCKCHIP
) += rockchip
/
15 obj-
$(CONFIG_ARCH_SOCFPGA
) += altera
/
16 obj-
$(CONFIG_CLK_AT91
) += at91
/
17 obj-
$(CONFIG_CLK_MVEBU
) += mvebu
/
18 obj-
$(CONFIG_CLK_BCM6345
) += clk_bcm6345.o
19 obj-
$(CONFIG_CLK_BOSTON
) += clk_boston.o
20 obj-
$(CONFIG_CLK_EXYNOS
) += exynos
/
21 obj-
$(CONFIG_CLK_HSDK
) += clk-hsdk-cgu.o
22 obj-
$(CONFIG_CLK_MPC83XX
) += mpc83xx_clk.o
23 obj-
$(CONFIG_CLK_OWL
) += owl
/
24 obj-
$(CONFIG_CLK_RENESAS
) += renesas
/
25 obj-
$(CONFIG_CLK_SIFIVE
) += sifive
/
26 obj-
$(CONFIG_ARCH_SUNXI
) += sunxi
/
27 obj-
$(CONFIG_CLK_STM32F
) += clk_stm32f.o
28 obj-
$(CONFIG_CLK_STM32MP1
) += clk_stm32mp1.o
29 obj-
$(CONFIG_CLK_UNIPHIER
) += uniphier
/
30 obj-
$(CONFIG_CLK_VEXPRESS_OSC
) += clk_vexpress_osc.o
31 obj-
$(CONFIG_CLK_ZYNQ
) += clk_zynq.o
32 obj-
$(CONFIG_CLK_ZYNQMP
) += clk_zynqmp.o
33 obj-
$(CONFIG_ICS8N3QV01
) += ics8n3qv01.o
34 obj-
$(CONFIG_MACH_PIC32
) += clk_pic32.o
35 obj-
$(CONFIG_SANDBOX
) += clk_sandbox.o
36 obj-
$(CONFIG_SANDBOX
) += clk_sandbox_test.o
37 obj-
$(CONFIG_STM32H7
) += clk_stm32h7.o
38 obj-
$(CONFIG_CLK_TI_SCI
) += clk-ti-sci.o
projects / thirdparty / u-boot.git / blob