2 * Copyright (C) 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <fdt_support.h>
12 #include <fsl-mc/fsl_mc.h>
13 #include <fsl-mc/fsl_mc_sys.h>
14 #include <fsl-mc/fsl_mc_private.h>
15 #include <fsl-mc/fsl_dpmng.h>
16 #include <fsl-mc/fsl_dprc.h>
17 #include <fsl-mc/fsl_dpio.h>
18 #include <fsl-mc/fsl_dpni.h>
19 #include <fsl-mc/fsl_qbman_portal.h>
20 #include <fsl-mc/ldpaa_wriop.h>
22 #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
23 #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
24 #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
26 #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
27 #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
29 DECLARE_GLOBAL_DATA_PTR
;
30 static int mc_boot_status
= -1;
31 static int mc_dpl_applied
= -1;
32 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
33 static int mc_aiop_applied
= -1;
35 struct fsl_mc_io
*root_mc_io
= NULL
;
36 struct fsl_mc_io
*dflt_mc_io
= NULL
; /* child container */
37 uint16_t root_dprc_handle
= 0;
38 uint16_t dflt_dprc_handle
= 0;
40 struct fsl_dpbp_obj
*dflt_dpbp
= NULL
;
41 struct fsl_dpio_obj
*dflt_dpio
= NULL
;
42 struct fsl_dpni_obj
*dflt_dpni
= NULL
;
43 static u64 mc_lazy_dpl_addr
;
46 void dump_ram_words(const char *title
, void *addr
)
49 uint32_t *words
= addr
;
51 printf("Dumping beginning of %s (%p):\n", title
, addr
);
52 for (i
= 0; i
< 16; i
++)
53 printf("%#x ", words
[i
]);
58 void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem
*mc_ccsr_regs
)
60 printf("MC CCSR registers:\n"
70 mc_ccsr_regs
->reg_gcr1
,
71 mc_ccsr_regs
->reg_gsr
,
72 mc_ccsr_regs
->reg_sicbalr
,
73 mc_ccsr_regs
->reg_sicbahr
,
74 mc_ccsr_regs
->reg_sicapr
,
75 mc_ccsr_regs
->reg_mcfbalr
,
76 mc_ccsr_regs
->reg_mcfbahr
,
77 mc_ccsr_regs
->reg_mcfapr
,
78 mc_ccsr_regs
->reg_psr
);
82 #define dump_ram_words(title, addr)
83 #define dump_mc_ccsr_regs(mc_ccsr_regs)
87 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
89 * Copying MC firmware or DPL image to DDR
91 static int mc_copy_image(const char *title
,
92 u64 image_addr
, u32 image_size
, u64 mc_ram_addr
)
94 debug("%s copied to address %p\n", title
, (void *)mc_ram_addr
);
95 memcpy((void *)mc_ram_addr
, (void *)image_addr
, image_size
);
96 flush_dcache_range(mc_ram_addr
, mc_ram_addr
+ image_size
);
101 * MC firmware FIT image parser checks if the image is in FIT
102 * format, verifies integrity of the image and calculates
103 * raw image address and size values.
104 * Returns 0 on success and a negative errno on error.
107 int parse_mc_firmware_fit_image(u64 mc_fw_addr
,
108 const void **raw_image_addr
,
109 size_t *raw_image_size
)
116 const char *uname
= "firmware";
118 fit_hdr
= (void *)mc_fw_addr
;
120 /* Check if Image is in FIT format */
121 format
= genimg_get_format(fit_hdr
);
123 if (format
!= IMAGE_FORMAT_FIT
) {
124 printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
128 if (!fit_check_format(fit_hdr
)) {
129 printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
133 node_offset
= fit_image_get_node(fit_hdr
, uname
);
135 if (node_offset
< 0) {
136 printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
140 /* Verify MC firmware image */
141 if (!(fit_image_verify(fit_hdr
, node_offset
))) {
142 printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
146 /* Get address and size of raw image */
147 fit_image_get_data(fit_hdr
, node_offset
, &data
, &size
);
149 *raw_image_addr
= data
;
150 *raw_image_size
= size
;
157 * Calculates the values to be used to specify the address range
158 * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
159 * It returns the highest 512MB-aligned address within the given
160 * address range, in '*aligned_base_addr', and the number of 256 MiB
161 * blocks in it, in 'num_256mb_blocks'.
163 static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr
,
165 u64
*aligned_base_addr
,
166 u8
*num_256mb_blocks
)
171 if (mc_ram_size
% MC_RAM_SIZE_ALIGNMENT
!= 0) {
172 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
177 num_blocks
= mc_ram_size
/ MC_RAM_SIZE_ALIGNMENT
;
178 if (num_blocks
< 1 || num_blocks
> 0xff) {
179 printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
184 addr
= (mc_private_ram_start_addr
+ mc_ram_size
- 1) &
185 MC_RAM_BASE_ADDR_ALIGNMENT_MASK
;
187 if (addr
< mc_private_ram_start_addr
) {
188 printf("fsl-mc: ERROR: bad start address %#llx\n",
189 mc_private_ram_start_addr
);
193 *aligned_base_addr
= addr
;
194 *num_256mb_blocks
= num_blocks
;
198 static int mc_fixup_dpc(u64 dpc_addr
)
200 void *blob
= (void *)dpc_addr
;
203 /* delete any existing ICID pools */
204 nodeoffset
= fdt_path_offset(blob
, "/resources/icid_pools");
205 if (fdt_del_node(blob
, nodeoffset
) < 0)
206 printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
209 nodeoffset
= fdt_path_offset(blob
, "/resources");
210 if (nodeoffset
< 0) {
211 printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
214 nodeoffset
= fdt_add_subnode(blob
, nodeoffset
, "icid_pools");
215 nodeoffset
= fdt_add_subnode(blob
, nodeoffset
, "icid_pool@0");
216 do_fixup_by_path_u32(blob
, "/resources/icid_pools/icid_pool@0",
217 "base_icid", FSL_DPAA2_STREAM_ID_START
, 1);
218 do_fixup_by_path_u32(blob
, "/resources/icid_pools/icid_pool@0",
220 FSL_DPAA2_STREAM_ID_END
-
221 FSL_DPAA2_STREAM_ID_START
+ 1, 1);
223 flush_dcache_range(dpc_addr
, dpc_addr
+ fdt_totalsize(blob
));
228 static int load_mc_dpc(u64 mc_ram_addr
, size_t mc_ram_size
, u64 mc_dpc_addr
)
231 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
237 #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
238 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
& 0x3) != 0 ||
239 CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
> 0xffffffff);
241 mc_dpc_offset
= CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
;
243 #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
247 * Load the MC DPC blob in the MC private DRAM block:
249 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
250 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr
+ mc_dpc_offset
);
253 * Get address and size of the DPC blob stored in flash:
255 dpc_fdt_hdr
= (void *)mc_dpc_addr
;
257 error
= fdt_check_header(dpc_fdt_hdr
);
260 * Don't return with error here, since the MC firmware can
261 * still boot without a DPC
263 printf("\nfsl-mc: WARNING: No DPC image found");
267 dpc_size
= fdt_totalsize(dpc_fdt_hdr
);
268 if (dpc_size
> CONFIG_SYS_LS_MC_DPC_MAX_LENGTH
) {
269 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
274 mc_copy_image("MC DPC blob",
275 (u64
)dpc_fdt_hdr
, dpc_size
, mc_ram_addr
+ mc_dpc_offset
);
276 #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
278 if (mc_fixup_dpc(mc_ram_addr
+ mc_dpc_offset
))
281 dump_ram_words("DPC", (void *)(mc_ram_addr
+ mc_dpc_offset
));
285 static int load_mc_dpl(u64 mc_ram_addr
, size_t mc_ram_size
, u64 mc_dpl_addr
)
288 #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
294 #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
295 BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
& 0x3) != 0 ||
296 CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
> 0xffffffff);
298 mc_dpl_offset
= CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
;
300 #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
304 * Load the MC DPL blob in the MC private DRAM block:
306 #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
307 printf("MC DPL is preloaded to %#llx\n", mc_ram_addr
+ mc_dpl_offset
);
310 * Get address and size of the DPL blob stored in flash:
312 dpl_fdt_hdr
= (void *)mc_dpl_addr
;
314 error
= fdt_check_header(dpl_fdt_hdr
);
316 printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
320 dpl_size
= fdt_totalsize(dpl_fdt_hdr
);
321 if (dpl_size
> CONFIG_SYS_LS_MC_DPL_MAX_LENGTH
) {
322 printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
327 mc_copy_image("MC DPL blob",
328 (u64
)dpl_fdt_hdr
, dpl_size
, mc_ram_addr
+ mc_dpl_offset
);
329 #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
331 dump_ram_words("DPL", (void *)(mc_ram_addr
+ mc_dpl_offset
));
336 * Return the MC boot timeout value in milliseconds
338 static unsigned long get_mc_boot_timeout_ms(void)
340 unsigned long timeout_ms
= CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
;
342 char *timeout_ms_env_var
= getenv(MC_BOOT_TIMEOUT_ENV_VAR
);
344 if (timeout_ms_env_var
) {
345 timeout_ms
= simple_strtoul(timeout_ms_env_var
, NULL
, 10);
346 if (timeout_ms
== 0) {
347 printf("fsl-mc: WARNING: Invalid value for \'"
348 MC_BOOT_TIMEOUT_ENV_VAR
349 "\' environment variable: %lu\n",
352 timeout_ms
= CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS
;
359 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
361 __weak
bool soc_has_aiop(void)
366 static int load_mc_aiop_img(u64 aiop_fw_addr
)
368 u64 mc_ram_addr
= mc_get_dram_addr();
369 #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
373 /* Check if AIOP is available */
377 * Load the MC AIOP image in the MC private DRAM block:
380 #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
381 printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr
+
382 CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
);
384 aiop_img
= (void *)aiop_fw_addr
;
385 mc_copy_image("MC AIOP image",
386 (u64
)aiop_img
, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH
,
387 mc_ram_addr
+ CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
);
395 static int wait_for_mc(bool booting_mc
, u32
*final_reg_gsr
)
398 u32 mc_fw_boot_status
;
399 unsigned long timeout_ms
= get_mc_boot_timeout_ms();
400 struct mc_ccsr_registers __iomem
*mc_ccsr_regs
= MC_CCSR_BASE_ADDR
;
403 assert(timeout_ms
> 0);
405 udelay(1000); /* throttle polling */
406 reg_gsr
= in_le32(&mc_ccsr_regs
->reg_gsr
);
407 mc_fw_boot_status
= (reg_gsr
& GSR_FS_MASK
);
408 if (mc_fw_boot_status
& 0x1)
416 if (timeout_ms
== 0) {
417 printf("ERROR: timeout\n");
419 /* TODO: Get an error status from an MC CCSR register */
423 if (mc_fw_boot_status
!= 0x1) {
425 * TODO: Identify critical errors from the GSR register's FS
426 * field and for those errors, set error to -ENODEV or other
427 * appropriate errno, so that the status property is set to
428 * failure in the fsl,dprc device tree node.
430 printf("WARNING: Firmware returned an error (GSR: %#x)\n",
437 *final_reg_gsr
= reg_gsr
;
441 int mc_init(u64 mc_fw_addr
, u64 mc_dpc_addr
)
445 struct mc_ccsr_registers __iomem
*mc_ccsr_regs
= MC_CCSR_BASE_ADDR
;
446 u64 mc_ram_addr
= mc_get_dram_addr();
449 #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
450 const void *raw_image_addr
;
451 size_t raw_image_size
= 0;
453 struct mc_version mc_ver_info
;
454 u64 mc_ram_aligned_base_addr
;
455 u8 mc_ram_num_256mb_blocks
;
456 size_t mc_ram_size
= mc_get_dram_block_size();
459 error
= calculate_mc_private_ram_params(mc_ram_addr
,
461 &mc_ram_aligned_base_addr
,
462 &mc_ram_num_256mb_blocks
);
467 * Management Complex cores should be held at reset out of POR.
468 * U-Boot should be the first software to touch MC. To be safe,
469 * we reset all cores again by setting GCR1 to 0. It doesn't do
470 * anything if they are held at reset. After we setup the firmware
471 * we kick off MC by deasserting the reset bit for core 0, and
472 * deasserting the reset bits for Command Portal Managers.
473 * The stop bits are not touched here. They are used to stop the
474 * cores when they are active. Setting stop bits doesn't stop the
475 * cores from fetching instructions when they are released from
478 out_le32(&mc_ccsr_regs
->reg_gcr1
, 0);
481 #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
482 printf("MC firmware is preloaded to %#llx\n", mc_ram_addr
);
484 error
= parse_mc_firmware_fit_image(mc_fw_addr
, &raw_image_addr
,
489 * Load the MC FW at the beginning of the MC private DRAM block:
491 mc_copy_image("MC Firmware",
492 (u64
)raw_image_addr
, raw_image_size
, mc_ram_addr
);
494 dump_ram_words("firmware", (void *)mc_ram_addr
);
496 error
= load_mc_dpc(mc_ram_addr
, mc_ram_size
, mc_dpc_addr
);
500 debug("mc_ccsr_regs %p\n", mc_ccsr_regs
);
501 dump_mc_ccsr_regs(mc_ccsr_regs
);
504 * Tell MC what is the address range of the DRAM block assigned to it:
506 reg_mcfbalr
= (u32
)mc_ram_aligned_base_addr
|
507 (mc_ram_num_256mb_blocks
- 1);
508 out_le32(&mc_ccsr_regs
->reg_mcfbalr
, reg_mcfbalr
);
509 out_le32(&mc_ccsr_regs
->reg_mcfbahr
,
510 (u32
)(mc_ram_aligned_base_addr
>> 32));
511 out_le32(&mc_ccsr_regs
->reg_mcfapr
, FSL_BYPASS_AMQ
);
514 * Tell the MC that we want delayed DPL deployment.
516 out_le32(&mc_ccsr_regs
->reg_gsr
, 0xDD00);
518 printf("\nfsl-mc: Booting Management Complex ... ");
521 * Deassert reset and release MC core 0 to run
523 out_le32(&mc_ccsr_regs
->reg_gcr1
, GCR1_P1_DE_RST
| GCR1_M_ALL_DE_RST
);
524 error
= wait_for_mc(true, ®_gsr
);
529 * TODO: need to obtain the portal_id for the root container from the
535 * Initialize the global default MC portal
536 * And check that the MC firmware is responding portal commands:
538 root_mc_io
= (struct fsl_mc_io
*)malloc(sizeof(struct fsl_mc_io
));
540 printf(" No memory: malloc() failed\n");
544 root_mc_io
->mmio_regs
= SOC_MC_PORTAL_ADDR(portal_id
);
545 debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
546 portal_id
, root_mc_io
->mmio_regs
);
548 error
= mc_get_version(root_mc_io
, MC_CMD_NO_FLAGS
, &mc_ver_info
);
550 printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
555 printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
556 mc_ver_info
.major
, mc_ver_info
.minor
, mc_ver_info
.revision
,
557 reg_gsr
& GSR_FS_MASK
);
561 mc_boot_status
= error
;
568 int mc_apply_dpl(u64 mc_dpl_addr
)
570 struct mc_ccsr_registers __iomem
*mc_ccsr_regs
= MC_CCSR_BASE_ADDR
;
573 u64 mc_ram_addr
= mc_get_dram_addr();
574 size_t mc_ram_size
= mc_get_dram_block_size();
579 error
= load_mc_dpl(mc_ram_addr
, mc_ram_size
, mc_dpl_addr
);
584 * Tell the MC to deploy the DPL:
586 out_le32(&mc_ccsr_regs
->reg_gsr
, 0x0);
587 printf("fsl-mc: Deploying data path layout ... ");
588 error
= wait_for_mc(false, ®_gsr
);
596 int get_mc_boot_status(void)
598 return mc_boot_status
;
601 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
602 int get_aiop_apply_status(void)
604 return mc_aiop_applied
;
608 int get_dpl_apply_status(void)
610 return mc_dpl_applied
;
614 * Return the MC address of private DRAM block.
616 u64
mc_get_dram_addr(void)
621 * The MC private DRAM block was already carved at the end of DRAM
622 * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
624 if (gd
->bd
->bi_dram
[1].start
) {
626 gd
->bd
->bi_dram
[1].start
+ gd
->bd
->bi_dram
[1].size
;
629 gd
->bd
->bi_dram
[0].start
+ gd
->bd
->bi_dram
[0].size
;
636 * Return the actual size of the MC private DRAM block.
638 unsigned long mc_get_dram_block_size(void)
640 unsigned long dram_block_size
= CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
;
642 char *dram_block_size_env_var
= getenv(MC_MEM_SIZE_ENV_VAR
);
644 if (dram_block_size_env_var
) {
645 dram_block_size
= simple_strtoul(dram_block_size_env_var
, NULL
,
648 if (dram_block_size
< CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
) {
649 printf("fsl-mc: WARNING: Invalid value for \'"
651 "\' environment variable: %lu\n",
654 dram_block_size
= CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE
;
658 return dram_block_size
;
661 int fsl_mc_ldpaa_init(bd_t
*bis
)
665 for (i
= WRIOP1_DPMAC1
; i
< NUM_WRIOP_PORTS
; i
++)
666 if ((wriop_is_enabled_dpmac(i
) == 1) &&
667 (wriop_get_phy_address(i
) != -1))
668 ldpaa_eth_init(i
, wriop_get_enet_if(i
));
672 static int dprc_version_check(struct fsl_mc_io
*mc_io
, uint16_t handle
)
674 struct dprc_attributes attr
;
677 memset(&attr
, 0, sizeof(struct dprc_attributes
));
678 error
= dprc_get_attributes(mc_io
, MC_CMD_NO_FLAGS
, handle
, &attr
);
680 if ((attr
.version
.major
!= DPRC_VER_MAJOR
) ||
681 (attr
.version
.minor
!= DPRC_VER_MINOR
)) {
682 printf("DPRC version mismatch found %u.%u,",
685 printf("supported version is %u.%u\n",
686 DPRC_VER_MAJOR
, DPRC_VER_MINOR
);
692 static int dpio_init(void)
694 struct qbman_swp_desc p_des
;
695 struct dpio_attr attr
;
696 struct dpio_cfg dpio_cfg
;
699 dflt_dpio
= (struct fsl_dpio_obj
*)malloc(sizeof(struct fsl_dpio_obj
));
701 printf("No memory: malloc() failed\n");
706 dpio_cfg
.channel_mode
= DPIO_LOCAL_CHANNEL
;
707 dpio_cfg
.num_priorities
= 8;
709 err
= dpio_create(dflt_mc_io
, MC_CMD_NO_FLAGS
, &dpio_cfg
,
710 &dflt_dpio
->dpio_handle
);
712 printf("dpio_create() failed: %d\n", err
);
717 memset(&attr
, 0, sizeof(struct dpio_attr
));
718 err
= dpio_get_attributes(dflt_mc_io
, MC_CMD_NO_FLAGS
,
719 dflt_dpio
->dpio_handle
, &attr
);
721 printf("dpio_get_attributes() failed: %d\n", err
);
725 if ((attr
.version
.major
!= DPIO_VER_MAJOR
) ||
726 (attr
.version
.minor
!= DPIO_VER_MINOR
)) {
727 printf("DPIO version mismatch found %u.%u,",
728 attr
.version
.major
, attr
.version
.minor
);
729 printf("supported version is %u.%u\n",
730 DPIO_VER_MAJOR
, DPIO_VER_MINOR
);
733 dflt_dpio
->dpio_id
= attr
.id
;
735 printf("Init: DPIO id=0x%d\n", dflt_dpio
->dpio_id
);
737 err
= dpio_enable(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
739 printf("dpio_enable() failed %d\n", err
);
742 debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
743 attr
.qbman_portal_ce_offset
,
744 attr
.qbman_portal_ci_offset
,
745 attr
.qbman_portal_id
,
746 attr
.num_priorities
);
748 p_des
.cena_bar
= (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
749 + attr
.qbman_portal_ce_offset
);
750 p_des
.cinh_bar
= (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
751 + attr
.qbman_portal_ci_offset
);
753 dflt_dpio
->sw_portal
= qbman_swp_init(&p_des
);
754 if (dflt_dpio
->sw_portal
== NULL
) {
755 printf("qbman_swp_init() failed\n");
756 goto err_get_swp_init
;
761 dpio_disable(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
764 dpio_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
765 dpio_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
772 static int dpio_exit(void)
776 err
= dpio_disable(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
778 printf("dpio_disable() failed: %d\n", err
);
782 err
= dpio_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpio
->dpio_handle
);
784 printf("dpio_destroy() failed: %d\n", err
);
789 printf("Exit: DPIO id=0x%d\n", dflt_dpio
->dpio_id
);
800 static int dprc_init(void)
802 int err
, child_portal_id
, container_id
;
804 uint64_t mc_portal_offset
;
806 /* Open root container */
807 err
= dprc_get_container_id(root_mc_io
, MC_CMD_NO_FLAGS
, &container_id
);
809 printf("dprc_get_container_id(): Root failed: %d\n", err
);
810 goto err_root_container_id
;
814 printf("Root container id = %d\n", container_id
);
816 err
= dprc_open(root_mc_io
, MC_CMD_NO_FLAGS
, container_id
,
819 printf("dprc_open(): Root Container failed: %d\n", err
);
823 if (!root_dprc_handle
) {
824 printf("dprc_open(): Root Container Handle is not valid\n");
828 err
= dprc_version_check(root_mc_io
, root_dprc_handle
);
830 printf("dprc_version_check() failed: %d\n", err
);
834 memset(&cfg
, 0, sizeof(struct dprc_cfg
));
835 cfg
.options
= DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED
|
836 DPRC_CFG_OPT_OBJ_CREATE_ALLOWED
|
837 DPRC_CFG_OPT_ALLOC_ALLOWED
;
838 cfg
.icid
= DPRC_GET_ICID_FROM_POOL
;
839 cfg
.portal_id
= DPRC_GET_PORTAL_ID_FROM_POOL
;
840 err
= dprc_create_container(root_mc_io
, MC_CMD_NO_FLAGS
,
846 printf("dprc_create_container() failed: %d\n", err
);
850 dflt_mc_io
= (struct fsl_mc_io
*)malloc(sizeof(struct fsl_mc_io
));
853 printf(" No memory: malloc() failed\n");
857 child_portal_id
= MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset
);
858 dflt_mc_io
->mmio_regs
= SOC_MC_PORTAL_ADDR(child_portal_id
);
860 printf("MC portal of child DPRC container: %d, physical addr %p)\n",
861 child_dprc_id
, dflt_mc_io
->mmio_regs
);
864 err
= dprc_open(dflt_mc_io
, MC_CMD_NO_FLAGS
, child_dprc_id
,
867 printf("dprc_open(): Child container failed: %d\n", err
);
871 if (!dflt_dprc_handle
) {
872 printf("dprc_open(): Child container Handle is not valid\n");
880 dprc_destroy_container(root_mc_io
, MC_CMD_NO_FLAGS
,
881 root_dprc_handle
, child_dprc_id
);
883 dprc_close(root_mc_io
, MC_CMD_NO_FLAGS
, root_dprc_handle
);
885 err_root_container_id
:
889 static int dprc_exit(void)
893 err
= dprc_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dprc_handle
);
895 printf("dprc_close(): Child failed: %d\n", err
);
899 err
= dprc_destroy_container(root_mc_io
, MC_CMD_NO_FLAGS
,
900 root_dprc_handle
, child_dprc_id
);
902 printf("dprc_destroy_container() failed: %d\n", err
);
906 err
= dprc_close(root_mc_io
, MC_CMD_NO_FLAGS
, root_dprc_handle
);
908 printf("dprc_close(): Root failed: %d\n", err
);
924 static int dpbp_init(void)
927 struct dpbp_attr dpbp_attr
;
928 struct dpbp_cfg dpbp_cfg
;
930 dflt_dpbp
= (struct fsl_dpbp_obj
*)malloc(sizeof(struct fsl_dpbp_obj
));
932 printf("No memory: malloc() failed\n");
937 dpbp_cfg
.options
= 512;
939 err
= dpbp_create(dflt_mc_io
, MC_CMD_NO_FLAGS
, &dpbp_cfg
,
940 &dflt_dpbp
->dpbp_handle
);
944 printf("dpbp_create() failed: %d\n", err
);
948 memset(&dpbp_attr
, 0, sizeof(struct dpbp_attr
));
949 err
= dpbp_get_attributes(dflt_mc_io
, MC_CMD_NO_FLAGS
,
950 dflt_dpbp
->dpbp_handle
,
953 printf("dpbp_get_attributes() failed: %d\n", err
);
957 if ((dpbp_attr
.version
.major
!= DPBP_VER_MAJOR
) ||
958 (dpbp_attr
.version
.minor
!= DPBP_VER_MINOR
)) {
959 printf("DPBP version mismatch found %u.%u,",
960 dpbp_attr
.version
.major
, dpbp_attr
.version
.minor
);
961 printf("supported version is %u.%u\n",
962 DPBP_VER_MAJOR
, DPBP_VER_MINOR
);
965 dflt_dpbp
->dpbp_attr
.id
= dpbp_attr
.id
;
967 printf("Init: DPBP id=0x%d\n", dflt_dpbp
->dpbp_attr
.id
);
970 err
= dpbp_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_handle
);
972 printf("dpbp_close() failed: %d\n", err
);
981 dpbp_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_handle
);
982 dpbp_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_handle
);
988 static int dpbp_exit(void)
992 err
= dpbp_open(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpbp
->dpbp_attr
.id
,
993 &dflt_dpbp
->dpbp_handle
);
995 printf("dpbp_open() failed: %d\n", err
);
999 err
= dpbp_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
,
1000 dflt_dpbp
->dpbp_handle
);
1002 printf("dpbp_destroy() failed: %d\n", err
);
1007 printf("Exit: DPBP id=0x%d\n", dflt_dpbp
->dpbp_attr
.id
);
1018 static int dpni_init(void)
1021 struct dpni_attr dpni_attr
;
1022 uint8_t ext_cfg_buf
[256] = {0};
1023 struct dpni_extended_cfg dpni_extended_cfg
;
1024 struct dpni_cfg dpni_cfg
;
1026 dflt_dpni
= (struct fsl_dpni_obj
*)malloc(sizeof(struct fsl_dpni_obj
));
1028 printf("No memory: malloc() failed\n");
1033 memset(&dpni_extended_cfg
, 0, sizeof(dpni_extended_cfg
));
1034 err
= dpni_prepare_extended_cfg(&dpni_extended_cfg
, &ext_cfg_buf
[0]);
1037 printf("dpni_prepare_extended_cfg() failed: %d\n", err
);
1038 goto err_prepare_extended_cfg
;
1041 memset(&dpni_cfg
, 0, sizeof(dpni_cfg
));
1042 dpni_cfg
.adv
.options
= DPNI_OPT_UNICAST_FILTER
|
1043 DPNI_OPT_MULTICAST_FILTER
;
1045 dpni_cfg
.adv
.ext_cfg_iova
= (uint64_t)&ext_cfg_buf
[0];
1046 err
= dpni_create(dflt_mc_io
, MC_CMD_NO_FLAGS
, &dpni_cfg
,
1047 &dflt_dpni
->dpni_handle
);
1051 printf("dpni_create() failed: %d\n", err
);
1055 memset(&dpni_attr
, 0, sizeof(struct dpni_attr
));
1056 err
= dpni_get_attributes(dflt_mc_io
, MC_CMD_NO_FLAGS
,
1057 dflt_dpni
->dpni_handle
,
1060 printf("dpni_get_attributes() failed: %d\n", err
);
1064 if ((dpni_attr
.version
.major
!= DPNI_VER_MAJOR
) ||
1065 (dpni_attr
.version
.minor
!= DPNI_VER_MINOR
)) {
1066 printf("DPNI version mismatch found %u.%u,",
1067 dpni_attr
.version
.major
, dpni_attr
.version
.minor
);
1068 printf("supported version is %u.%u\n",
1069 DPNI_VER_MAJOR
, DPNI_VER_MINOR
);
1072 dflt_dpni
->dpni_id
= dpni_attr
.id
;
1074 printf("Init: DPNI id=0x%d\n", dflt_dpni
->dpni_id
);
1077 err
= dpni_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_handle
);
1079 printf("dpni_close() failed: %d\n", err
);
1087 dpni_close(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_handle
);
1088 dpni_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_handle
);
1090 err_prepare_extended_cfg
:
1096 static int dpni_exit(void)
1100 err
= dpni_open(dflt_mc_io
, MC_CMD_NO_FLAGS
, dflt_dpni
->dpni_id
,
1101 &dflt_dpni
->dpni_handle
);
1103 printf("dpni_open() failed: %d\n", err
);
1107 err
= dpni_destroy(dflt_mc_io
, MC_CMD_NO_FLAGS
,
1108 dflt_dpni
->dpni_handle
);
1110 printf("dpni_destroy() failed: %d\n", err
);
1115 printf("Exit: DPNI id=0x%d\n", dflt_dpni
->dpni_id
);
1126 static int mc_init_object(void)
1132 printf("dprc_init() failed: %d\n", err
);
1138 printf("dpbp_init() failed: %d\n", err
);
1144 printf("dpio_init() failed: %d\n", err
);
1150 printf("dpni_init() failed: %d\n", err
);
1159 int fsl_mc_ldpaa_exit(bd_t
*bd
)
1163 if (bd
&& mc_lazy_dpl_addr
&& !fsl_mc_ldpaa_exit(NULL
)) {
1164 mc_apply_dpl(mc_lazy_dpl_addr
);
1165 mc_lazy_dpl_addr
= 0;
1168 /* MC is not loaded intentionally, So return success. */
1169 if (bd
&& get_mc_boot_status() != 0)
1172 if (bd
&& !get_mc_boot_status() && get_dpl_apply_status() == -1) {
1173 printf("ERROR: fsl-mc: DPL is not applied\n");
1178 if (bd
&& !get_mc_boot_status() && !get_dpl_apply_status())
1183 printf("dpbp_exit() failed: %d\n", err
);
1189 printf("dpio_exit() failed: %d\n", err
);
1195 printf("dpni_exit() failed: %d\n", err
);
1201 printf("dprc_exit() failed: %d\n", err
);
1210 static int do_fsl_mc(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
1216 switch (argv
[1][0]) {
1219 u64 mc_fw_addr
, mc_dpc_addr
;
1220 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1224 sub_cmd
= argv
[2][0];
1230 if (get_mc_boot_status() == 0) {
1231 printf("fsl-mc: MC is already booted");
1235 mc_fw_addr
= simple_strtoull(argv
[3], NULL
, 16);
1236 mc_dpc_addr
= simple_strtoull(argv
[4], NULL
,
1239 if (!mc_init(mc_fw_addr
, mc_dpc_addr
))
1240 err
= mc_init_object();
1243 #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
1247 if (get_aiop_apply_status() == 0) {
1248 printf("fsl-mc: AIOP FW is already");
1249 printf(" applied\n");
1253 aiop_fw_addr
= simple_strtoull(argv
[3], NULL
,
1256 /* if SoC doesn't have AIOP, err = -ENODEV */
1257 err
= load_mc_aiop_img(aiop_fw_addr
);
1259 printf("fsl-mc: AIOP FW applied\n");
1263 printf("Invalid option: %s\n", argv
[2]);
1278 if (get_dpl_apply_status() == 0) {
1279 printf("fsl-mc: DPL already applied\n");
1283 mc_dpl_addr
= simple_strtoull(argv
[3], NULL
,
1286 if (get_mc_boot_status() != 0) {
1287 printf("fsl-mc: Deploying data path layout ..");
1288 printf("ERROR (MC is not booted)\n");
1292 if (argv
[1][0] == 'l') {
1294 * We will do the actual dpaa exit and dpl apply
1295 * later from announce_and_cleanup().
1297 mc_lazy_dpl_addr
= mc_dpl_addr
;
1299 /* The user wants it applied now */
1300 if (!fsl_mc_ldpaa_exit(NULL
))
1301 err
= mc_apply_dpl(mc_dpl_addr
);
1306 printf("Invalid option: %s\n", argv
[1]);
1312 return CMD_RET_USAGE
;
1316 fsl_mc
, CONFIG_SYS_MAXARGS
, 1, do_fsl_mc
,
1317 "DPAA2 command to manage Management Complex (MC)",
1318 "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
1319 "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
1320 "fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
1321 "fsl_mc start aiop [FW_addr] - Start AIOP\n"