1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
4 * Clean driver and add xilinx constant from header file
6 * (C) Copyright 2004 Atmark Techno, Inc.
7 * Yasushi SHOJI <yashi@atmark-techno.com>
14 #include <linux/bitops.h>
15 #include <linux/compiler.h>
18 #define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
19 #define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
20 #define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
21 #define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
23 #define ULITE_CONTROL_RST_TX 0x01
24 #define ULITE_CONTROL_RST_RX 0x02
26 static bool little_endian
;
35 struct uartlite_plat
{
36 struct uartlite
*regs
;
39 static u32
uart_in32(void __iomem
*addr
)
47 static void uart_out32(void __iomem
*addr
, u32 val
)
55 static int uartlite_serial_putc(struct udevice
*dev
, const char ch
)
57 struct uartlite_plat
*plat
= dev_get_plat(dev
);
58 struct uartlite
*regs
= plat
->regs
;
60 if (uart_in32(®s
->status
) & SR_TX_FIFO_FULL
)
63 uart_out32(®s
->tx_fifo
, ch
& 0xff);
68 static int uartlite_serial_getc(struct udevice
*dev
)
70 struct uartlite_plat
*plat
= dev_get_plat(dev
);
71 struct uartlite
*regs
= plat
->regs
;
73 if (!(uart_in32(®s
->status
) & SR_RX_FIFO_VALID_DATA
))
76 return uart_in32(®s
->rx_fifo
) & 0xff;
79 static int uartlite_serial_pending(struct udevice
*dev
, bool input
)
81 struct uartlite_plat
*plat
= dev_get_plat(dev
);
82 struct uartlite
*regs
= plat
->regs
;
85 return uart_in32(®s
->status
) & SR_RX_FIFO_VALID_DATA
;
87 return !(uart_in32(®s
->status
) & SR_TX_FIFO_EMPTY
);
90 static int uartlite_serial_probe(struct udevice
*dev
)
92 struct uartlite_plat
*plat
= dev_get_plat(dev
);
93 struct uartlite
*regs
= plat
->regs
;
96 uart_out32(®s
->control
, 0);
97 uart_out32(®s
->control
, ULITE_CONTROL_RST_RX
| ULITE_CONTROL_RST_TX
);
98 ret
= uart_in32(®s
->status
);
99 /* Endianness detection */
100 if ((ret
& SR_TX_FIFO_EMPTY
) != SR_TX_FIFO_EMPTY
) {
101 little_endian
= true;
102 uart_out32(®s
->control
, ULITE_CONTROL_RST_RX
|
103 ULITE_CONTROL_RST_TX
);
109 static int uartlite_serial_of_to_plat(struct udevice
*dev
)
111 struct uartlite_plat
*plat
= dev_get_plat(dev
);
113 plat
->regs
= dev_read_addr_ptr(dev
);
118 static const struct dm_serial_ops uartlite_serial_ops
= {
119 .putc
= uartlite_serial_putc
,
120 .pending
= uartlite_serial_pending
,
121 .getc
= uartlite_serial_getc
,
124 static const struct udevice_id uartlite_serial_ids
[] = {
125 { .compatible
= "xlnx,opb-uartlite-1.00.b", },
126 { .compatible
= "xlnx,xps-uartlite-1.00.a" },
130 U_BOOT_DRIVER(serial_uartlite
) = {
131 .name
= "serial_uartlite",
133 .of_match
= uartlite_serial_ids
,
134 .of_to_plat
= uartlite_serial_of_to_plat
,
135 .plat_auto
= sizeof(struct uartlite_plat
),
136 .probe
= uartlite_serial_probe
,
137 .ops
= &uartlite_serial_ops
,
140 #ifdef CONFIG_DEBUG_UART_UARTLITE
142 #include <debug_uart.h>
144 static inline void _debug_uart_init(void)
146 struct uartlite
*regs
= (struct uartlite
*)CONFIG_DEBUG_UART_BASE
;
149 uart_out32(®s
->control
, 0);
150 uart_out32(®s
->control
, ULITE_CONTROL_RST_RX
| ULITE_CONTROL_RST_TX
);
151 ret
= uart_in32(®s
->status
);
152 /* Endianness detection */
153 if ((ret
& SR_TX_FIFO_EMPTY
) != SR_TX_FIFO_EMPTY
) {
154 little_endian
= true;
155 uart_out32(®s
->control
, ULITE_CONTROL_RST_RX
|
156 ULITE_CONTROL_RST_TX
);
160 static inline void _debug_uart_putc(int ch
)
162 struct uartlite
*regs
= (struct uartlite
*)CONFIG_DEBUG_UART_BASE
;
164 while (uart_in32(®s
->status
) & SR_TX_FIFO_FULL
)
167 uart_out32(®s
->tx_fifo
, ch
& 0xff);