drivers/timer/andes_plmt_timer.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2019, Rick Chen <rick@andestech.com>
   4  * Copyright (C) 2020, Sean Anderson <seanga2@gmail.com>
   5  *
   6  * U-Boot syscon driver for Andes's Platform Level Machine Timer (PLMT).
   7  * The PLMT block holds memory-mapped mtime register
   8  * associated with timer tick.
   9  */
  10
  11 #include <common.h>
  12 #include <dm.h>
  13 #include <timer.h>
  14 #include <asm/io.h>
  15 #include <linux/err.h>
  16
  17 /* mtime register */
  18 #define MTIME_REG(base)                 ((ulong)(base))
  19
  20 static u64 andes_plmt_get_count(struct udevice *dev)
  21 {
  22         return readq((void __iomem *)MTIME_REG(dev->priv));
  23 }
  24
  25 static const struct timer_ops andes_plmt_ops = {
  26         .get_count = andes_plmt_get_count,
  27 };
  28
  29 static int andes_plmt_probe(struct udevice *dev)
  30 {
  31         dev->priv = dev_read_addr_ptr(dev);
  32         if (!dev->priv)
  33                 return -EINVAL;
  34
  35         return timer_timebase_fallback(dev);
  36 }
  37
  38 static const struct udevice_id andes_plmt_ids[] = {
  39         { .compatible = "riscv,plmt0" },
  40         { }
  41 };
  42
  43 U_BOOT_DRIVER(andes_plmt) = {
  44         .name           = "andes_plmt",
  45         .id             = UCLASS_TIMER,
  46         .of_match       = andes_plmt_ids,
  47         .ops            = &andes_plmt_ops,
  48         .probe          = andes_plmt_probe,
  49         .flags          = DM_FLAG_PRE_RELOC,
  50 };