include/configs/nitrogen6x.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
   4  *
   5  * Configuration settings for the Boundary Devices Nitrogen6X
   6  * and Freescale i.MX6Q Sabre Lite boards.
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #include "mx6_common.h"
  13
  14 #define CONFIG_MACH_TYPE        3769
  15
  16 /* Size of malloc() pool */
  17 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
  18
  19 #define CONFIG_USBD_HS
  20 #define CONFIG_NETCONSOLE
  21
  22 #define CONFIG_MXC_UART
  23 #define CONFIG_MXC_UART_BASE           UART2_BASE
  24
  25 /* I2C Configs */
  26 #define CONFIG_SYS_I2C
  27 #define CONFIG_SYS_I2C_MXC
  28 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
  29 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
  30 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
  31 #define CONFIG_SYS_I2C_SPEED            100000
  32 #define CONFIG_I2C_EDID
  33
  34 /* MMC Configs */
  35 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
  36 #define CONFIG_SYS_FSL_USDHC_NUM       2
  37
  38 /*
  39  * SATA Configs
  40  */
  41 #ifdef CONFIG_CMD_SATA
  42 #define CONFIG_SYS_SATA_MAX_DEVICE      1
  43 #define CONFIG_DWC_AHSATA_PORT_ID       0
  44 #define CONFIG_DWC_AHSATA_BASE_ADDR     SATA_ARB_BASE_ADDR
  45 #define CONFIG_LBA48
  46 #endif
  47
  48 #define CONFIG_FEC_MXC
  49 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  50 #define CONFIG_FEC_XCV_TYPE             RGMII
  51 #define CONFIG_ETHPRIME                 "FEC"
  52 #define CONFIG_FEC_MXC_PHYADDR          6
  53
  54 /* USB Configs */
  55 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
  56 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
  57 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
  58 #define CONFIG_MXC_USB_FLAGS    0
  59
  60 /* Framebuffer and LCD */
  61 #define CONFIG_VIDEO_IPUV3
  62 #define CONFIG_VIDEO_BMP_RLE8
  63 #define CONFIG_SPLASH_SCREEN
  64 #define CONFIG_SPLASH_SCREEN_ALIGN
  65 #define CONFIG_VIDEO_BMP_GZIP
  66 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024)
  67 #define CONFIG_BMP_16BPP
  68 #define CONFIG_IMX_HDMI
  69 #define CONFIG_IMX_VIDEO_SKIP
  70
  71 #define CONFIG_PREBOOT                 ""
  72
  73 #ifdef CONFIG_CMD_MMC
  74 #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
  75 #else
  76 #define DISTRO_BOOT_DEV_MMC(func)
  77 #endif
  78
  79 #ifdef CONFIG_CMD_SATA
  80 #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0)
  81 #else
  82 #define DISTRO_BOOT_DEV_SATA(func)
  83 #endif
  84
  85 #ifdef CONFIG_USB_STORAGE
  86 #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0)
  87 #else
  88 #define DISTRO_BOOT_DEV_USB(func)
  89 #endif
  90
  91 #ifdef CONFIG_CMD_PXE
  92 #define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na)
  93 #else
  94 #define DISTRO_BOOT_DEV_PXE(func)
  95 #endif
  96
  97 #ifdef CONFIG_CMD_DHCP
  98 #define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na)
  99 #else
 100 #define DISTRO_BOOT_DEV_DHCP(func)
 101 #endif
 102
 103
 104 #if defined(CONFIG_SABRELITE)
 105 #define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0"
 106 #else
 107 /* FIXME: nitrogen6x covers multiple configs. Define fdtfile for each supported config. */
 108 #define FDTFILE
 109 #endif
 110
 111 #define BOOT_TARGET_DEVICES(func) \
 112         DISTRO_BOOT_DEV_MMC(func) \
 113         DISTRO_BOOT_DEV_SATA(func) \
 114         DISTRO_BOOT_DEV_USB(func) \
 115         DISTRO_BOOT_DEV_PXE(func) \
 116         DISTRO_BOOT_DEV_DHCP(func)
 117
 118 #include <config_distro_bootcmd.h>
 119
 120 #define CONFIG_EXTRA_ENV_SETTINGS \
 121         "console=ttymxc1\0" \
 122         "fdt_high=0xffffffff\0" \
 123         "initrd_high=0xffffffff\0" \
 124         "fdt_addr_r=0x18000000\0" \
 125         FDTFILE \
 126         "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0"  \
 127         "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
 128         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
 129         "ramdisk_addr_r=0x13000000\0" \
 130         "ramdiskaddr=0x13000000\0" \
 131         "ip_dyn=yes\0" \
 132         "usb_pgood_delay=2000\0" \
 133         BOOTENV
 134
 135 /* Miscellaneous configurable options */
 136 #define CONFIG_SYS_MEMTEST_START       0x10000000
 137 #define CONFIG_SYS_MEMTEST_END         0x10010000
 138 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
 139
 140 /* Physical Memory Map */
 141 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
 142
 143 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
 144 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
 145 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
 146
 147 #define CONFIG_SYS_INIT_SP_OFFSET \
 148         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 149 #define CONFIG_SYS_INIT_SP_ADDR \
 150         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 151
 152 /* Environment organization */
 153 #define CONFIG_ENV_SIZE                 (8 * 1024)
 154
 155 #if defined(CONFIG_ENV_IS_IN_MMC)
 156 #define CONFIG_ENV_OFFSET               (6 * 64 * 1024)
 157 #define CONFIG_SYS_MMC_ENV_DEV          0
 158 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
 159 #define CONFIG_ENV_OFFSET               (768 * 1024)
 160 #define CONFIG_ENV_SECT_SIZE            (8 * 1024)
 161 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
 162 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 163 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
 164 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 165 #endif
 166
 167 /*
 168  * PCI express
 169  */
 170 #ifdef CONFIG_CMD_PCI
 171 #define CONFIG_PCI_SCAN_SHOW
 172 #define CONFIG_PCIE_IMX
 173 #endif
 174
 175 #endif         /* __CONFIG_H */