1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2013 Google, Inc
6 * Pavel Herrmann <morpheus.ibis@gmail.com>
9 #ifndef _DM_UCLASS_ID_H
10 #define _DM_UCLASS_ID_H
12 /* TODO(sjg@chromium.org): this could be compile-time generated */
14 /* These are used internally by driver model */
22 UCLASS_SPI_EMUL
, /* sandbox SPI device emulator */
23 UCLASS_I2C_EMUL
, /* sandbox I2C device emulator */
24 UCLASS_PCI_EMUL
, /* sandbox PCI device emulator */
25 UCLASS_USB_EMUL
, /* sandbox USB bus device emulator */
26 UCLASS_AXI_EMUL
, /* sandbox AXI bus device emulator */
27 UCLASS_SIMPLE_BUS
, /* bus with child devices */
29 /* U-Boot uclasses start here - in alphabetical order */
30 UCLASS_ADC
, /* Analog-to-digital converter */
31 UCLASS_AHCI
, /* SATA disk controller */
32 UCLASS_BLK
, /* Block device */
33 UCLASS_CLK
, /* Clock source, e.g. used by peripherals */
34 UCLASS_CPU
, /* CPU, typically part of an SoC */
35 UCLASS_CROS_EC
, /* Chrome OS EC */
36 UCLASS_DISPLAY
, /* Display (e.g. DisplayPort, HDMI) */
37 UCLASS_DMA
, /* Direct Memory Access */
38 UCLASS_EFI
, /* EFI managed devices */
39 UCLASS_ETH
, /* Ethernet device */
40 UCLASS_FS_FIRMWARE_LOADER
, /* Generic loader */
41 UCLASS_GPIO
, /* Bank of general-purpose I/O pins */
42 UCLASS_FIRMWARE
, /* Firmware */
43 UCLASS_I2C
, /* I2C bus */
44 UCLASS_I2C_EEPROM
, /* I2C EEPROM device */
45 UCLASS_I2C_GENERIC
, /* Generic I2C device */
46 UCLASS_I2C_MUX
, /* I2C multiplexer */
47 UCLASS_IDE
, /* IDE device */
48 UCLASS_AXI
, /* AXI bus */
49 UCLASS_IRQ
, /* Interrupt controller */
50 UCLASS_KEYBOARD
, /* Keyboard input device */
51 UCLASS_LED
, /* Light-emitting diode (LED) */
52 UCLASS_LPC
, /* x86 'low pin count' interface */
53 UCLASS_MAILBOX
, /* Mailbox controller */
54 UCLASS_MASS_STORAGE
, /* Mass storage device */
55 UCLASS_MISC
, /* Miscellaneous device */
56 UCLASS_MMC
, /* SD / MMC card or chip */
57 UCLASS_MOD_EXP
, /* RSA Mod Exp device */
58 UCLASS_MTD
, /* Memory Technology Device (MTD) device */
59 UCLASS_NORTHBRIDGE
, /* Intel Northbridge / SDRAM controller */
60 UCLASS_NVME
, /* NVM Express device */
61 UCLASS_PANEL
, /* Display panel, such as an LCD */
62 UCLASS_PANEL_BACKLIGHT
, /* Backlight controller for panel */
63 UCLASS_PCH
, /* x86 platform controller hub */
64 UCLASS_PCI
, /* PCI bus */
65 UCLASS_PCI_GENERIC
, /* Generic PCI bus device */
66 UCLASS_PHY
, /* Physical Layer (PHY) device */
67 UCLASS_PINCONFIG
, /* Pin configuration node device */
68 UCLASS_PINCTRL
, /* Pinctrl (pin muxing/configuration) device */
69 UCLASS_PMIC
, /* PMIC I/O device */
70 UCLASS_PWM
, /* Pulse-width modulator */
71 UCLASS_POWER_DOMAIN
, /* (SoC) Power domains */
72 UCLASS_PWRSEQ
, /* Power sequence device */
73 UCLASS_RAM
, /* RAM controller */
74 UCLASS_REGULATOR
, /* Regulator device */
75 UCLASS_REMOTEPROC
, /* Remote Processor device */
76 UCLASS_RESET
, /* Reset controller device */
77 UCLASS_RTC
, /* Real time clock device */
78 UCLASS_SCSI
, /* SCSI device */
79 UCLASS_SERIAL
, /* Serial UART */
80 UCLASS_SMEM
, /* Shared memory interface */
81 UCLASS_SPI
, /* SPI bus */
82 UCLASS_SPMI
, /* System Power Management Interface bus */
83 UCLASS_SPI_FLASH
, /* SPI flash */
84 UCLASS_SPI_GENERIC
, /* Generic SPI flash target */
85 UCLASS_SYSCON
, /* System configuration device */
86 UCLASS_SYSRESET
, /* System reset device */
87 UCLASS_THERMAL
, /* Thermal sensor */
88 UCLASS_TIMER
, /* Timer device */
89 UCLASS_TPM
, /* Trusted Platform Module TIS interface */
90 UCLASS_USB
, /* USB bus */
91 UCLASS_USB_DEV_GENERIC
, /* USB generic device */
92 UCLASS_USB_HUB
, /* USB hub */
93 UCLASS_VIDEO
, /* Video or LCD device */
94 UCLASS_VIDEO_BRIDGE
, /* Video bridge, e.g. DisplayPort to LVDS */
95 UCLASS_VIDEO_CONSOLE
, /* Text console driver for video device */
96 UCLASS_W1
, /* Dallas 1-Wire bus */
97 UCLASS_WDT
, /* Watchdot Timer driver */