include/sandbox-clk.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright (C) 2019
   4  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
   5  */
   6
   7 #ifndef __SANDBOX_CLK_H__
   8 #define __SANDBOX_CLK_H__
   9
  10 #include <linux/clk-provider.h>
  11
  12 enum {
  13         SANDBOX_CLK_PLL2 = 1,
  14         SANDBOX_CLK_PLL3,
  15         SANDBOX_CLK_PLL3_60M,
  16         SANDBOX_CLK_PLL3_80M,
  17         SANDBOX_CLK_ECSPI_ROOT,
  18         SANDBOX_CLK_ECSPI0,
  19         SANDBOX_CLK_ECSPI1,
  20         SANDBOX_CLK_USDHC1_SEL,
  21         SANDBOX_CLK_USDHC2_SEL,
  22         SANDBOX_CLK_I2C,
  23 };
  24
  25 enum sandbox_pllv3_type {
  26         SANDBOX_PLLV3_GENERIC,
  27         SANDBOX_PLLV3_USB,
  28 };
  29
  30 struct clk *sandbox_clk_pllv3(enum sandbox_pllv3_type type, const char *name,
  31                               const char *parent_name, void __iomem *base,
  32                               u32 div_mask);
  33
  34 static inline struct clk *sandbox_clk_fixed_factor(const char *name,
  35                                                    const char *parent,
  36                                                    unsigned int mult,
  37                                                    unsigned int div)
  38 {
  39         return clk_register_fixed_factor(NULL, name, parent,
  40                         CLK_SET_RATE_PARENT, mult, div);
  41 }
  42
  43 static inline struct clk *sandbox_clk_divider(const char *name,
  44                                               const char *parent,
  45                                               void __iomem *reg, u8 shift,
  46                                               u8 width)
  47 {
  48         return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
  49                         reg, shift, width, 0);
  50 }
  51
  52 struct clk *sandbox_clk_register_gate2(struct device *dev, const char *name,
  53                                        const char *parent_name,
  54                                        unsigned long flags,
  55                                        void __iomem *reg, u8 bit_idx,
  56                                        u8 cgr_val, u8 clk_gate_flags);
  57
  58 static inline struct clk *sandbox_clk_gate2(const char *name,
  59                                             const char *parent,
  60                                             void __iomem *reg, u8 shift)
  61 {
  62         return sandbox_clk_register_gate2(NULL, name, parent,
  63                                           CLK_SET_RATE_PARENT, reg, shift,
  64                                           0x3, 0);
  65 }
  66
  67 static inline struct clk *sandbox_clk_mux(const char *name, void __iomem *reg,
  68                                           u8 shift, u8 width,
  69                                           const char * const *parents,
  70                                           int num_parents)
  71 {
  72         return clk_register_mux(NULL, name, parents, num_parents,
  73                                 CLK_SET_RATE_NO_REPARENT, reg, shift,
  74                                 width, 0);
  75 }
  76
  77 #endif /* __SANDBOX_CLK_H__ */