src/arm/nxp/imx/imx6qdl-skov-revc-lt2.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 //
   3 // Copyright (C) 2021 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
   4
   5 / {
   6         backlight: backlight {
   7                 compatible = "pwm-backlight";
   8                 pinctrl-names = "default";
   9                 pinctrl-0 = <&pinctrl_backlight>;
  10                 enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
  11                 pwms = <&pwm2 0 20000 0>;
  12                 brightness-levels = <0 255>;
  13                 num-interpolated-steps = <17>;
  14                 default-brightness-level = <8>;
  15                 power-supply = <&reg_24v0>;
  16         };
  17
  18         display {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 compatible = "fsl,imx-parallel-display";
  23                 pinctrl-names = "default";
  24                 pinctrl-0 = <&pinctrl_ipu1>;
  25
  26                 port@0 {
  27                         reg = <0>;
  28
  29                         display0_in: endpoint {
  30                                 remote-endpoint = <&ipu1_di0_disp0>;
  31                         };
  32                 };
  33
  34                 port@1 {
  35                         reg = <1>;
  36
  37                         display0_out: endpoint {
  38                                 remote-endpoint = <&panel_in>;
  39                         };
  40                 };
  41         };
  42
  43         panel {
  44                 compatible = "logictechno,lttd800480070-l2rt";
  45                 backlight = <&backlight>;
  46                 power-supply = <&reg_3v3>;
  47
  48                 port {
  49                         panel_in: endpoint {
  50                                 remote-endpoint = <&display0_out>;
  51                         };
  52                 };
  53         };
  54 };
  55
  56 &ipu1_di0_disp0 {
  57         remote-endpoint = <&display0_in>;
  58 };
  59
  60 &iomuxc {
  61         pinctrl_backlight: backlightgrp {
  62                 fsl,pins = <
  63                         MX6QDL_PAD_RGMII_TD3__GPIO6_IO23                0x58
  64                 >;
  65         };
  66
  67         pinctrl_ipu1: ipu1grp {
  68                 fsl,pins = <
  69                         MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK      0x10
  70                         MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15            0x10
  71                         MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02             0x10
  72                         MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03             0x10
  73                         MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00        0x10
  74                         MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01        0x10
  75                         MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02        0x10
  76                         MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03        0x10
  77                         MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04        0x10
  78                         MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05        0x10
  79                         MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06        0x10
  80                         MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07        0x10
  81                         MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08        0x10
  82                         MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09        0x10
  83                         MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10       0x10
  84                         MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11       0x10
  85                         MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12       0x10
  86                         MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13       0x10
  87                         MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14       0x10
  88                         MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15       0x10
  89                         MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16       0x10
  90                         MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17       0x10
  91                         MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18       0x10
  92                         MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19       0x10
  93                         MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20       0x10
  94                         MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21       0x10
  95                         MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22       0x10
  96                         MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23       0x10
  97                 >;
  98         };
  99 };