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[thirdparty/u-boot.git] / src / arm64 / rockchip / rk3566-soquartz-model-a.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3 /dts-v1/;
4
5 #include "rk3566-soquartz.dtsi"
6
7 / {
8 model = "PINE64 RK3566 SOQuartz on Model A carrier board";
9 compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566";
10
11 /* labeled DCIN_12V in schematic */
12 vcc12v_dcin: vcc12v-dcin-regulator {
13 compatible = "regulator-fixed";
14 regulator-name = "vcc12v_dcin";
15 regulator-always-on;
16 regulator-boot-on;
17 regulator-min-microvolt = <12000000>;
18 regulator-max-microvolt = <12000000>;
19 };
20
21 vcc5v0_usb: vcc5v0-usb-regulator {
22 compatible = "regulator-fixed";
23 regulator-name = "vcc5v0_usb";
24 regulator-always-on;
25 regulator-boot-on;
26 regulator-min-microvolt = <5000000>;
27 regulator-max-microvolt = <5000000>;
28 vin-supply = <&vcc12v_dcin>;
29 };
30
31 /*
32 * Labelled VCC3V0_SD in schematic to not conflict with PMIC
33 * regulator, it's 3.3v in actuality
34 */
35 vcc3v0_sd: vcc3v0-sd-regulator {
36 compatible = "regulator-fixed";
37 regulator-name = "vcc3v0_sd";
38 regulator-always-on;
39 regulator-boot-on;
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
42 vin-supply = <&vcc3v3_sys>;
43 };
44
45 vcc3v3_pcie: vcc3v3-pcie-regulator {
46 compatible = "regulator-fixed";
47 regulator-name = "vcc3v3_pcie";
48 regulator-always-on;
49 regulator-boot-on;
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
52 vin-supply = <&vcc12v_dcin>;
53 };
54
55 vcc12v_pcie: vcc12v-pcie-regulator {
56 compatible = "regulator-fixed";
57 regulator-name = "vcc12v_pcie";
58 regulator-always-on;
59 regulator-boot-on;
60 regulator-min-microvolt = <12000000>;
61 regulator-max-microvolt = <12000000>;
62 vin-supply = <&vcc12v_dcin>;
63 };
64 };
65
66 /* phy for pcie */
67 &combphy2 {
68 phy-supply = <&vcc3v3_sys>;
69 status = "okay";
70 };
71
72 &gmac1 {
73 status = "okay";
74 };
75
76 /*
77 * i2c1 is exposed on CM1 / Module1A
78 * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
79 * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
80 */
81 &i2c1 {
82 status = "okay";
83
84 /*
85 * the rtc interrupt is tied to PMIC_PWRON,
86 * it will force reset the board if triggered.
87 */
88 pcf85063: rtc@51 {
89 compatible = "nxp,pcf85063";
90 reg = <0x51>;
91 };
92 };
93
94 /*
95 * i2c2 is exposed on CM1 / Module1A - to PI40
96 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
97 * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
98 */
99 &i2c2 {
100 status = "disabled";
101 };
102
103 /*
104 * i2c3 is exposed on CM1 / Module1A - to PI40
105 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
106 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
107 */
108 &i2c3 {
109 status = "disabled";
110 };
111
112 /*
113 * i2c4 is exposed on CM2 / Module1B - to PI40
114 * pin 45 - GPIO24 - i2c4_scl_m1
115 * pin 47 - GPIO23 - i2c4_sda_m1
116 */
117 &i2c4 {
118 status = "disabled";
119 };
120
121 /*
122 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
123 * pin 24 - GPIO26 - i2s1_sdi1_m1
124 * pin 25 - GPIO21 - i2s1_sdo0_m1
125 * pin 26 - GPIO19 - i2s1_lrck_tx_m1
126 * pin 27 - GPIO20 - i2s1_sdi0_m1
127 * pin 29 - GPIO16 - i2s1_sdi3_m1
128 * pin 30 - GPIO6 - i2s1_sdi2_m1
129 * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
130 * pin 41 - GPIO25 - i2s1_sdo2_m1
131 * pin 49 - GPIO18 - i2s1_sclk_tx_m1
132 * pin 50 - GPIO17 - i2s1_mclk_m1
133 * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
134 */
135 &i2s1_8ch {
136 status = "disabled";
137 };
138
139 &led_diy {
140 status = "okay";
141 };
142
143 &led_work {
144 status = "okay";
145 };
146
147 &pcie2x1 {
148 vpcie3v3-supply = <&vcc3v3_pcie>;
149 status = "okay";
150 };
151
152 &rgmii_phy1 {
153 status = "okay";
154 };
155
156 &rgmii_phy1 {
157 status = "okay";
158 };
159
160 /*
161 * saradc is exposed on CM1 / Module1A - to J2
162 * pin 94 - AIN1 - saradc_vin3
163 * pin 96 - AIN0 - saradc_vin2
164 */
165 &saradc {
166 status = "disabled";
167 };
168
169 /*
170 * vmmc-supply is vcc3v3_sd on v1.0 and vcc3v0_sd on v1.1+
171 * the soquartz SoM has SDMMC_PWR (CM1 pin 75) hardwired to vcc3v3_sys,
172 * so we use vcc3v3_sd here to ensure the regulator is enabled on older boards.
173 */
174 &sdmmc0 {
175 vmmc-supply = <&vcc3v3_sd>;
176 status = "okay";
177 };
178
179 /*
180 * spi3 is exposed on CM1 / Module1A - to PI40
181 * pin 37 - GPIO7 - spi3_cs1_m0
182 * pin 38 - GPIO11 - spi3_clk_m0
183 * pin 39 - GPIO8 - spi3_cs0_m0
184 * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
185 * pin 44 - GPIO10 - spi3_mosi_m0
186 */
187 &spi3 {
188 status = "disabled";
189 };
190
191 /*
192 * uart2 is exposed on CM1 / Module1A - to PI40
193 * pin 51 - GPIO15 - uart2_rx_m0
194 * pin 55 - GPIO14 - uart2_tx_m0
195 */
196 &uart2 {
197 status = "okay";
198 };
199
200 /*
201 * uart7 is exposed on CM1 / Module1A - to PI40
202 * pin 46 - GPIO22 - uart7_tx_m2
203 * pin 47 - GPIO23 - uart7_rx_m2
204 */
205 &uart7 {
206 status = "okay";
207 };
208
209 &usb2phy0 {
210 status = "okay";
211 };
212
213 &usb2phy0_otg {
214 phy-supply = <&vcc5v0_usb>;
215 status = "okay";
216 };
217
218 &usb_host0_xhci {
219 status = "okay";
220 };
221
222 &vbus {
223 vin-supply = <&vcc5v0_usb>;
224 };
225
226 &vcc3v3_sd {
227 regulator-always-on;
228 regulator-boot-on;
229 regulator-min-microvolt = <3300000>;
230 regulator-max-microvolt = <3300000>;
231 status = "okay";
232 };