]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
armv8: fsl-layerscape: add base addresses for several devices
authorLaurentiu Tudor <laurentiu.tudor@nxp.com>
Tue, 30 Jul 2019 14:29:56 +0000 (17:29 +0300)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Thu, 22 Aug 2019 03:37:36 +0000 (09:07 +0530)
Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h

index 7cd5333ff440a34dd64603bb7054ddc8cb5ba687..84bed8d42327b1ce951e9e62d3d093f3f30487e4 100644 (file)
@@ -25,6 +25,8 @@
 #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR       (CONFIG_SYS_IMMR + 0x00370000)
 #define SYS_FSL_QSPI_ADDR                      (CONFIG_SYS_IMMR + 0x010c0000)
 #define CONFIG_SYS_FSL_ESDHC_ADDR              (CONFIG_SYS_IMMR + 0x01140000)
+#define FSL_ESDHC1_BASE_ADDR                   CONFIG_SYS_FSL_ESDHC_ADDR
+#define FSL_ESDHC2_BASE_ADDR                   (CONFIG_SYS_IMMR + 0x01150000)
 #ifndef CONFIG_NXP_LSCH3_2
 #define CONFIG_SYS_IFC_ADDR                    (CONFIG_SYS_IMMR + 0x01240000)
 #endif
 #define TZASC_REGION_ATTRIBUTES_0(x)   ((TZASC1_BASE + (x * 0x10000)) + 0x110)
 #define TZASC_REGION_ID_ACCESS_0(x)    ((TZASC1_BASE + (x * 0x10000)) + 0x114)
 
+/* EDMA */
+#define EDMA_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x012c0000)
+
 /* SATA */
 #define AHCI_BASE_ADDR1                                (CONFIG_SYS_IMMR + 0x02200000)
 #define AHCI_BASE_ADDR2                                (CONFIG_SYS_IMMR + 0x02210000)
 
+/* QDMA */
+#define QDMA_BASE_ADDR                         (CONFIG_SYS_IMMR + 0x07380000)
+#define QMAN_CQSIDR_REG                                0x20a80
+
+/* DISPLAY */
+#define DISPLAY_BASE_ADDR                      (CONFIG_SYS_IMMR + 0x0e080000)
+
+/* GPU */
+#define GPU_BASE_ADDR                          (CONFIG_SYS_IMMR + 0x0e0c0000)
+
 /* SFP */
 #define CONFIG_SYS_SFP_ADDR            (CONFIG_SYS_IMMR + 0x00e80200)