]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
armv8: ls1088aqds: Add SD boot support for ls1088qds
authorAshish Kumar <Ashish.Kumar@nxp.com>
Mon, 6 Nov 2017 07:48:44 +0000 (13:18 +0530)
committerYork Sun <york.sun@nxp.com>
Wed, 15 Nov 2017 18:52:19 +0000 (10:52 -0800)
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/Kconfig
board/freescale/ls1088a/MAINTAINERS
configs/ls1088aqds_sdcard_qspi_defconfig [new file with mode: 0644]
include/configs/ls1088aqds.h

index 20d60b1956a9ce3436e15341136041fa1431a92d..1304417bbf0f710984275d19170b0fab1ad06f60 100644 (file)
@@ -817,6 +817,7 @@ config TARGET_LS1088AQDS
        select ARMV8_MULTIENTRY
        select ARCH_MISC_INIT
        select BOARD_LATE_INIT
+       select SUPPORT_SPL
        help
          Support for NXP LS1088AQDS platform
          The LS1088A Development System (QDS) is a high-performance
index 68f23d6e0af17ca846a1049c9f75b8f79dbffeff..b3d5c388ebe4be23954466f6679e3c627649a6af 100644 (file)
@@ -14,3 +14,4 @@ S:    Maintained
 F:     board/freescale/ls1088a/
 F:     include/configs/ls1088aqds.h
 F:     configs/ls1088aqds_qspi_defconfig
+F:     configs/ls1088aqds_sdcard_qspi_defconfig
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
new file mode 100644 (file)
index 0000000..214de54
--- /dev/null
@@ -0,0 +1,41 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1088AQDS=y
+CONFIG_SPL_LIBCOMMON_SUPPORT=y
+CONFIG_SPL_LIBGENERIC_SUPPORT=y
+CONFIG_FSL_LS_PPA=y
+CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_SERIAL_SUPPORT=y
+CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_PARTITIONS=y
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI"
+CONFIG_SD_BOOT=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_SPL=y
+CONFIG_SPL_BUILD=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
+CONFIG_SPL_ENV_SUPPORT=y
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SPI=y
+CONFIG_FSL_DSPI=y
index e60fe49f280933333b3904ccb706ec0d480574a5..310e8fd59f3f41cde3777f65b7f5a014797e65a3 100644 (file)
@@ -23,6 +23,10 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SIZE                        0x2000          /* 8KB */
 #define CONFIG_ENV_OFFSET              0x300000        /* 3MB */
 #define CONFIG_ENV_SECT_SIZE           0x40000
+#elif defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET              (3 * 1024 * 1024)
+#define CONFIG_SYS_MMC_ENV_DEV         0
+#define CONFIG_ENV_SIZE                        0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR                        (CONFIG_SYS_FLASH_BASE + 0x300000)
@@ -30,10 +34,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SIZE                        0x20000
 #endif
 
-#if defined(CONFIG_QSPI_BOOT)
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_QIXIS_I2C_ACCESS
 #define SYS_NO_FLASH
 
+#undef CONFIG_CMD_IMLS
 #define CONFIG_SYS_CLK_FREQ            100000000
 #define CONFIG_DDR_CLK_FREQ            100000000
 #else
@@ -190,7 +195,7 @@ unsigned long get_board_ddr_clk(void);
                                        | CSPR_V)
 
 #define CONFIG_SYS_FPGA_AMASK          IFC_AMASK(64*1024)
-#if defined(CONFIG_QSPI_BOOT)
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_FPGA_CSOR           CSOR_GPCM_ADM_SHIFT(0)
 #else
 #define CONFIG_SYS_FPGA_CSOR           CSOR_GPCM_ADM_SHIFT(12)
@@ -293,7 +298,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
 
 /* QSPI device */
-#if defined(CONFIG_QSPI_BOOT)
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_FSL_QSPI
 #define FSL_QSPI_FLASH_SIZE            (1 << 26)
 #define FSL_QSPI_FLASH_NUM             2
@@ -315,7 +320,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START       0x80000000
 #define CONFIG_SYS_MEMTEST_END         0x9fffffff
 
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
+#else
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#endif
 
 #define CONFIG_FSL_MEMAC
 
@@ -343,6 +352,23 @@ unsigned long get_board_ddr_clk(void);
        "sf read 0x80100000 0xE00000 0x100000;" \
        "fsl_mc start mc 0x80000000 0x80100000\0"       \
        "mcmemsize=0x70000000 \0"
+#elif defined(CONFIG_SD_BOOT)
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS               \
+       "hwconfig=fsl_ddr:bank_intlv=auto\0"    \
+       "loadaddr=0x90100000\0"                 \
+       "kernel_addr=0x800\0"                \
+       "ramdisk_addr=0x800000\0"               \
+       "ramdisk_size=0x2000000\0"              \
+       "fdt_high=0xa0000000\0"                 \
+       "initrd_high=0xffffffffffffffff\0"      \
+       "kernel_start=0x8000\0"              \
+       "kernel_load=0xa0000000\0"              \
+       "kernel_size=0x14000\0"               \
+       "mcinitcmd=mmcinfo;mmc read 0x80000000 0x5000 0x800;"  \
+       "mmc read 0x80100000 0x7000 0x800;" \
+       "fsl_mc start mc 0x80000000 0x80100000\0"       \
+       "mcmemsize=0x70000000 \0"
 #else  /* NOR BOOT */
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS              \