]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
ARM: DTS: Resync am3517-evm.dts with Linux 4.19
authorAdam Ford <aford173@gmail.com>
Sun, 21 Oct 2018 14:09:01 +0000 (09:09 -0500)
committerTom Rini <trini@konsulko.com>
Fri, 16 Nov 2018 18:34:37 +0000 (13:34 -0500)
Some minor changes have been made to the AM3517-evm and the underlying
am3517.dtsi files.  This patch re-sync's the DTS and DTSI files with
Linux.

Signed-off-by: Adam Ford <aford173@gmail.com>
arch/arm/dts/am3517-evm.dts
arch/arm/dts/am3517-som.dtsi
arch/arm/dts/am3517.dtsi

index 98aadb0f81c5e04153f0ac4ad4f5fdea1bd0bf2f..1d158cfda15f2653fe829aa4faf610f5a926f883 100644 (file)
                status = "okay";
                pinctrl-names = "default";
                enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;    /* gpio176, lcd INI */
+               vcc-supply = <&vdd_io_reg>;
 
                port {
                        lcd_in: endpoint {
        bl: backlight {
                compatible = "pwm-backlight";
                pinctrl-names = "default";
+               power-supply = <&vdd_io_reg>;
                pinctrl-0 = <&backlight_pins>;
                pwms = <&pwm11 0 5000000 0>;
                brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
                ti,timers = <&timer11>;
                #pwm-cells = <3>;
        };
+
+       /* HS USB Host PHY on PORT 1 */
+       hsusb1_phy: hsusb1_phy {
+               compatible = "usb-nop-xceiv";
+               reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */
+               #phy-cells = <0>;
+       };
 };
 
 &davinci_emac {
                reg = <0x21>;
                gpio-controller;
                #gpio-cells = <2>;
+               vcc-supply = <&vdd_io_reg>;
        };
 };
 
        cd-gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>; /* gpio_127 */
 };
 
-&mmc2 {
+&mmc3 {
       status = "disabled";
 };
 
-&mmc3 {
-      status = "disabled";
+&usbhshost {
+       port1-mode = "ehci-phy";
+};
+
+&usbhsehci {
+       phys = <&hsusb1_phy>;
 };
 
 &omap3_pmx_core {
+       pinctrl-names = "default";
+       pinctrl-0 = <&hsusb1_rst_pins>;
 
        leds_pins: pinmux_leds_pins {
                pinctrl-single,pins = <
                        OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0)       /* dss_data15.dss_data15 */
                >;
        };
+
+       hsusb1_rst_pins: pinmux_hsusb1_rst_pins {
+               pinctrl-single,pins = <
+                       OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4)       /* gpmc_ncs6.gpio_57 */
+               >;
+       };
+};
+
+&omap3_pmx_core2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&hsusb1_pins>;
+
+       hsusb1_pins: pinmux_hsusb1_pins {
+               pinctrl-single,pins = <
+                       OMAP3430_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3)    /* etk_clk.hsusb1_stp */
+                       OMAP3430_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3)    /* etk_ctl.hsusb1_clk */
+                       OMAP3430_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3)     /* etk_d8.hsusb1_dir */
+                       OMAP3430_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3)     /* etk_d9.hsusb1_nxt */
+                       OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3)     /* etk_d0.hsusb1_data0 */
+                       OMAP3430_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3)     /* etk_d1.hsusb1_data1 */
+                       OMAP3430_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3)     /* etk_d2.hsusb1_data2 */
+                       OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3)     /* etk_d7.hsusb1_data3 */
+                       OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3)     /* etk_d4.hsusb1_data4 */
+                       OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3)     /* etk_d5.hsusb1_data5 */
+                       OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3)     /* etk_d6.hsusb1_data6 */
+                       OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3)     /* etk_d3.hsusb1_data7 */
+               >;
+       };
 };
index a6d5ff73c163074b03f21ea77aed21103f84d096..dae6e458e59fe7e4b49c65c78ed5224169a4407c 100644 (file)
                        cpu0-supply = <&vdd_core_reg>;
                };
        };
+
+       wl12xx_buffer: wl12xx_buf {
+               compatible = "regulator-fixed";
+               regulator-name = "wl1271_buf";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&wl12xx_buffer_pins>;
+               gpio = <&gpio5 1 GPIO_ACTIVE_LOW>; /* gpio 129 */
+               regulator-always-on;
+               vin-supply = <&vdd_1v8_reg>;
+       };
+
+       wl12xx_vmmc2: wl12xx_vmmc2 {
+               compatible = "regulator-fixed";
+               regulator-name = "vwl1271";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <1800000>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&wl12xx_wkup_pins>;
+               gpio = <&gpio1 3 GPIO_ACTIVE_HIGH >; /* gpio 3 */
+               startup-delay-us = <70000>;
+               enable-active-high;
+               regulator-always-on;
+               vin-supply = <&wl12xx_buffer>;
+       };
 };
 
 &gpmc {
@@ -64,7 +90,6 @@
                regulators {
                        vdd_core_reg: VDCDC1 {
                                regulator-name = "vdd_core";
-                               compatible = "regulator-fixed";
                                regulator-always-on;
                                regulator-min-microvolt = <1200000>;
                                regulator-max-microvolt = <1200000>;
@@ -72,7 +97,6 @@
 
                        vdd_io_reg: VDCDC2 {
                                regulator-name = "vdd_io";
-                               compatible = "regulator-fixed";
                                regulator-always-on;
                                regulator-min-microvolt = <3300000>;
                                regulator-max-microvolt = <3300000>;
 
                        vdd_1v8_reg: VDCDC3 {
                                regulator-name = "vdd_1v8";
-                               compatible = "regulator-fixed";
                                regulator-always-on;
                                regulator-min-microvolt = <1800000>;
                                regulator-max-microvolt = <1800000>;
 
                        vdd_usb18_reg: LDO1 {
                                regulator-name = "vdd_usb18";
-                               compatible = "regulator-fixed";
                                regulator-always-on;
                                regulator-min-microvolt = <1800000>;
                                regulator-max-microvolt = <1800000>;
 
                        vdd_usb33_reg: LDO2 {
                                regulator-name = "vdd_usb33";
-                               compatible = "regulator-fixed";
                                regulator-always-on;
                                regulator-min-microvolt = <3300000>;
                                regulator-max-microvolt = <3300000>;
        };
 };
 
+&mmc2 {
+       interrupts-extended = <&intc 86 /* &omap3_pmx_core 0x12c */>;
+
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_pins>;
+       vmmc-supply = <&wl12xx_vmmc2>;
+       non-removable;
+       bus-width = <4>;
+       cap-power-off-card;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       wlcore: wlcore@2 {
+               compatible = "ti,wl1271";
+               reg = <2>;
+               interrupt-parent = <&gpio6>;
+               interrupts = <10 IRQ_TYPE_LEVEL_HIGH>; /* gpio_170 */
+               ref-clock-frequency = <26000000>;
+               tcxo-clock-frequency = <26000000>;
+       };
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+
+       bluetooth {
+               compatible = "ti,wl1271-st";
+               enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; /* gpio 56 */
+               max-speed = <3000000>;
+       };
+};
+
 &omap3_pmx_core {
 
+       wl12xx_buffer_pins: pinmux_wl12xx_buffer_pins {
+               pinctrl-single,pins = <
+                       OMAP3_CORE1_IOPAD(0x2156, PIN_OUTPUT | MUX_MODE4)  /* mmc1_dat7.gpio_129 */
+               >;
+       };
+
+       mmc2_pins: pinmux_mmc2_pins {
+               pinctrl-single,pins = <
+                       OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_clk.mmc2_clk */
+                       OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_cmd.mmc2_cmd */
+                       OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat0.mmc2_dat0 */
+                       OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat1.mmc2_dat1 */
+                       OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat2.mmc2_dat2 */
+                       OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)  /* mmc2_dat3.mmc2_dat3 */
+                       OMAP3_CORE1_IOPAD(0x2164, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat4.mmc2_dir_dat0 */
+                       OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat5.mmc2_dir_dat1 */
+                       OMAP3_CORE1_IOPAD(0x2168, PIN_OUTPUT | MUX_MODE1) /* mmc2_dat6.mmc2_dir_cmd */
+                       OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE1) /* mmc2_dat7.mmc2_clkin */
+                       OMAP3_CORE1_IOPAD(0x21c6, PIN_INPUT_PULLUP | MUX_MODE4) /* hdq_sio.gpio_170 */
+               >;
+       };
+
        rtc_pins: pinmux_rtc_pins {
                pinctrl-single,pins = <
                        OMAP3_CORE1_IOPAD(0x20b6, PIN_INPUT_PULLUP | MUX_MODE4) /* gpmc_ncs4.gpio_55 */
                        OMAP3_CORE1_IOPAD(0x20d2, PIN_INPUT | MUX_MODE4) /* gpmc_wait3.gpio_65 */
                >;
        };
+
+       uart2_pins: pinmux_uart2_pins {
+               pinctrl-single,pins = <
+                       OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)         /* uart2_cts */
+                       OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT_PULLUP | MUX_MODE0)        /* uart2_rts */
+                       OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)               /* uart2_tx */
+                       OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)                /* uart2_rx */
+                       OMAP3_CORE1_IOPAD(0x20b8, PIN_INPUT | MUX_MODE0)                /* gpio_56 */
+               >;
+       };
+};
+
+&omap3_pmx_wkup {
+
+       wl12xx_wkup_pins: pinmux_wl12xx_wkup_pins {
+               pinctrl-single,pins = <
+                       OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4)        /* sys_boot1.gpio_3 */
+               >;
+       };
 };
index 4b6062b631b1a73813f56e5a447a617a911700a3..23ea381d363fd12e6d9ac7f08e8613f1bf12443e 100644 (file)
        };
 };
 
+/* Table Table 5-79 of the TRM shows 480ab000 is reserved */
+&usb_otg_hs {
+       status = "disabled";
+};
+
 &iva {
        status = "disabled";
 };